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140 Commits

Author SHA1 Message Date
Marc Majoral
91f509abf9 write the code phase rate and the nco phase rate parameters in the FPGA 2019-04-10 11:31:34 +02:00
Marc Majoral
ff024e7292 cleaned unused code and added some comments. 2019-04-04 19:55:02 +02:00
Marc Majoral
5bc7a778e9 commented out the old DLL and PLL filters in the tracking modules + removed some old not used code in the acquisition that was already commented out. 2019-04-02 13:10:09 +02:00
Marc Majoral
58a0de006e corrected comment 2019-03-26 16:41:20 +01:00
Marc Majoral
63cee0e63b In order to reduce the CPU workload, the FPGA acquisition does not close and open the device driver in between the first and the second acquisition anymore. 2019-03-26 16:35:19 +01:00
Marc Majoral
cbc8131677 optimized the computation of FPGA acquisition doppler shift and dopper step registers 
removed unnecessary function call
 2019-03-26 16:22:49 +01:00
Marc Majoral
2b46c79ba7 optimized the process of computing and writing the fft of the local code to the acquisition HW accelerator. 
The writing of the local code is still performed by processor instructions in a loop.
THe FPGA L2 classes were updated accordingly.
 2019-03-26 12:26:08 +01:00
Marc Majoral
905a85670c currently optimizing the FPGA-related code 2019-03-25 19:45:54 +01:00
Marc Majoral
e6b661494c moved to 16 bits per local code. 2019-03-20 16:59:32 +01:00
Marc Majoral
6da82535ba Merge branch 'next' of https://github.com/gnss-sdr/gnss-sdr into fpga 2019-03-20 16:35:55 +01:00
Marc Majoral
a24d26f427 set the default sampling frequency of the HW source to 12.5 Msps and the default bandpass bandwidth to 12.5 MHz + other minor changes 2019-03-19 10:14:09 +01:00
Marc Majoral
bef7e42fb9 Merge branch 'next' of https://github.com/gnss-sdr/gnss-sdr into fpga 2019-03-18 19:37:19 +01:00
Carles Fernandez
dd7a52c93b
Fix headers 2019-03-06 21:54:39 +01:00
Carles Fernandez
5b8ab9f591 Improve includes (IWYU) 2019-03-06 13:49:14 +01:00
Marc Majoral
5a2dc274cf but solved: double acquisition was using uint32_t for the initial doppler estimation. Therefore when the first estimated doppler was negative it was reset to zero. 2019-03-01 20:37:14 +01:00
Carles Fernandez
e43b8f5284
Fix defects detected by Coverity Scan 2019-03-01 15:29:43 +01:00
Carles Fernandez
df0a77ee0d
Fix warnings 
more protection on read/write failures and some code cleaning
 2019-03-01 10:11:36 +01:00
Carles Fernandez
7c71ed9404
Merge branch 'fpga' of https://github.com/gnss-sdr/gnss-sdr into merge-fpga 
Applied checks and formatting
 2019-02-28 21:45:30 +01:00
Marc Majoral
ea86546d99 implemented double acquisition for the FPGA 2019-02-28 20:49:35 +01:00
Marc Majoral
c32e0b427a coding style + removed some unnecessary memory arrays in the FPGA E5A tracking adapter class. 2019-02-27 17:27:31 +01:00
Marc Majoral
8d770d9be9 more code cleaning 
removed some non used variables
 2019-02-27 13:30:09 +01:00
Marc Majoral
5e22e4c50a cleaned the FPGA acquisition code 2019-02-26 18:28:14 +01:00
Marc Majoral
cf0a37300a Merge branch 'next' of https://github.com/gnss-sdr/gnss-sdr into fpga 2019-02-25 19:21:00 +01:00
Carles Fernandez
9bc771bed6
Deploy a new option -DENABLE_CLANG_TIDY to integrate clang-tidy checks and fixes into the compilation process, if found. It defaults to OFF 2019-02-21 09:59:06 +01:00
Carles Fernandez
75bd492d96
Change CMake target names to more meaningful ones, reflecting the code tree 2019-02-10 18:34:28 +01:00
Carles Fernandez
ce051e040f
Improve target design 2019-02-10 01:13:02 +01:00
Carles Fernandez
dfc89868af
Fix building 2019-02-08 00:05:14 +01:00
Carles Fernandez
708b288e61
Clean CMake scripts 2019-02-04 22:44:45 +01:00
Carles Fernandez
8ae72fe458
Update to modern CMake usage 2019-02-03 19:24:44 +01:00
Marc Majoral
f127729eb0 Merge branch 'next' of https://github.com/gnss-sdr/gnss-sdr into fpga 2019-01-25 18:02:07 +01:00
Carles Fernandez
54237770a6
Apply fixes by clang-tidy 2018-12-10 22:59:10 +01:00
Carles Fernandez
3dce8934fd
Apply fixes by clang-tidy 2018-12-10 19:05:12 +01:00
Carles Fernandez
5b79f8ac50 Merge branch 'next' into smart_acq_resampler 2018-12-10 14:24:42 +01:00
Carles Fernandez
5f79053d65
Sort includes automatically with clang-format 
Order:
1.- Main header
2.- Local headers
3.- Third-party library headers
4.- System headers

each category sorted lexicographically
 2018-12-09 22:00:09 +01:00
Javier Arribas
63b19692e7 Completing the smart acquisition resampler 2018-12-05 16:50:32 +01:00
Marc Majoral
e436aadfd9 minor modifications to the Galileo E5a and GPS L5 acquisition adapters. Now the acquisition opens and closes the acquisition HW device every time an acquisition is done, to prevent the acquisition interrupt from interrupting all the acquisition processes at the same time. 2018-12-05 11:23:30 +01:00
Javier Arribas
4b80451630 Adding initial functional changes for the smart acquisition resampler 2018-12-03 17:58:18 +01:00
Marc Majoral
bd90563925 Merge branch 'next' of https://github.com/gnss-sdr/gnss-sdr into fpga 2018-11-30 11:10:38 +01:00
Marc Majoral
f48a91c413 Galileo E5a is now debugged and working. Acquisition is using interrupts again. Each acquisition process opens and closes the acquisition device when an acquisition is done instead of having the device opened all the time. In this way the acquisition interrupt should only be received by the process that is using the interrupt at that time. 2018-11-30 11:07:01 +01:00
Carles Fernandez
87d1413447
Make cmakelint happier 2018-11-24 18:40:34 +01:00
Carles Fernandez
b0ba246934
Apply some style rules to CMake scripts 2018-11-22 00:35:21 +01:00
Marc Majoral
7023e879db adapted the software to a bit size for the local copy of the FFT of the GNSS code to 10 bits per sample. 
worked on the observables tests.
 2018-11-13 19:51:12 +01:00
Marc Majoral
f150fe02c7 solved a bug which caused the tracking pull-in test not to work correctly with Galileo E1 when using the downsampling filter in the acquisition. 2018-11-09 20:50:32 +01:00
Marc Majoral
1c80eaa50c corrected a bug in the fpga tracking pull-in test where a parameter was rewritten with an incorrect value 
modified the fpga tracking pull-in test to take into account the downsampling factor in the L1/E1 queue
 2018-11-07 20:21:05 +01:00
Marc Majoral
b5409f0860 updated the SW to run the new Acquisition HW accelerator, which compensates the scaling factors of the FFT and the IFFT, and computes the test statistics out of the peak value and the second peak value resulting from the correlation performed by the acquisition process. Updated the GPS L1 and Galileo E1 acquisition adapters. 2018-10-31 18:48:08 +01:00
Marc Majoral
8710ba1cf7 Merge branch 'next' of https://github.com/gnss-sdr/gnss-sdr into fpga 2018-10-08 19:47:39 +02:00
Carles Fernandez
78c0b76cb9
Avoid use of GLOB for source and header files 2018-10-04 22:35:44 +02:00
Marc Majoral
2826dd21d3 use of the :2 decimator in the GPS L1/Galileo E1 frequency band 
added methods to the L1 and E1 FPGA acquisition classes for the unit tests to be able to control the doppler sweep from the SW instead of the HW. In this way we can produce more detailed results.
 2018-10-04 17:49:09 +02:00
Marc Majoral
f333c05305 saving temporary changes before merging with usptream next branch 
added functions that allow the tests to read the scaling factor used by the FFT and the IFFT during acquisition
 2018-09-18 11:36:12 +02:00
Marc Majoral
5b9b63cc77 implemented tracking pull-in tests for the FPGA 
solved a bug in which the SW was using the doppler shift index reported by the HW acquisition accelerator plus one, instead of using the doppler shift index as such.
 2018-09-12 16:02:23 +02:00
Marc Majoral
2b15343a6a started tracking pull-in test implementation for the FPGA 2018-08-29 18:20:41 +02:00
Carles Fernandez
4a2ba1cff0
Improve handling of data types 2018-08-13 00:54:23 +02:00
Carles Fernandez
05a1806c8f
Merge branch 'fpga' of https://github.com/mmajoral/gnss-sdr into merge-marc 2018-08-11 12:56:52 +02:00
Carles Fernandez
4404516289
Add more extensive use of cstdint typenames 2018-08-11 11:42:07 +02:00
Marc Majoral
f14ad930d5 declared the 64-bit variables as long long ints instead of long ints in the FPGA related files. 
Variables declared as long ints are interpreted as 32-bit variables in the ARM architecture and 64-bit variables in the X86-64 architecture.
 2018-08-10 16:42:53 +02:00
Marc Majoral
b1524a3afe implemented 64-bit global sample counter 
started programming the FPGA tracking unit tests
 2018-08-10 13:12:06 +02:00
Marc Majoral
b1a7031e52 solved some bugs in GPS L5 
removed check for sign in multicorrelator results: this is not necessary anymore
did some other minor maintenances
 2018-08-07 18:56:54 +02:00
Marc Majoral
7e246dea29 Merge branch 'next' of https://github.com/gnss-sdr/gnss-sdr into fpga 2018-08-01 18:59:40 +02:00
Marc Majoral
bb33faea21 improved existing code 
started the GPS L2 FPGA class implementation (not finished yet)
implemented the GPS L5 FPGA class (not tested yet)
implemented the Galileo E5 FPGA class (not tested yet)

The code is still "dirty": it is yet to be cleaned of debug comments/code and any possible redundant code and not used variables.
 2018-08-01 15:55:40 +02:00
Carles Fernandez
ee90b739b5
Add coherent integration for GPS L2C, L5 and Galileo E1 2018-07-15 04:12:20 +02:00
Carles Fernandez
0352108a79
Accept non-integer number of samples per code period 2018-07-13 14:23:14 +02:00
Carles Fernandez
6b67037fed Add first-to-second peak statistic 2018-07-09 17:56:47 +02:00
Carles Fernandez
895f8dc75a
Expose the blocking_on_standby parameter to the documentation. Useful for unit testing 2018-06-29 13:39:17 +02:00
Javier Arribas
b0eb9f3aac Adding a parameter to allow the acquisition engine to block the samples flow in stanby mode, very useful in unit testing (disabled by default) 2018-06-28 17:39:37 +02:00
Carles Fernandez
559a9a7c43
Fix problem caused by hdf5 when saving concurrently 
Only one acquisition channel info is stored in dump file if dump is activated. New configuration parameter dump_channel, set to 0 by default.
Name of Matlab variable changed from gird to acq_grid to not overlap Matlab command.
 2018-06-24 11:05:58 +02:00
Carles Fernandez
df667b8432 Fix constructor 2018-06-19 14:56:40 +02:00
Carles Fernandez
423176de7b Replace acq configuration struct by a class 2018-06-19 12:59:54 +02:00
Carles Fernandez
ebd8b46e51 Remove if parameter from Acquisition and Tracking blocks 2018-06-06 17:25:03 +02:00
Carles Fernandez
0d60d97c24
Use https instead of http in links when available 
Update copyright year in headers
 2018-05-13 22:49:11 +02:00
Carles Fernandez
0494d9b5a8
Avoid claah between volk and volk_gnsssdr defines 2018-04-30 20:58:53 +02:00
mmajoral
4433c0c6be Minor code cleaning. 2018-04-30 11:59:56 +02:00
mmajoral
512bf3f4cf Created a generic gnuradio block acquisition class for the FPGA. 2018-04-27 20:00:50 +02:00
Javier Arribas
8e59a42ae2 Merge Next with FPGA. Adding software-defined emulation of the sample counter 2018-04-06 17:03:20 +02:00
Carles Fernandez
aefcb8dac1 Replace C-style cast by C++ style 2018-03-28 16:04:00 +02:00
Carles Fernandez
040204d23a Cleaning 2018-03-28 15:20:01 +02:00
Carles Fernandez
0400034d14 Fix typos detected by codespell 2018-03-25 19:47:28 +02:00
Carles Fernandez
34f24562cf Apply automated code formatting 
Documented at .clang-format
See http://clang.llvm.org/docs/ClangFormat.html and http://clang.llvm.org/docs/ClangFormatStyleOptions.html
 2018-03-03 02:03:39 +01:00
Javier Arribas
288dd481e7 Updating FPGA acquisition modules 2018-03-02 12:23:10 +01:00
Carles Fernandez
eecfd10875 Replace C-style casts by C++ casts 2017-08-19 20:05:52 +02:00
Carles Fernandez
61f8df3586 Replace some C-style cast by static_cast<>() 
See https://stackoverflow.com/questions/1609163/what-is-the-difference-between-static-cast-and-c-style-casting
 2017-08-18 12:45:47 +02:00
Carles Fernandez
9bfef0e05a Fix CMake scripts to use Ninja https://ninja-build.org/ 
cmake -DCMAKE_CXX_COMPILER=clang++ -DCMAKE_C_COMPILER=clang -GNinja .. && ninja
 2017-06-21 08:54:47 +02:00
mmajoral
9a7bd7ffb4 adopted code style + did some code refactoring 2017-06-08 17:29:45 +02:00
mmajoral
b89f718f20 updated checklists and removed a debug printout 2017-05-31 10:08:34 +02:00
mmajoral
90ac5938dc all the class elements are initialized in the constructor 2017-05-24 10:03:58 +02:00
mmajoral
cbe20c0920 refactoring code 2017-05-18 17:10:28 +02:00
Carles Fernandez
76c3f7b3b5 Remove blank lines 2017-05-09 11:47:37 +02:00
Carles Fernandez
74f08ede2f Remove some warnings 2017-05-08 23:03:42 +02:00
mmajoral
de2043ca00 cleaned the acquisition code that runs in the Zynq SoC, cleaned some tracking files that run in the Zynq SoC as well. 2017-05-08 17:03:27 +02:00
mmajoral
28058000de set up the receiver to work with the FPGA 2017-05-05 17:08:49 +02:00
mmajoral
9195740d8a acquisition gps unit test for the FPGA. The code is currently being cleaned 2017-05-05 16:14:27 +02:00