mirror of
https://github.com/gnss-sdr/gnss-sdr
synced 2025-01-06 07:20:34 +00:00
Remove some warnings
This commit is contained in:
Carles Fernandez
parent
9fef3fbfe9
commit
74f08ede2f
@ -73,51 +73,51 @@
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#define MAX_PHASE_STEP_RAD 0.999999999534339 // 1 - pow(2,-31);
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bool gps_fpga_acquisition_8sc::init(unsigned int fft_size, unsigned int nsamples_total, long freq, unsigned int doppler_max, unsigned int doppler_step, int num_doppler_bins, long fs_in, unsigned select_queue)
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{
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float phase_step_rad_fpga;
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bool gps_fpga_acquisition_8sc::init(unsigned int fft_size, unsigned int nsamples_total, long freq, unsigned int doppler_max, unsigned int doppler_step, int num_doppler_bins, long fs_in, unsigned select_queue)
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{
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float phase_step_rad_fpga;
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d_phase_step_rad_vector = new float[num_doppler_bins];
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d_phase_step_rad_vector = new float[num_doppler_bins];
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for (int doppler_index = 0; doppler_index < num_doppler_bins; doppler_index++)
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{
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int doppler = -static_cast<int>(doppler_max) + doppler_step * doppler_index;
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float phase_step_rad = GPS_TWO_PI * (freq + doppler) / static_cast<float>(fs_in);
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// The doppler step can never be outside the range -pi to +pi, otherwise there would be aliasing
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// The FPGA expects phase_step_rad between -1 (-pi) to +1 (+pi)
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// The FPGA also expects the phase to be negative since it produces cos(x) -j*sin(x)
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// while the gnss-sdr software (volk_gnsssdr_s32f_sincos_32fc) generates cos(x) + j*sin(x)
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phase_step_rad_fpga = phase_step_rad/(GPS_TWO_PI/2);
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// avoid saturation of the fixed point representation in the fpga
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// (only the positive value can saturate due to the 2's complement representation)
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if (phase_step_rad_fpga == 1.0)
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{
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phase_step_rad_fpga = MAX_PHASE_STEP_RAD;
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}
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d_phase_step_rad_vector[doppler_index] = phase_step_rad_fpga;
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for (int doppler_index = 0; doppler_index < num_doppler_bins; doppler_index++)
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{
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int doppler = -static_cast<int>(doppler_max) + doppler_step * doppler_index;
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float phase_step_rad = GPS_TWO_PI * (freq + doppler) / static_cast<float>(fs_in);
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// The doppler step can never be outside the range -pi to +pi, otherwise there would be aliasing
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// The FPGA expects phase_step_rad between -1 (-pi) to +1 (+pi)
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// The FPGA also expects the phase to be negative since it produces cos(x) -j*sin(x)
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// while the gnss-sdr software (volk_gnsssdr_s32f_sincos_32fc) generates cos(x) + j*sin(x)
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phase_step_rad_fpga = phase_step_rad/(GPS_TWO_PI/2);
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// avoid saturation of the fixed point representation in the fpga
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// (only the positive value can saturate due to the 2's complement representation)
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if (phase_step_rad_fpga == 1.0)
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{
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phase_step_rad_fpga = MAX_PHASE_STEP_RAD;
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}
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d_phase_step_rad_vector[doppler_index] = phase_step_rad_fpga;
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}
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}
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// sanity check : check test register
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unsigned writeval = 0x55AA;
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unsigned readval;
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readval = gps_fpga_acquisition_8sc::fpga_acquisition_test_register(writeval);
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if (writeval != readval)
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{
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printf("test register fail\n");
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LOG(WARNING) << "Acquisition test register sanity check failed";
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}
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else
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{
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printf("test register success\n");
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LOG(INFO) << "Acquisition test register sanity check success !";
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}
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// sanity check : check test register
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unsigned writeval = 0x55AA;
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unsigned readval;
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readval = gps_fpga_acquisition_8sc::fpga_acquisition_test_register(writeval);
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if (writeval != readval)
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{
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printf("test register fail\n");
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LOG(WARNING) << "Acquisition test register sanity check failed";
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}
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else
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{
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printf("test register success\n");
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LOG(INFO) << "Acquisition test register sanity check success !";
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}
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d_nsamples = fft_size;
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d_nsamples_total = nsamples_total;
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d_select_queue = select_queue;
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d_nsamples = fft_size;
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d_nsamples_total = nsamples_total;
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d_select_queue = select_queue;
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gps_fpga_acquisition_8sc::configure_acquisition();
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gps_fpga_acquisition_8sc::configure_acquisition();
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return true;
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}
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@ -126,28 +126,28 @@
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bool gps_fpga_acquisition_8sc::set_local_code(gr_complex* fft_codes)
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{
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unsigned int i;
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float max = 0;
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d_fft_codes = new lv_16sc_t[d_nsamples_total];
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unsigned int i;
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float max = 0;
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d_fft_codes = new lv_16sc_t[d_nsamples_total];
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for (i=0;i<d_nsamples_total;i++)
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{
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if(abs(fft_codes[i].real()) > max)
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{
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max = abs(fft_codes[i].real());
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}
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if(abs(fft_codes[i].imag()) > max)
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{
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max = abs(fft_codes[i].imag());
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}
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}
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for (i=0;i<d_nsamples_total;i++)
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{
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if(std::abs(fft_codes[i].real()) > max)
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{
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max = std::abs(fft_codes[i].real());
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}
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if(std::abs(fft_codes[i].imag()) > max)
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{
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max = std::abs(fft_codes[i].imag());
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}
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}
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for (i=0;i<d_nsamples_total;i++)
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{
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d_fft_codes[i] = lv_16sc_t((int) (fft_codes[i].real()*(pow(2,7) - 1)/max), (int) (fft_codes[i].imag()*(pow(2,7) - 1)/max));
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}
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for (i=0;i<d_nsamples_total;i++)
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{
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d_fft_codes[i] = lv_16sc_t((int) (fft_codes[i].real()*(pow(2,7) - 1)/max), (int) (fft_codes[i].imag()*(pow(2,7) - 1)/max));
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}
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gps_fpga_acquisition_8sc::fpga_configure_acquisition_local_code(d_fft_codes);
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gps_fpga_acquisition_8sc::fpga_configure_acquisition_local_code(d_fft_codes);
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return true;
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}
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@ -156,8 +156,6 @@ bool gps_fpga_acquisition_8sc::set_local_code(gr_complex* fft_codes)
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gps_fpga_acquisition_8sc::gps_fpga_acquisition_8sc()
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{
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if ((d_fd = open(d_device_io_name, O_RDWR | O_SYNC )) == -1)
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{
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LOG(WARNING) << "Cannot open deviceio" << d_device_io_name;
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@ -168,17 +166,16 @@ gps_fpga_acquisition_8sc::gps_fpga_acquisition_8sc()
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{
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LOG(WARNING) << "Cannot map the FPGA acquisition module into user memory";
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}
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}
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gps_fpga_acquisition_8sc::~gps_fpga_acquisition_8sc()
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{
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if (munmap((void*)d_map_base, PAGE_SIZE) == -1)
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{
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printf("Failed to unmap memory uio\n");
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}
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if (munmap((void*)d_map_base, PAGE_SIZE) == -1)
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{
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printf("Failed to unmap memory uio\n");
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}
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close(d_fd);
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@ -187,16 +184,16 @@ gps_fpga_acquisition_8sc::~gps_fpga_acquisition_8sc()
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bool gps_fpga_acquisition_8sc::free()
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{
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if (d_fft_codes != nullptr)
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{
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delete [] d_fft_codes;
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d_fft_codes = nullptr;
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}
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if (d_phase_step_rad_vector != nullptr)
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{
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delete [] d_phase_step_rad_vector;
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d_phase_step_rad_vector = nullptr;
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}
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if (d_fft_codes != nullptr)
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{
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delete [] d_fft_codes;
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d_fft_codes = nullptr;
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}
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if (d_phase_step_rad_vector != nullptr)
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{
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delete [] d_phase_step_rad_vector;
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d_phase_step_rad_vector = nullptr;
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}
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return true;
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}
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@ -204,43 +201,43 @@ bool gps_fpga_acquisition_8sc::free()
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unsigned gps_fpga_acquisition_8sc::fpga_acquisition_test_register(unsigned writeval)
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{
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unsigned readval;
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// write value to test register
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d_map_base[15] = writeval;
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// read value from test register
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readval = d_map_base[15];
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// return read value
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return readval;
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unsigned readval;
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// write value to test register
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d_map_base[15] = writeval;
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// read value from test register
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readval = d_map_base[15];
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// return read value
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return readval;
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}
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void gps_fpga_acquisition_8sc::fpga_configure_acquisition_local_code(lv_16sc_t fft_local_code[])
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{
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short int local_code;
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unsigned int k, tmp, tmp2;
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short int local_code;
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unsigned int k, tmp, tmp2;
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// clear memory address counter
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d_map_base[4] = 0x10000000;
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for (k = 0; k < d_nsamples_total; k++)
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{
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tmp = fft_local_code[k].real();
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tmp2 = fft_local_code[k].imag();
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local_code = (tmp & 0xFF) | ((tmp2*256) & 0xFF00); // put together the real part and the imaginary part
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d_map_base[4] = 0x0C000000 | (local_code & 0xFFFF);
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}
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// clear memory address counter
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d_map_base[4] = 0x10000000;
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for (k = 0; k < d_nsamples_total; k++)
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{
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tmp = fft_local_code[k].real();
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tmp2 = fft_local_code[k].imag();
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local_code = (tmp & 0xFF) | ((tmp2*256) & 0xFF00); // put together the real part and the imaginary part
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d_map_base[4] = 0x0C000000 | (local_code & 0xFFFF);
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}
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}
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void gps_fpga_acquisition_8sc::run_acquisition(void)
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{
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// enable interrupts
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int reenable = 1;
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write(d_fd, (void *)&reenable, sizeof(int));
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// enable interrupts
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int reenable = 1;
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write(d_fd, (void *)&reenable, sizeof(int));
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d_map_base[5] = 0; // writing anything to reg 4 launches the acquisition process
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d_map_base[5] = 0; // writing anything to reg 4 launches the acquisition process
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int irq_count;
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int irq_count;
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ssize_t nb;
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// wait for interrupt
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nb=read(d_fd, &irq_count, sizeof(irq_count));
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@ -250,8 +247,6 @@ void gps_fpga_acquisition_8sc::run_acquisition(void)
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printf("Tracking_module Interrupt number %d\n", irq_count);
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}
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}
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@ -260,51 +255,51 @@ void gps_fpga_acquisition_8sc::run_acquisition(void)
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void gps_fpga_acquisition_8sc::configure_acquisition()
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{
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d_map_base[0] = d_select_queue;
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d_map_base[1] = d_nsamples_total;
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d_map_base[2] = d_nsamples;
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d_map_base[0] = d_select_queue;
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d_map_base[1] = d_nsamples_total;
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d_map_base[2] = d_nsamples;
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}
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void gps_fpga_acquisition_8sc::set_phase_step(unsigned int doppler_index)
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{
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float phase_step_rad_real;
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float phase_step_rad_int_temp;
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int32_t phase_step_rad_int;
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float phase_step_rad_real;
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float phase_step_rad_int_temp;
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int32_t phase_step_rad_int;
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phase_step_rad_real = d_phase_step_rad_vector[doppler_index];
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phase_step_rad_real = d_phase_step_rad_vector[doppler_index];
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phase_step_rad_int_temp = phase_step_rad_real*4; // * 2^2
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phase_step_rad_int = (int32_t) (phase_step_rad_int_temp*(536870912)); // * 2^29 (in total it makes x2^31 in two steps to avoid the warnings
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d_map_base[3] = phase_step_rad_int;
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phase_step_rad_int_temp = phase_step_rad_real*4; // * 2^2
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phase_step_rad_int = (int32_t) (phase_step_rad_int_temp*(536870912)); // * 2^29 (in total it makes x2^31 in two steps to avoid the warnings
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d_map_base[3] = phase_step_rad_int;
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}
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void gps_fpga_acquisition_8sc::read_acquisition_results(uint32_t* max_index, float* max_magnitude, unsigned *initial_sample, float *power_sum)
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{
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unsigned readval = 0;
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readval = d_map_base[0];
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readval = d_map_base[1];
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*initial_sample = readval;
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readval = d_map_base[2];
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*max_magnitude = (float) readval;
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readval = d_map_base[4];
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*power_sum = (float) readval;
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readval = d_map_base[3];
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*max_index = readval;
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unsigned readval = 0;
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readval = d_map_base[0];
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readval = d_map_base[1];
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*initial_sample = readval;
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readval = d_map_base[2];
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*max_magnitude = (float) readval;
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readval = d_map_base[4];
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*power_sum = (float) readval;
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readval = d_map_base[3];
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*max_index = readval;
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}
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void gps_fpga_acquisition_8sc::block_samples()
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{
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d_map_base[14] = 1; // block the samples
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d_map_base[14] = 1; // block the samples
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}
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void gps_fpga_acquisition_8sc::unblock_samples()
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{
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d_map_base[14] = 0; // unblock the samples
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d_map_base[14] = 0; // unblock the samples
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}
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