mirrors/gnss-sdr
1
0
Fork 0
mirror of https://github.com/gnss-sdr/gnss-sdr synced 2025-01-20 22:17:03 +00:00
Code Issues Releases Wiki Activity
6,072 Commits 7 Branches 21 Tags 211 MiB
dd996bc2e2
Commit Graph

55 Commits

Author SHA1 Message Date
Marc Majoral
c8ccd5ef91 Merge branch 'next' of https://github.com/mmajoral/gnss-sdr into fpga_extended_coherent_integration 2019-07-04 12:55:36 +02:00
Carles Fernandez
081439d6f8 Code cleaning 2019-07-02 17:48:00 +02:00
Marc Majoral
33d1115246 added support for extended coherent integration in the FPGA. The code still needs to be optimized and cleaned. 2019-06-18 18:22:01 +02:00
Marc Majoral
e1d01d3b97 Re-enable uio interrupts manually + do not enable interrupt generation at reset. 2019-05-13 16:30:01 +02:00
Marc Majoral
bf3f66278f closed the acquisition device driver in the proper way + updated fpga block expponent. 2019-04-15 16:39:05 +02:00
Marc Majoral
7a06434928 removed unnecessary function in fpga_acquisition class 2019-04-12 15:16:31 +02:00
Marc Majoral
9f80eaf0ff code cleanup 2019-04-12 11:36:30 +02:00
Marc Majoral
a628ad5906 removed FPGA dummy read 2019-04-12 10:03:57 +02:00
Marc Majoral
91f509abf9 write the code phase rate and the nco phase rate parameters in the FPGA 2019-04-10 11:31:34 +02:00
Marc Majoral
ff024e7292 cleaned unused code and added some comments. 2019-04-04 19:55:02 +02:00
Marc Majoral
5bc7a778e9 commented out the old DLL and PLL filters in the tracking modules + removed some old not used code in the acquisition that was already commented out. 2019-04-02 13:10:09 +02:00
Marc Majoral
58a0de006e corrected comment 2019-03-26 16:41:20 +01:00
Marc Majoral
63cee0e63b In order to reduce the CPU workload, the FPGA acquisition does not close and open the device driver in between the first and the second acquisition anymore. 2019-03-26 16:35:19 +01:00
Marc Majoral
cbc8131677 optimized the computation of FPGA acquisition doppler shift and dopper step registers 
removed unnecessary function call
 2019-03-26 16:22:49 +01:00
Marc Majoral
2b46c79ba7 optimized the process of computing and writing the fft of the local code to the acquisition HW accelerator. 
The writing of the local code is still performed by processor instructions in a loop.
THe FPGA L2 classes were updated accordingly.
 2019-03-26 12:26:08 +01:00
Marc Majoral
905a85670c currently optimizing the FPGA-related code 2019-03-25 19:45:54 +01:00
Marc Majoral
e6b661494c moved to 16 bits per local code. 2019-03-20 16:59:32 +01:00
Marc Majoral
6da82535ba Merge branch 'next' of https://github.com/gnss-sdr/gnss-sdr into fpga 2019-03-20 16:35:55 +01:00
Marc Majoral
a24d26f427 set the default sampling frequency of the HW source to 12.5 Msps and the default bandpass bandwidth to 12.5 MHz + other minor changes 2019-03-19 10:14:09 +01:00
Marc Majoral
bef7e42fb9 Merge branch 'next' of https://github.com/gnss-sdr/gnss-sdr into fpga 2019-03-18 19:37:19 +01:00
Carles Fernandez
5b8ab9f591 Improve includes (IWYU) 2019-03-06 13:49:14 +01:00
Marc Majoral
5a2dc274cf but solved: double acquisition was using uint32_t for the initial doppler estimation. Therefore when the first estimated doppler was negative it was reset to zero. 2019-03-01 20:37:14 +01:00
Carles Fernandez
e43b8f5284
Fix defects detected by Coverity Scan 2019-03-01 15:29:43 +01:00
Carles Fernandez
df0a77ee0d
Fix warnings 
more protection on read/write failures and some code cleaning
 2019-03-01 10:11:36 +01:00
Carles Fernandez
7c71ed9404
Merge branch 'fpga' of https://github.com/gnss-sdr/gnss-sdr into merge-fpga 
Applied checks and formatting
 2019-02-28 21:45:30 +01:00
Marc Majoral
ea86546d99 implemented double acquisition for the FPGA 2019-02-28 20:49:35 +01:00
Marc Majoral
c32e0b427a coding style + removed some unnecessary memory arrays in the FPGA E5A tracking adapter class. 2019-02-27 17:27:31 +01:00
Marc Majoral
8d770d9be9 more code cleaning 
removed some non used variables
 2019-02-27 13:30:09 +01:00
Marc Majoral
5e22e4c50a cleaned the FPGA acquisition code 2019-02-26 18:28:14 +01:00
Marc Majoral
f127729eb0 Merge branch 'next' of https://github.com/gnss-sdr/gnss-sdr into fpga 2019-01-25 18:02:07 +01:00
Carles Fernandez
54237770a6
Apply fixes by clang-tidy 2018-12-10 22:59:10 +01:00
Carles Fernandez
3dce8934fd
Apply fixes by clang-tidy 2018-12-10 19:05:12 +01:00
Carles Fernandez
5f79053d65
Sort includes automatically with clang-format 
Order:
1.- Main header
2.- Local headers
3.- Third-party library headers
4.- System headers

each category sorted lexicographically
 2018-12-09 22:00:09 +01:00
Marc Majoral
e436aadfd9 minor modifications to the Galileo E5a and GPS L5 acquisition adapters. Now the acquisition opens and closes the acquisition HW device every time an acquisition is done, to prevent the acquisition interrupt from interrupting all the acquisition processes at the same time. 2018-12-05 11:23:30 +01:00
Marc Majoral
f48a91c413 Galileo E5a is now debugged and working. Acquisition is using interrupts again. Each acquisition process opens and closes the acquisition device when an acquisition is done instead of having the device opened all the time. In this way the acquisition interrupt should only be received by the process that is using the interrupt at that time. 2018-11-30 11:07:01 +01:00
Marc Majoral
7023e879db adapted the software to a bit size for the local copy of the FFT of the GNSS code to 10 bits per sample. 
worked on the observables tests.
 2018-11-13 19:51:12 +01:00
Marc Majoral
f150fe02c7 solved a bug which caused the tracking pull-in test not to work correctly with Galileo E1 when using the downsampling filter in the acquisition. 2018-11-09 20:50:32 +01:00
Marc Majoral
1c80eaa50c corrected a bug in the fpga tracking pull-in test where a parameter was rewritten with an incorrect value 
modified the fpga tracking pull-in test to take into account the downsampling factor in the L1/E1 queue
 2018-11-07 20:21:05 +01:00
Marc Majoral
b5409f0860 updated the SW to run the new Acquisition HW accelerator, which compensates the scaling factors of the FFT and the IFFT, and computes the test statistics out of the peak value and the second peak value resulting from the correlation performed by the acquisition process. Updated the GPS L1 and Galileo E1 acquisition adapters. 2018-10-31 18:48:08 +01:00
Marc Majoral
2826dd21d3 use of the :2 decimator in the GPS L1/Galileo E1 frequency band 
added methods to the L1 and E1 FPGA acquisition classes for the unit tests to be able to control the doppler sweep from the SW instead of the HW. In this way we can produce more detailed results.
 2018-10-04 17:49:09 +02:00
Marc Majoral
f333c05305 saving temporary changes before merging with usptream next branch 
added functions that allow the tests to read the scaling factor used by the FFT and the IFFT during acquisition
 2018-09-18 11:36:12 +02:00
Marc Majoral
5b9b63cc77 implemented tracking pull-in tests for the FPGA 
solved a bug in which the SW was using the doppler shift index reported by the HW acquisition accelerator plus one, instead of using the doppler shift index as such.
 2018-09-12 16:02:23 +02:00
Marc Majoral
2b15343a6a started tracking pull-in test implementation for the FPGA 2018-08-29 18:20:41 +02:00
Carles Fernandez
05a1806c8f
Merge branch 'fpga' of https://github.com/mmajoral/gnss-sdr into merge-marc 2018-08-11 12:56:52 +02:00
Carles Fernandez
4404516289
Add more extensive use of cstdint typenames 2018-08-11 11:42:07 +02:00
Marc Majoral
f14ad930d5 declared the 64-bit variables as long long ints instead of long ints in the FPGA related files. 
Variables declared as long ints are interpreted as 32-bit variables in the ARM architecture and 64-bit variables in the X86-64 architecture.
 2018-08-10 16:42:53 +02:00
Marc Majoral
b1524a3afe implemented 64-bit global sample counter 
started programming the FPGA tracking unit tests
 2018-08-10 13:12:06 +02:00
Marc Majoral
b1a7031e52 solved some bugs in GPS L5 
removed check for sign in multicorrelator results: this is not necessary anymore
did some other minor maintenances
 2018-08-07 18:56:54 +02:00
Marc Majoral
7e246dea29 Merge branch 'next' of https://github.com/gnss-sdr/gnss-sdr into fpga 2018-08-01 18:59:40 +02:00
Marc Majoral
bb33faea21 improved existing code 
started the GPS L2 FPGA class implementation (not finished yet)
implemented the GPS L5 FPGA class (not tested yet)
implemented the Galileo E5 FPGA class (not tested yet)

The code is still "dirty": it is yet to be cleaned of debug comments/code and any possible redundant code and not used variables.
 2018-08-01 15:55:40 +02:00