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Re-enable uio interrupts manually + do not enable interrupt generation at reset.

This commit is contained in:
Marc Majoral 2019-04-25 15:52:23 +02:00 committed by Carles Fernandez
parent 585ecf2a84
commit e1d01d3b97
2 changed files with 9 additions and 23 deletions
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6
src/algorithms/acquisition/libs/fpga_acquisition.cc
View File

@ -53,7 +53,6 @@
#define MEM_LOCAL_CODE_WR_ENABLE 0x0C000000 // command to enable the ENA and WR pins of the internal memory of the multicorrelator
#define POW_2_2 4 // 2^2 (used for the conversion of floating point numbers to integers)
#define POW_2_31 2147483648 // 2^31 (used for the conversion of floating point numbers to integers)
#define ENABLE_INT_ON_RESET 2 // flag that causes the acquisition to trigger an interrupt when it is reset.
#define SELECT_LSBits 0x0000FFFF // Select the 10 LSbits out of a 20-bit word
#define SELECT_MSBbits 0xFFFF0000 // Select the 10 MSbits out of a 20-bit word
@ -304,9 +303,8 @@ void Fpga_Acquisition::close_device()
void Fpga_Acquisition::reset_acquisition(void)
{
d_map_base[8] = RESET_ACQUISITION; // writing a 2 to d_map_base[8] resets the acquisition. This causes a reset of all
// the FPGA HW modules including the multicorrelators
d_map_base[14] = ENABLE_INT_ON_RESET; // enable int on reset
d_map_base[8] = RESET_ACQUISITION; // writing a 2 to d_map_base[8] resets the acquisition. This causes a reset of all
// the FPGA HW modules including the multicorrelators
}

26
src/algorithms/tracking/libs/fpga_multicorrelator.cc
View File

@ -58,8 +58,6 @@
#define LOCAL_CODE_FPGA_CLEAR_ADDRESS_COUNTER 0x10000000
#define LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY 0x0C000000
#define TEST_REGISTER_TRACK_WRITEVAL 0x55AA
//#define ENABLE_TRK_INT_ON_RESET 1 /* flag that causes the tracking HW accelerator to trigger an interrupt when it is reset. It is used \
// to avoid a potential deadlock caused by the SW waiting for an interrupt from the FPGA when the HW is reset */
#ifndef TEMP_FAILURE_RETRY
#define TEMP_FAILURE_RETRY(exp) \
({ \
@ -283,16 +281,6 @@ void Fpga_Multicorrelator_8sc::set_channel(uint32_t channel)
{
LOG(INFO) << "Test register sanity check success !";
}
//d_map_base[INT_ON_RST_REG_ADDR] = ENABLE_TRK_INT_ON_RESET; // enable interrupts on reset to prevent deadlock
// enable interrupts
int32_t reenable = 1;
ssize_t nbytes = TEMP_FAILURE_RETRY(write(d_device_descriptor, reinterpret_cast<void *>(&reenable), sizeof(int32_t)));
if (nbytes != sizeof(int32_t))
{
std::cerr << "Error launching the FPGA multicorrelator" << std::endl;
}
}
@ -434,13 +422,13 @@ void Fpga_Multicorrelator_8sc::fpga_configure_signal_parameters_in_fpga(void)
void Fpga_Multicorrelator_8sc::fpga_launch_multicorrelator_fpga(void)
{
// // enable interrupts
// int32_t reenable = 1;
// ssize_t nbytes = TEMP_FAILURE_RETRY(write(d_device_descriptor, reinterpret_cast<void *>(&reenable), sizeof(int32_t)));
// if (nbytes != sizeof(int32_t))
// {
// std::cerr << "Error launching the FPGA multicorrelator" << std::endl;
// }
// enable interrupts
int32_t reenable = 1;
ssize_t nbytes = TEMP_FAILURE_RETRY(write(d_device_descriptor, reinterpret_cast<void *>(&reenable), sizeof(int32_t)));
if (nbytes != sizeof(int32_t))
{
std::cerr << "Error launching the FPGA multicorrelator" << std::endl;
}
// writing 1 to reg 14 launches the tracking
d_map_base[START_FLAG_ADDR] = 1;
}