mirror of
https://github.com/gnss-sdr/gnss-sdr
synced 2024-12-15 04:30:33 +00:00
code cleanup
This commit is contained in:
Marc Majoral
parent
a628ad5906
commit
9f80eaf0ff
@ -53,9 +53,7 @@
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#define MEM_LOCAL_CODE_WR_ENABLE 0x0C000000 // command to enable the ENA and WR pins of the internal memory of the multicorrelator
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#define POW_2_2 4 // 2^2 (used for the conversion of floating point numbers to integers)
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#define POW_2_31 2147483648 // 2^31 (used for the conversion of floating point numbers to integers)
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#define ENABLE_INT_ON_RESET 2 // flag that causes the acquisition to trigger an interrupt when it is reset. It is used \
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// to avoid a potential deadlock caused by the SW waiting for an interrupt from the FPGA when the \
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// HW is reset
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#define ENABLE_INT_ON_RESET 2 // flag that causes the acquisition to trigger an interrupt when it is reset.
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#define SELECT_LSBits 0x0000FFFF // Select the 10 LSbits out of a 20-bit word
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#define SELECT_MSBbits 0xFFFF0000 // Select the 10 MSbits out of a 20-bit word
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@ -259,30 +257,30 @@ void Fpga_Acquisition::read_acquisition_results(uint32_t *max_index,
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uint64_t readval_long = 0;
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uint64_t readval_long_shifted = 0;
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readval = d_map_base[1];
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readval = d_map_base[1]; // read sample counter (LSW)
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initial_sample_tmp = readval;
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readval_long = d_map_base[2];
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readval_long = d_map_base[2]; // read sample counter (MSW)
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readval_long_shifted = readval_long << 32; // 2^32
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initial_sample_tmp = initial_sample_tmp + readval_long_shifted; // 2^32
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*initial_sample = initial_sample_tmp;
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readval = d_map_base[3];
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readval = d_map_base[3]; // read first peak value
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*firstpeak = static_cast<float>(readval);
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readval = d_map_base[4];
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readval = d_map_base[4]; // read second peak value
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*secondpeak = static_cast<float>(readval);
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readval = d_map_base[5];
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readval = d_map_base[5]; // read max index position
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*max_index = readval;
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*power_sum = 0;
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*power_sum = 0; // power sum is not used
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readval = d_map_base[7]; // read doppler index -- this read releases the interrupt line
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*doppler_index = readval;
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readval = d_map_base[8];
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readval = d_map_base[8]; // read FFT block exponent
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*total_blk_exp = readval;
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}
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@ -53,7 +53,6 @@
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#include <pmt/pmt_sugar.h> // for mp
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#include <volk_gnsssdr/volk_gnsssdr.h>
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#include <algorithm>
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//#include <chrono>
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#include <cmath>
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#include <complex>
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#include <cstdlib> // for abs, size_t
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@ -1264,8 +1263,6 @@ void dll_pll_veml_tracking_fpga::set_gnss_synchro(Gnss_Synchro *p_gnss_synchro)
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d_acquisition_gnss_synchro = p_gnss_synchro;
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if (p_gnss_synchro->PRN > 0)
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{
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//std::cout << "Acquisition is about to start " << std::endl;
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// When using the FPGA the SW only reads the sample counter during active tracking in order to spare CPU clock cycles.
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d_sample_counter = 0;
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d_sample_counter_next = 0;
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@ -1383,7 +1380,6 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
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*out[0] = *d_acquisition_gnss_synchro;
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usleep(1000);
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return 1;
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//break;
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}
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case 1: // Pull-in
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{
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@ -1422,16 +1418,15 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
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current_synchro_data.Tracking_sample_counter = absolute_samples_offset;
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d_sample_counter_next = d_sample_counter;
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// Doppler effect Fd = (C / (C + Vr)) * F
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double radial_velocity = (d_signal_carrier_freq + d_acq_carrier_doppler_hz) / d_signal_carrier_freq;
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// new chip and PRN sequence periods based on acq Doppler
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d_code_freq_chips = radial_velocity * d_code_chip_rate;
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d_code_phase_step_chips = d_code_freq_chips / trk_parameters.fs_in;
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d_code_phase_rate_step_chips = 0.0;
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double T_chip_mod_seconds = 1.0 / d_code_freq_chips;
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double T_prn_mod_seconds = T_chip_mod_seconds * static_cast<double>(d_code_length_chips);
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double T_prn_mod_samples = T_prn_mod_seconds * trk_parameters.fs_in;
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//double T_chip_mod_seconds = 1.0 / d_code_freq_chips;
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//double T_prn_mod_seconds = T_chip_mod_seconds * static_cast<double>(d_code_length_chips);
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//double T_prn_mod_samples = T_prn_mod_seconds * trk_parameters.fs_in;
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d_acq_code_phase_samples = absolute_samples_offset;
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@ -1452,28 +1447,18 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
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DLOG(INFO) << "PULL-IN Doppler [Hz] = " << d_carrier_doppler_hz
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<< ". PULL-IN Code Phase [samples] = " << d_acq_code_phase_samples;
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// don't leave the HW module blocking the signal path before the first sample arrives
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// start the first tracking process
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//run_state_2(current_synchro_data);
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*out[0] = *d_acquisition_gnss_synchro;
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return 1;
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//break;
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}
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case 2: // Wide tracking and symbol synchronization
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{
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d_sample_counter = d_sample_counter_next;
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d_sample_counter_next = d_sample_counter + static_cast<uint64_t>(d_current_prn_length_samples);
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// auto start = std::chrono::system_clock::now();
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do_correlation_step();
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// auto end = std::chrono::system_clock::now();
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// std::chrono::duration<double> elapsed_seconds = end - start;
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// std::cout << "elapsed time 0: " << elapsed_seconds.count() << "s\n";
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// Save single correlation step variables
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// start = std::chrono::system_clock::now();
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if (d_veml)
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{
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d_VE_accu = *d_Very_Early;
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@ -1483,14 +1468,8 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
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d_P_accu = *d_Prompt;
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d_L_accu = *d_Late;
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// end = std::chrono::system_clock::now();
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// elapsed_seconds = end - start;
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// std::cout << "elapsed time 1: " << elapsed_seconds.count() << "s\n";
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// Check lock status
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// start = std::chrono::system_clock::now();
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if (!cn0_and_tracking_lock_status(d_code_period))
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{
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clear_tracking_vars();
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@ -1498,64 +1477,26 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
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}
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else
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{
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// end = std::chrono::system_clock::now();
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// elapsed_seconds = end - start;
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// std::cout << "elapsed time 2: " << elapsed_seconds.count() << "s\n";
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bool next_state = false;
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// Perform DLL/PLL tracking loop computations. Costas Loop enabled
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// start = std::chrono::system_clock::now();
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run_dll_pll();
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// end = std::chrono::system_clock::now();
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// elapsed_seconds = end - start;
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// std::cout << "elapsed time 3: " << elapsed_seconds.count() << "s\n";
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// start = std::chrono::system_clock::now();
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update_tracking_vars();
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// end = std::chrono::system_clock::now();
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// elapsed_seconds = end - start;
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// std::cout << "elapsed time 4: " << elapsed_seconds.count() << "s\n";
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// enable write dump file this cycle (valid DLL/PLL cycle)
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// start = std::chrono::system_clock::now();
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log_data(false);
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// end = std::chrono::system_clock::now();
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// elapsed_seconds = end - start;
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// std::cout << "elapsed time 5: " << elapsed_seconds.count() << "s\n";
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if (d_secondary)
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{
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// start = std::chrono::system_clock::now();
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// ####### SECONDARY CODE LOCK #####
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d_Prompt_circular_buffer.push_back(*d_Prompt);
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// end = std::chrono::system_clock::now();
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// elapsed_seconds = end - start;
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// std::cout << "elapsed time 6: " << elapsed_seconds.count() << "s\n";
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//d_Prompt_buffer_deque.push_back(*d_Prompt);
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//if (d_Prompt_buffer_deque.size() == d_secondary_code_length)
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if (d_Prompt_circular_buffer.size() == d_secondary_code_length)
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{
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// start = std::chrono::system_clock::now();
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next_state = acquire_secondary();
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// end = std::chrono::system_clock::now();
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// elapsed_seconds = end - start;
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// std::cout << "elapsed time 7: " << elapsed_seconds.count() << "s\n";
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// start = std::chrono::system_clock::now();
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if (next_state)
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{
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LOG(INFO) << systemName << " " << signal_pretty_name << " secondary code locked in channel " << d_channel
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@ -1563,38 +1504,18 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
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std::cout << systemName << " " << signal_pretty_name << " secondary code locked in channel " << d_channel
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<< " for satellite " << Gnss_Satellite(systemName, d_acquisition_gnss_synchro->PRN) << std::endl;
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}
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// end = std::chrono::system_clock::now();
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// elapsed_seconds = end - start;
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// std::cout << "elapsed time 8: " << elapsed_seconds.count() << "s\n";
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//d_Prompt_buffer_deque.pop_front();
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}
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}
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else if (d_symbols_per_bit > 1) //Signal does not have secondary code. Search a bit transition by sign change
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{
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// start = std::chrono::system_clock::now();
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float current_tracking_time_s = static_cast<float>(d_sample_counter - d_absolute_samples_offset) / trk_parameters.fs_in;
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// end = std::chrono::system_clock::now();
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// elapsed_seconds = end - start;
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// std::cout << "elapsed time 6b: " << elapsed_seconds.count() << "s\n";
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if (current_tracking_time_s > 10)
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{
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// start = std::chrono::system_clock::now();
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d_symbol_history.push_back(d_Prompt->real());
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// end = std::chrono::system_clock::now();
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// elapsed_seconds = end - start;
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// std::cout << "elapsed time 7b: " << elapsed_seconds.count() << "s\n";
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//******* preamble correlation ********
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// start = std::chrono::system_clock::now();
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int32_t corr_value = 0;
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if ((static_cast<int32_t>(d_symbol_history.size()) == d_preamble_length_symbols)) // and (d_make_correlation or !d_flag_frame_sync))
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{
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@ -1613,12 +1534,6 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
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}
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}
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// end = std::chrono::system_clock::now();
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// elapsed_seconds = end - start;
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// std::cout << "elapsed time 8b: " << elapsed_seconds.count() << "s\n";
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// start = std::chrono::system_clock::now();
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if (corr_value == d_preamble_length_symbols)
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{
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LOG(INFO) << systemName << " " << signal_pretty_name << " tracking preamble detected in channel " << d_channel
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@ -1629,10 +1544,6 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
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{
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next_state = false;
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}
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// end = std::chrono::system_clock::now();
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// elapsed_seconds = end - start;
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// std::cout << "elapsed time 9b: " << elapsed_seconds.count() << "s\n";
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}
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else
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{
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@ -1644,8 +1555,6 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
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next_state = true;
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}
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// start = std::chrono::system_clock::now();
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// ########### Output the tracking results to Telemetry block ##########
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if (interchange_iq)
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{
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@ -1683,10 +1592,6 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
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current_synchro_data.Flag_valid_symbol_output = true;
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current_synchro_data.correlation_length_ms = d_correlation_length_ms;
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// end = std::chrono::system_clock::now();
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// elapsed_seconds = end - start;
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// std::cout << "elapsed time 10: " << elapsed_seconds.count() << "s\n";
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if (next_state)
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{ // reset extended correlator
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d_VE_accu = gr_complex(0.0, 0.0);
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@ -1696,7 +1601,6 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
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d_VL_accu = gr_complex(0.0, 0.0);
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d_Prompt_circular_buffer.clear();
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d_current_symbol = 0;
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//d_Prompt_buffer_deque.clear();
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if (d_enable_extended_integration)
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{
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@ -1743,6 +1647,7 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
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// Fill the acquisition data
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current_synchro_data = *d_acquisition_gnss_synchro;
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// perform a correlation step
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do_correlation_step();
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update_tracking_vars();
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@ -1873,185 +1778,3 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
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}
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return 0;
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}
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//void dll_pll_veml_tracking_fpga::run_state_2(Gnss_Synchro ¤t_synchro_data)
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//{
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// d_sample_counter = d_sample_counter_next;
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// d_sample_counter_next = d_sample_counter + static_cast<uint64_t>(d_current_prn_length_samples);
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//
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// do_correlation_step();
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// // Save single correlation step variables
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// if (d_veml)
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// {
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// d_VE_accu = *d_Very_Early;
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// d_VL_accu = *d_Very_Late;
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// }
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// d_E_accu = *d_Early;
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// d_P_accu = *d_Prompt;
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// d_L_accu = *d_Late;
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//
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// // Check lock status
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// if (!cn0_and_tracking_lock_status(d_code_period))
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// {
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// clear_tracking_vars();
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// d_state = 0; // loss-of-lock detected
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// }
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// else
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// {
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// bool next_state = false;
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// // Perform DLL/PLL tracking loop computations. Costas Loop enabled
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// run_dll_pll();
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// update_tracking_vars();
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//
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// // enable write dump file this cycle (valid DLL/PLL cycle)
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// log_data(false);
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// if (d_secondary)
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// {
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// // ####### SECONDARY CODE LOCK #####
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// d_Prompt_circular_buffer.push_back(*d_Prompt);
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// //d_Prompt_buffer_deque.push_back(*d_Prompt);
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// //if (d_Prompt_buffer_deque.size() == d_secondary_code_length)
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// if (d_Prompt_circular_buffer.size() == d_secondary_code_length)
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// {
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// next_state = acquire_secondary();
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// if (next_state)
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// {
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// LOG(INFO) << systemName << " " << signal_pretty_name << " secondary code locked in channel " << d_channel
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// << " for satellite " << Gnss_Satellite(systemName, d_acquisition_gnss_synchro->PRN) << std::endl;
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// std::cout << systemName << " " << signal_pretty_name << " secondary code locked in channel " << d_channel
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// << " for satellite " << Gnss_Satellite(systemName, d_acquisition_gnss_synchro->PRN) << std::endl;
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// }
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// //d_Prompt_buffer_deque.pop_front();
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// }
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// }
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// else if (d_symbols_per_bit > 1) //Signal does not have secondary code. Search a bit transition by sign change
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// {
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// float current_tracking_time_s = static_cast<float>(d_sample_counter - d_absolute_samples_offset) / trk_parameters.fs_in;
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// if (current_tracking_time_s > 10)
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// {
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// d_symbol_history.push_back(d_Prompt->real());
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// //******* preamble correlation ********
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// int32_t corr_value = 0;
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// if ((d_symbol_history.size() == GPS_CA_PREAMBLE_LENGTH_SYMBOLS)) // and (d_make_correlation or !d_flag_frame_sync))
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// {
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// int i = 0;
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// for (const auto &iter : d_symbol_history)
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// {
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// if (iter < 0.0) // symbols clipping
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// {
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// corr_value -= d_preambles_symbols[i];
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// }
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// else
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// {
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// corr_value += d_preambles_symbols[i];
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// }
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// i++;
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// }
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// }
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// if (corr_value == GPS_CA_PREAMBLE_LENGTH_SYMBOLS)
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// {
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// LOG(INFO) << systemName << " " << signal_pretty_name << " tracking preamble detected in channel " << d_channel
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// << " for satellite " << Gnss_Satellite(systemName, d_acquisition_gnss_synchro->PRN) << std::endl;
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// next_state = true;
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// }
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// else
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// {
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// next_state = false;
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// }
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// }
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// else
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// {
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// next_state = false;
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// }
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// }
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// else
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// {
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// next_state = true;
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// }
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//
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// // ########### Output the tracking results to Telemetry block ##########
|
||||
// if (interchange_iq)
|
||||
// {
|
||||
// if (trk_parameters.track_pilot)
|
||||
// {
|
||||
// // Note that data and pilot components are in quadrature. I and Q are interchanged
|
||||
// current_synchro_data.Prompt_I = static_cast<double>((*d_Prompt_Data).imag());
|
||||
// current_synchro_data.Prompt_Q = static_cast<double>((*d_Prompt_Data).real());
|
||||
// }
|
||||
// else
|
||||
// {
|
||||
// current_synchro_data.Prompt_I = static_cast<double>((*d_Prompt).imag());
|
||||
// current_synchro_data.Prompt_Q = static_cast<double>((*d_Prompt).real());
|
||||
// }
|
||||
// }
|
||||
// else
|
||||
// {
|
||||
// if (trk_parameters.track_pilot)
|
||||
// {
|
||||
// // Note that data and pilot components are in quadrature. I and Q are interchanged
|
||||
// current_synchro_data.Prompt_I = static_cast<double>((*d_Prompt_Data).real());
|
||||
// current_synchro_data.Prompt_Q = static_cast<double>((*d_Prompt_Data).imag());
|
||||
// }
|
||||
// else
|
||||
// {
|
||||
// current_synchro_data.Prompt_I = static_cast<double>((*d_Prompt).real());
|
||||
// current_synchro_data.Prompt_Q = static_cast<double>((*d_Prompt).imag());
|
||||
// }
|
||||
// }
|
||||
//
|
||||
// current_synchro_data.Code_phase_samples = d_rem_code_phase_samples;
|
||||
// current_synchro_data.Carrier_phase_rads = d_acc_carrier_phase_rad;
|
||||
// current_synchro_data.Carrier_Doppler_hz = d_carrier_doppler_hz;
|
||||
// current_synchro_data.CN0_dB_hz = d_CN0_SNV_dB_Hz;
|
||||
// current_synchro_data.Flag_valid_symbol_output = true;
|
||||
// current_synchro_data.correlation_length_ms = d_correlation_length_ms;
|
||||
//
|
||||
// if (next_state)
|
||||
// { // reset extended correlator
|
||||
// d_VE_accu = gr_complex(0.0, 0.0);
|
||||
// d_E_accu = gr_complex(0.0, 0.0);
|
||||
// d_P_accu = gr_complex(0.0, 0.0);
|
||||
// d_L_accu = gr_complex(0.0, 0.0);
|
||||
// d_VL_accu = gr_complex(0.0, 0.0);
|
||||
// d_Prompt_circular_buffer.clear();
|
||||
// d_current_symbol = 0;
|
||||
// //d_Prompt_buffer_deque.clear();
|
||||
//
|
||||
// if (d_enable_extended_integration)
|
||||
// {
|
||||
// // UPDATE INTEGRATION TIME
|
||||
// d_extend_correlation_symbols_count = 0;
|
||||
// d_current_correlation_time_s = static_cast<float>(trk_parameters.extend_correlation_symbols) * static_cast<float>(d_code_period);
|
||||
//
|
||||
// d_state = 3; // next state is the extended correlator integrator
|
||||
// LOG(INFO) << "Enabled " << trk_parameters.extend_correlation_symbols * static_cast<int32_t>(d_code_period * 1000.0) << " ms extended correlator in channel "
|
||||
// << d_channel
|
||||
// << " for satellite " << Gnss_Satellite(systemName, d_acquisition_gnss_synchro->PRN);
|
||||
// std::cout << "Enabled " << trk_parameters.extend_correlation_symbols * static_cast<int32_t>(d_code_period * 1000.0) << " ms extended correlator in channel "
|
||||
// << d_channel
|
||||
// << " for satellite " << Gnss_Satellite(systemName, d_acquisition_gnss_synchro->PRN) << std::endl;
|
||||
// // Set narrow taps delay values [chips]
|
||||
// d_code_loop_filter.set_update_interval(d_current_correlation_time_s);
|
||||
// d_code_loop_filter.set_noise_bandwidth(trk_parameters.dll_bw_narrow_hz);
|
||||
// d_carrier_loop_filter.set_params(trk_parameters.fll_bw_hz, trk_parameters.pll_bw_narrow_hz, trk_parameters.pll_filter_order);
|
||||
// if (d_veml)
|
||||
// {
|
||||
// d_local_code_shift_chips[0] = -trk_parameters.very_early_late_space_narrow_chips * static_cast<float>(d_code_samples_per_chip);
|
||||
// d_local_code_shift_chips[1] = -trk_parameters.early_late_space_narrow_chips * static_cast<float>(d_code_samples_per_chip);
|
||||
// d_local_code_shift_chips[3] = trk_parameters.early_late_space_narrow_chips * static_cast<float>(d_code_samples_per_chip);
|
||||
// d_local_code_shift_chips[4] = trk_parameters.very_early_late_space_narrow_chips * static_cast<float>(d_code_samples_per_chip);
|
||||
// }
|
||||
// else
|
||||
// {
|
||||
// d_local_code_shift_chips[0] = -trk_parameters.early_late_space_narrow_chips * static_cast<float>(d_code_samples_per_chip);
|
||||
// d_local_code_shift_chips[2] = trk_parameters.early_late_space_narrow_chips * static_cast<float>(d_code_samples_per_chip);
|
||||
// }
|
||||
// }
|
||||
// else
|
||||
// {
|
||||
// d_state = 4;
|
||||
// }
|
||||
// }
|
||||
// }
|
||||
//}
|
||||
|
||||
@ -37,7 +37,6 @@
|
||||
#include "fpga_multicorrelator.h"
|
||||
#include <glog/logging.h>
|
||||
#include <volk_gnsssdr/volk_gnsssdr.h>
|
||||
//#include <chrono>
|
||||
#include <cmath>
|
||||
#include <cstdio>
|
||||
#include <fcntl.h> // for O_RDWR, O_RSYNC
|
||||
@ -176,7 +175,6 @@ void Fpga_Multicorrelator_8sc::set_output_vectors(gr_complex *corr_out, gr_compl
|
||||
|
||||
void Fpga_Multicorrelator_8sc::update_local_code()
|
||||
{
|
||||
//d_rem_code_phase_chips = rem_code_phase_chips;
|
||||
Fpga_Multicorrelator_8sc::fpga_compute_code_shift_parameters();
|
||||
Fpga_Multicorrelator_8sc::fpga_configure_code_parameters_in_fpga();
|
||||
}
|
||||
@ -204,16 +202,12 @@ void Fpga_Multicorrelator_8sc::Carrier_wipeoff_multicorrelator_resampler(
|
||||
Fpga_Multicorrelator_8sc::fpga_launch_multicorrelator_fpga();
|
||||
int32_t irq_count;
|
||||
ssize_t nb;
|
||||
//auto start = std::chrono::system_clock::now();
|
||||
nb = read(d_device_descriptor, &irq_count, sizeof(irq_count));
|
||||
if (nb != sizeof(irq_count))
|
||||
{
|
||||
std::cout << "Tracking_module Read failed to retrieve 4 bytes!" << std::endl;
|
||||
std::cout << "Tracking_module Interrupt number " << irq_count << std::endl;
|
||||
}
|
||||
//auto end = std::chrono::system_clock::now();
|
||||
//std::chrono::duration<double> elapsed_seconds = end - start;
|
||||
//std::cout << "sleeping time : " << elapsed_seconds.count() << "s\n";
|
||||
Fpga_Multicorrelator_8sc::read_tracking_gps_results();
|
||||
}
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user