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6,204 Commits 7 Branches 21 Tags 211 MiB
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Commit Graph

109 Commits

Author SHA1 Message Date
Carles Fernandez
d818aacde4
Avoid name clash with system macro in macOS 2019-07-26 13:22:11 +02:00
Carles Fernandez
d626ca1f88
Merge branch 'fpga_extended_coherent_integration' of https://github.com/mmajoral/gnss-sdr into mmajoral-fpga_extended_coherent_integration 2019-07-26 13:12:46 +02:00
Carles Fernandez
a4d6800e22
Update copyright year 
Applied on files changed since last release
clang-format applied
 2019-07-26 12:38:20 +02:00
Marc Majoral
48fe6086e4 updated the handling of the scoped_lock mutex in the fpga tracking loops + used clang-format. 2019-07-24 11:26:16 +02:00
Marc Majoral
f30d8a60ec updated doxygen comments 2019-07-23 19:05:43 +02:00
Marc Majoral
6ee9fedd76 moved #defines to static consts + used clang-format + removed code that was commented out 2019-07-23 15:20:59 +02:00
Marc Majoral
d9d3696880 Merge branch 'next' of https://github.com/mmajoral/gnss-sdr into fpga_extended_coherent_integration 2019-07-22 17:53:26 +02:00
Carles Fernandez
be86771ede
Move default destructor to header file, so compiler can make a better job 2019-07-21 19:32:52 +02:00
Marc Majoral
8b0e170a56 applied clang-format 2019-07-19 11:55:53 +02:00
Marc Majoral
dd996bc2e2 Merge branch 'next' of https://github.com/mmajoral/gnss-sdr into fpga_extended_coherent_integration 2019-07-18 11:35:34 +02:00
Carles Fernandez
4adb05570a Fix typos detected by codespell 2019-07-09 11:52:53 +02:00
Marc Majoral
c8ccd5ef91 Merge branch 'next' of https://github.com/mmajoral/gnss-sdr into fpga_extended_coherent_integration 2019-07-04 12:55:36 +02:00
Carles Fernandez
081439d6f8 Code cleaning 2019-07-02 17:48:00 +02:00
Marc Majoral
33d1115246 added support for extended coherent integration in the FPGA. The code still needs to be optimized and cleaned. 2019-06-18 18:22:01 +02:00
Marc Majoral
e1d01d3b97 Re-enable uio interrupts manually + do not enable interrupt generation at reset. 2019-05-13 16:30:01 +02:00
Marc Majoral
bf3f66278f closed the acquisition device driver in the proper way + updated fpga block expponent. 2019-04-15 16:39:05 +02:00
Marc Majoral
7a06434928 removed unnecessary function in fpga_acquisition class 2019-04-12 15:16:31 +02:00
Marc Majoral
9f80eaf0ff code cleanup 2019-04-12 11:36:30 +02:00
Marc Majoral
a628ad5906 removed FPGA dummy read 2019-04-12 10:03:57 +02:00
Marc Majoral
91f509abf9 write the code phase rate and the nco phase rate parameters in the FPGA 2019-04-10 11:31:34 +02:00
Marc Majoral
ff024e7292 cleaned unused code and added some comments. 2019-04-04 19:55:02 +02:00
Marc Majoral
5bc7a778e9 commented out the old DLL and PLL filters in the tracking modules + removed some old not used code in the acquisition that was already commented out. 2019-04-02 13:10:09 +02:00
Marc Majoral
58a0de006e corrected comment 2019-03-26 16:41:20 +01:00
Marc Majoral
63cee0e63b In order to reduce the CPU workload, the FPGA acquisition does not close and open the device driver in between the first and the second acquisition anymore. 2019-03-26 16:35:19 +01:00
Marc Majoral
cbc8131677 optimized the computation of FPGA acquisition doppler shift and dopper step registers 
removed unnecessary function call
 2019-03-26 16:22:49 +01:00
Marc Majoral
2b46c79ba7 optimized the process of computing and writing the fft of the local code to the acquisition HW accelerator. 
The writing of the local code is still performed by processor instructions in a loop.
THe FPGA L2 classes were updated accordingly.
 2019-03-26 12:26:08 +01:00
Marc Majoral
905a85670c currently optimizing the FPGA-related code 2019-03-25 19:45:54 +01:00
Marc Majoral
e6b661494c moved to 16 bits per local code. 2019-03-20 16:59:32 +01:00
Marc Majoral
6da82535ba Merge branch 'next' of https://github.com/gnss-sdr/gnss-sdr into fpga 2019-03-20 16:35:55 +01:00
Marc Majoral
a24d26f427 set the default sampling frequency of the HW source to 12.5 Msps and the default bandpass bandwidth to 12.5 MHz + other minor changes 2019-03-19 10:14:09 +01:00
Marc Majoral
bef7e42fb9 Merge branch 'next' of https://github.com/gnss-sdr/gnss-sdr into fpga 2019-03-18 19:37:19 +01:00
Carles Fernandez
dd7a52c93b
Fix headers 2019-03-06 21:54:39 +01:00
Carles Fernandez
5b8ab9f591 Improve includes (IWYU) 2019-03-06 13:49:14 +01:00
Marc Majoral
5a2dc274cf but solved: double acquisition was using uint32_t for the initial doppler estimation. Therefore when the first estimated doppler was negative it was reset to zero. 2019-03-01 20:37:14 +01:00
Carles Fernandez
e43b8f5284
Fix defects detected by Coverity Scan 2019-03-01 15:29:43 +01:00
Carles Fernandez
df0a77ee0d
Fix warnings 
more protection on read/write failures and some code cleaning
 2019-03-01 10:11:36 +01:00
Carles Fernandez
7c71ed9404
Merge branch 'fpga' of https://github.com/gnss-sdr/gnss-sdr into merge-fpga 
Applied checks and formatting
 2019-02-28 21:45:30 +01:00
Marc Majoral
ea86546d99 implemented double acquisition for the FPGA 2019-02-28 20:49:35 +01:00
Marc Majoral
c32e0b427a coding style + removed some unnecessary memory arrays in the FPGA E5A tracking adapter class. 2019-02-27 17:27:31 +01:00
Marc Majoral
8d770d9be9 more code cleaning 
removed some non used variables
 2019-02-27 13:30:09 +01:00
Marc Majoral
5e22e4c50a cleaned the FPGA acquisition code 2019-02-26 18:28:14 +01:00
Marc Majoral
cf0a37300a Merge branch 'next' of https://github.com/gnss-sdr/gnss-sdr into fpga 2019-02-25 19:21:00 +01:00
Carles Fernandez
9bc771bed6
Deploy a new option -DENABLE_CLANG_TIDY to integrate clang-tidy checks and fixes into the compilation process, if found. It defaults to OFF 2019-02-21 09:59:06 +01:00
Carles Fernandez
75bd492d96
Change CMake target names to more meaningful ones, reflecting the code tree 2019-02-10 18:34:28 +01:00
Carles Fernandez
ce051e040f
Improve target design 2019-02-10 01:13:02 +01:00
Carles Fernandez
dfc89868af
Fix building 2019-02-08 00:05:14 +01:00
Carles Fernandez
708b288e61
Clean CMake scripts 2019-02-04 22:44:45 +01:00
Carles Fernandez
8ae72fe458
Update to modern CMake usage 2019-02-03 19:24:44 +01:00
Marc Majoral
f127729eb0 Merge branch 'next' of https://github.com/gnss-sdr/gnss-sdr into fpga 2019-01-25 18:02:07 +01:00
Carles Fernandez
54237770a6
Apply fixes by clang-tidy 2018-12-10 22:59:10 +01:00