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This commit is contained in:
Marc Majoral 2019-07-19 11:55:53 +02:00
parent 8c84702f27
commit 8b0e170a56
12 changed files with 903 additions and 946 deletions
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114
src/algorithms/acquisition/gnuradio_blocks/pcps_acquisition_fpga.cc
View File

@ -134,56 +134,52 @@ void pcps_acquisition_fpga::set_state(int32_t state)
void pcps_acquisition_fpga::send_positive_acquisition()
{
// debug L5
// d_gnss_synchro->Acq_delay_samples = 2694;
// d_gnss_synchro->Acq_doppler_hz = 2650;
// d_gnss_synchro->Acq_samplestamp_samples = 56500224;
// d_gnss_synchro->Flag_valid_word = 0;
// d_gnss_synchro->Flag_valid_pseudorange = 0;
// d_gnss_synchro->Flag_valid_symbol_output = 0;
// d_gnss_synchro->Flag_valid_acquisition = 0;
// debug L5
// d_gnss_synchro->Acq_delay_samples = 2694;
// d_gnss_synchro->Acq_doppler_hz = 2650;
// d_gnss_synchro->Acq_samplestamp_samples = 56500224;
// d_gnss_synchro->Flag_valid_word = 0;
// d_gnss_synchro->Flag_valid_pseudorange = 0;
// d_gnss_synchro->Flag_valid_symbol_output = 0;
// d_gnss_synchro->Flag_valid_acquisition = 0;
// d_gnss_synchro->Acq_delay_samples = 10846;
// d_gnss_synchro->Acq_doppler_hz = 2575;
// d_gnss_synchro->Acq_samplestamp_samples = 399605760;
// d_gnss_synchro->Flag_valid_word = 0;
// d_gnss_synchro->Flag_valid_pseudorange = 0;
// d_gnss_synchro->Flag_valid_symbol_output = 0;
// d_gnss_synchro->Flag_valid_acquisition = 0;
// d_gnss_synchro->Acq_delay_samples = 10846;
// d_gnss_synchro->Acq_doppler_hz = 2575;
// d_gnss_synchro->Acq_samplestamp_samples = 399605760;
// d_gnss_synchro->Flag_valid_word = 0;
// d_gnss_synchro->Flag_valid_pseudorange = 0;
// d_gnss_synchro->Flag_valid_symbol_output = 0;
// d_gnss_synchro->Flag_valid_acquisition = 0;
// if (d_channel == 0)
// {
// d_gnss_synchro->Acq_delay_samples = 401;
// d_gnss_synchro->Acq_doppler_hz = 2650;
// d_gnss_synchro->Acq_samplestamp_samples = 96591872;
// d_gnss_synchro->Flag_valid_word = 0;
// d_gnss_synchro->Flag_valid_pseudorange = 0;
// d_gnss_synchro->Flag_valid_symbol_output = 0;
// d_gnss_synchro->Flag_valid_acquisition = 0;
// if (d_channel == 0)
// {
// d_gnss_synchro->Acq_delay_samples = 401;
// d_gnss_synchro->Acq_doppler_hz = 2650;
// d_gnss_synchro->Acq_samplestamp_samples = 96591872;
// d_gnss_synchro->Flag_valid_word = 0;
// d_gnss_synchro->Flag_valid_pseudorange = 0;
// d_gnss_synchro->Flag_valid_symbol_output = 0;
// d_gnss_synchro->Flag_valid_acquisition = 0;
// d_gnss_synchro->Acq_delay_samples = 1505;
// d_gnss_synchro->Acq_doppler_hz = 2575;
// d_gnss_synchro->Acq_samplestamp_samples = 194265553;
// d_gnss_synchro->Flag_valid_word = 0;
// d_gnss_synchro->Flag_valid_pseudorange = 0;
// d_gnss_synchro->Flag_valid_symbol_output = 0;
// d_gnss_synchro->Flag_valid_acquisition = 0;
// }
// debug E5a
// d_gnss_synchro->Acq_delay_samples = 2012;
// d_gnss_synchro->Acq_doppler_hz = -1125;
// d_gnss_synchro->Acq_samplestamp_samples = 363462656;
// d_gnss_synchro->Flag_valid_word = 0;
// d_gnss_synchro->Flag_valid_pseudorange = 0;
// d_gnss_synchro->Flag_valid_symbol_output = 0;
// d_gnss_synchro->Flag_valid_acquisition = 0;
// d_gnss_synchro->Acq_delay_samples = 1505;
// d_gnss_synchro->Acq_doppler_hz = 2575;
// d_gnss_synchro->Acq_samplestamp_samples = 194265553;
// d_gnss_synchro->Flag_valid_word = 0;
// d_gnss_synchro->Flag_valid_pseudorange = 0;
// d_gnss_synchro->Flag_valid_symbol_output = 0;
// d_gnss_synchro->Flag_valid_acquisition = 0;
// }
// debug E5a
// d_gnss_synchro->Acq_delay_samples = 2012;
// d_gnss_synchro->Acq_doppler_hz = -1125;
// d_gnss_synchro->Acq_samplestamp_samples = 363462656;
// d_gnss_synchro->Flag_valid_word = 0;
// d_gnss_synchro->Flag_valid_pseudorange = 0;
// d_gnss_synchro->Flag_valid_symbol_output = 0;
// d_gnss_synchro->Flag_valid_acquisition = 0;
// Declare positive acquisition using a message port
@ -199,21 +195,21 @@ void pcps_acquisition_fpga::send_positive_acquisition()
<< ", input signal power " << d_input_power;
// std::cout << "positive acquisition"
// << ", satellite " << d_gnss_synchro->System << " " << d_gnss_synchro->PRN
// << ", sample_stamp " << d_sample_counter
// << ", test statistics value " << d_test_statistics
// << ", test statistics threshold " << d_threshold
// << ", code phase " << d_gnss_synchro->Acq_delay_samples
// << ", doppler " << d_gnss_synchro->Acq_doppler_hz
// << ", magnitude " << d_mag
// << ", input signal power " << d_input_power
// << ", d_gnss_synchro->Acq_samplestamp_samples " << d_gnss_synchro->Acq_samplestamp_samples
// << ", d_gnss_synchro->Flag_valid_word " << d_gnss_synchro->Flag_valid_word
// << ", Flag_valid_pseudorange " << d_gnss_synchro->Flag_valid_pseudorange
// << ", d_gnss_synchro->Flag_valid_symbol_output " << d_gnss_synchro->Flag_valid_symbol_output
// << ", d_gnss_synchro->Flag_valid_acquisition " << d_gnss_synchro->Flag_valid_acquisition
// << std::endl;
// std::cout << "positive acquisition"
// << ", satellite " << d_gnss_synchro->System << " " << d_gnss_synchro->PRN
// << ", sample_stamp " << d_sample_counter
// << ", test statistics value " << d_test_statistics
// << ", test statistics threshold " << d_threshold
// << ", code phase " << d_gnss_synchro->Acq_delay_samples
// << ", doppler " << d_gnss_synchro->Acq_doppler_hz
// << ", magnitude " << d_mag
// << ", input signal power " << d_input_power
// << ", d_gnss_synchro->Acq_samplestamp_samples " << d_gnss_synchro->Acq_samplestamp_samples
// << ", d_gnss_synchro->Flag_valid_word " << d_gnss_synchro->Flag_valid_word
// << ", Flag_valid_pseudorange " << d_gnss_synchro->Flag_valid_pseudorange
// << ", d_gnss_synchro->Flag_valid_symbol_output " << d_gnss_synchro->Flag_valid_symbol_output
// << ", d_gnss_synchro->Flag_valid_acquisition " << d_gnss_synchro->Flag_valid_acquisition
// << std::endl;
//the channel FSM is set, so, notify it directly the positive acquisition to minimize delays
d_channel_fsm.lock()->Event_valid_acquisition();

2
src/algorithms/acquisition/libs/fpga_acquisition.cc
View File

@ -302,7 +302,7 @@ void Fpga_Acquisition::close_device()
void Fpga_Acquisition::reset_acquisition(void)
{
//printf("============ resetting the hw now from the acquisition ===============");
//printf("============ resetting the hw now from the acquisition ===============");
d_map_base[8] = RESET_ACQUISITION; // writing a 2 to d_map_base[8] resets the acquisition. This causes a reset of all
// the FPGA HW modules including the multicorrelators
}

16
src/algorithms/tracking/adapters/galileo_e1_dll_pll_veml_tracking_fpga.cc
View File

@ -175,12 +175,12 @@ GalileoE1DllPllVemlTrackingFpga::GalileoE1DllPllVemlTrackingFpga(
trk_param_fpga.max_carrier_lock_fail = configuration->property(role + ".max_carrier_lock_fail", trk_param_fpga.max_carrier_lock_fail);
trk_param_fpga.carrier_lock_th = configuration->property(role + ".carrier_lock_th", trk_param_fpga.carrier_lock_th);
// int32_t max_lock_fail = configuration->property(role + ".max_lock_fail", 50);
// if (FLAGS_max_lock_fail != 50)
// {
// max_lock_fail = FLAGS_max_lock_fail;
// }
// trk_param_fpga.max_lock_fail = max_lock_fail;
// int32_t max_lock_fail = configuration->property(role + ".max_lock_fail", 50);
// if (FLAGS_max_lock_fail != 50)
// {
// max_lock_fail = FLAGS_max_lock_fail;
// }
// trk_param_fpga.max_lock_fail = max_lock_fail;
// FPGA configuration parameters
@ -265,8 +265,8 @@ GalileoE1DllPllVemlTrackingFpga::GalileoE1DllPllVemlTrackingFpga(
trk_param_fpga.code_length_chips = GALILEO_E1_B_CODE_LENGTH_CHIPS;
trk_param_fpga.code_samples_per_chip = code_samples_per_chip; // 2 sample per chip
trk_param_fpga.extended_correlation_in_fpga = false;
trk_param_fpga.extend_fpga_integration_periods = 1; // (number of FPGA integrations that are combined in the SW)
trk_param_fpga.fpga_integration_period = 1; // (number of symbols that are effectively integrated in the FPGA)
trk_param_fpga.extend_fpga_integration_periods = 1; // (number of FPGA integrations that are combined in the SW)
trk_param_fpga.fpga_integration_period = 1; // (number of symbols that are effectively integrated in the FPGA)
//################# MAKE TRACKING GNURadio object ###################
tracking_fpga_sc = dll_pll_veml_make_tracking_fpga(trk_param_fpga);
channel_ = 0;

68
src/algorithms/tracking/adapters/galileo_e5a_dll_pll_tracking_fpga.cc
View File

@ -168,12 +168,12 @@ GalileoE5aDllPllTrackingFpga::GalileoE5aDllPllTrackingFpga(
trk_param_fpga.max_carrier_lock_fail = configuration->property(role + ".max_carrier_lock_fail", trk_param_fpga.max_carrier_lock_fail);
trk_param_fpga.carrier_lock_th = configuration->property(role + ".carrier_lock_th", trk_param_fpga.carrier_lock_th);
// int32_t max_lock_fail = configuration->property(role + ".max_lock_fail", 50);
// if (FLAGS_max_lock_fail != 50)
// {
// max_lock_fail = FLAGS_max_lock_fail;
// }
// trk_param_fpga.max_lock_fail = max_lock_fail;
// int32_t max_lock_fail = configuration->property(role + ".max_lock_fail", 50);
// if (FLAGS_max_lock_fail != 50)
// {
// max_lock_fail = FLAGS_max_lock_fail;
// }
// trk_param_fpga.max_lock_fail = max_lock_fail;
d_data_codes = nullptr;
@ -248,35 +248,35 @@ GalileoE5aDllPllTrackingFpga::GalileoE5aDllPllTrackingFpga(
trk_param_fpga.code_length_chips = code_length_chips;
trk_param_fpga.code_samples_per_chip = code_samples_per_chip; // 2 sample per chip
trk_param_fpga.extended_correlation_in_fpga = false; // by default
trk_param_fpga.extend_fpga_integration_periods = 1; // (number of FPGA integrations that are combined in the SW)
trk_param_fpga.fpga_integration_period = 1; // (number of symbols that are effectively integrated in the FPGA)
trk_param_fpga.extended_correlation_in_fpga = false; // by default
trk_param_fpga.extend_fpga_integration_periods = 1; // (number of FPGA integrations that are combined in the SW)
trk_param_fpga.fpga_integration_period = 1; // (number of symbols that are effectively integrated in the FPGA)
if (d_track_pilot)
{
if (extend_correlation_symbols >1)
{
if (extend_correlation_symbols <= GALILEO_E5A_I_SECONDARY_CODE_LENGTH)
{
if ((GALILEO_E5A_I_SECONDARY_CODE_LENGTH % extend_correlation_symbols) == 0)
{
trk_param_fpga.extended_correlation_in_fpga = true;
trk_param_fpga.fpga_integration_period = extend_correlation_symbols;
printf("correlation in fpga true\n");
}
}
else
{
if (extend_correlation_symbols % GALILEO_E5A_I_SECONDARY_CODE_LENGTH == 0)
{
trk_param_fpga.extended_correlation_in_fpga = true;
trk_param_fpga.extend_fpga_integration_periods = extend_correlation_symbols/GALILEO_E5A_I_SECONDARY_CODE_LENGTH;
trk_param_fpga.fpga_integration_period = GALILEO_E5A_I_SECONDARY_CODE_LENGTH;
printf("correlation in fpga true\n");
printf("extend fpga integration periods true\n");
}
}
}
}
{
if (extend_correlation_symbols > 1)
{
if (extend_correlation_symbols <= GALILEO_E5A_I_SECONDARY_CODE_LENGTH)
{
if ((GALILEO_E5A_I_SECONDARY_CODE_LENGTH % extend_correlation_symbols) == 0)
{
trk_param_fpga.extended_correlation_in_fpga = true;
trk_param_fpga.fpga_integration_period = extend_correlation_symbols;
printf("correlation in fpga true\n");
}
}
else
{
if (extend_correlation_symbols % GALILEO_E5A_I_SECONDARY_CODE_LENGTH == 0)
{
trk_param_fpga.extended_correlation_in_fpga = true;
trk_param_fpga.extend_fpga_integration_periods = extend_correlation_symbols / GALILEO_E5A_I_SECONDARY_CODE_LENGTH;
trk_param_fpga.fpga_integration_period = GALILEO_E5A_I_SECONDARY_CODE_LENGTH;
printf("correlation in fpga true\n");
printf("extend fpga integration periods true\n");
}
}
}
}
//################# MAKE TRACKING GNURadio object ###################
tracking_fpga_sc = dll_pll_veml_make_tracking_fpga(trk_param_fpga);

32
src/algorithms/tracking/adapters/gps_l1_ca_dll_pll_tracking_fpga.cc
View File

@ -152,7 +152,7 @@ GpsL1CaDllPllTrackingFpga::GpsL1CaDllPllTrackingFpga(
}
else if (symbols_extended_correlator > GPS_CA_BIT_DURATION_MS)
{
symbols_extended_correlator = GPS_CA_BIT_DURATION_MS;
symbols_extended_correlator = GPS_CA_BIT_DURATION_MS;
std::cout << TEXT_RED << "WARNING: GPS L1 C/A. extend_correlation_symbols must be lower than 21. Coherent integration has been set to 20 symbols (20 ms)" << TEXT_RESET << std::endl;
}
trk_param_fpga.extend_correlation_symbols = symbols_extended_correlator;
@ -214,21 +214,21 @@ GpsL1CaDllPllTrackingFpga::GpsL1CaDllPllTrackingFpga(
trk_param_fpga.code_length_chips = GPS_L1_CA_CODE_LENGTH_CHIPS;
trk_param_fpga.code_samples_per_chip = 1; // 1 sample per chip
trk_param_fpga.extended_correlation_in_fpga = false; // by default
trk_param_fpga.extend_fpga_integration_periods = 1; // (number of FPGA integrations that are combined in the SW)
trk_param_fpga.fpga_integration_period = 1; // (number of symbols that are effectively integrated in the FPGA)
if (symbols_extended_correlator >1)
{
if (symbols_extended_correlator <= GPS_CA_BIT_DURATION_MS)
{
if ((GPS_CA_BIT_DURATION_MS % symbols_extended_correlator) == 0)
{
trk_param_fpga.extended_correlation_in_fpga = true;
trk_param_fpga.fpga_integration_period = symbols_extended_correlator;
printf("correlation in fpga true\n");
}
}
}
trk_param_fpga.extended_correlation_in_fpga = false; // by default
trk_param_fpga.extend_fpga_integration_periods = 1; // (number of FPGA integrations that are combined in the SW)
trk_param_fpga.fpga_integration_period = 1; // (number of symbols that are effectively integrated in the FPGA)
if (symbols_extended_correlator > 1)
{
if (symbols_extended_correlator <= GPS_CA_BIT_DURATION_MS)
{
if ((GPS_CA_BIT_DURATION_MS % symbols_extended_correlator) == 0)
{
trk_param_fpga.extended_correlation_in_fpga = true;
trk_param_fpga.fpga_integration_period = symbols_extended_correlator;
printf("correlation in fpga true\n");
}
}
}
//################# MAKE TRACKING GNURadio object ###################

12
src/algorithms/tracking/adapters/gps_l2_m_dll_pll_tracking_fpga.cc
View File

@ -106,12 +106,12 @@ GpsL2MDllPllTrackingFpga::GpsL2MDllPllTrackingFpga(
trk_param_fpga.max_carrier_lock_fail = configuration->property(role + ".max_carrier_lock_fail", trk_param_fpga.max_carrier_lock_fail);
trk_param_fpga.carrier_lock_th = configuration->property(role + ".carrier_lock_th", trk_param_fpga.carrier_lock_th);
// int32_t max_lock_fail = configuration->property(role + ".max_lock_fail", 50);
// if (FLAGS_max_lock_fail != 50)
// {
// max_lock_fail = FLAGS_max_lock_fail;
// }
// trk_param_fpga.max_lock_fail = max_lock_fail;
// int32_t max_lock_fail = configuration->property(role + ".max_lock_fail", 50);
// if (FLAGS_max_lock_fail != 50)
// {
// max_lock_fail = FLAGS_max_lock_fail;
// }
// trk_param_fpga.max_lock_fail = max_lock_fail;
// FPGA configuration parameters
std::string default_device_name = "/dev/uio";

56
src/algorithms/tracking/adapters/gps_l5_dll_pll_tracking_fpga.cc
View File

@ -273,35 +273,35 @@ GpsL5DllPllTrackingFpga::GpsL5DllPllTrackingFpga(
trk_param_fpga.code_length_chips = code_length_chips;
trk_param_fpga.code_samples_per_chip = code_samples_per_chip; // 2 sample per chip
trk_param_fpga.extended_correlation_in_fpga = false; // by default
trk_param_fpga.extend_fpga_integration_periods = 1; // (number of FPGA integrations that are combined in the SW)
trk_param_fpga.fpga_integration_period = 1; // (number of symbols that are effectively integrated in the FPGA)
trk_param_fpga.extended_correlation_in_fpga = false; // by default
trk_param_fpga.extend_fpga_integration_periods = 1; // (number of FPGA integrations that are combined in the SW)
trk_param_fpga.fpga_integration_period = 1; // (number of symbols that are effectively integrated in the FPGA)
if (d_track_pilot)
{
if (extend_correlation_symbols > 1)
{
if (extend_correlation_symbols <= GPS_L5I_NH_CODE_LENGTH)
{
if ((GPS_L5I_NH_CODE_LENGTH % extend_correlation_symbols) == 0)
{
trk_param_fpga.extended_correlation_in_fpga = true;
trk_param_fpga.fpga_integration_period = extend_correlation_symbols;
printf("correlation in fpga true\n");
}
}
else
{
if (extend_correlation_symbols % GPS_L5I_NH_CODE_LENGTH == 0)
{
trk_param_fpga.extended_correlation_in_fpga = true;
trk_param_fpga.extend_fpga_integration_periods = extend_correlation_symbols/GPS_L5I_NH_CODE_LENGTH;
trk_param_fpga.fpga_integration_period = GPS_L5I_NH_CODE_LENGTH;
printf("correlation in fpga true\n");
printf("extend fpga integration periods true\n");
}
}
}
}
{
if (extend_correlation_symbols > 1)
{
if (extend_correlation_symbols <= GPS_L5I_NH_CODE_LENGTH)
{
if ((GPS_L5I_NH_CODE_LENGTH % extend_correlation_symbols) == 0)
{
trk_param_fpga.extended_correlation_in_fpga = true;
trk_param_fpga.fpga_integration_period = extend_correlation_symbols;
printf("correlation in fpga true\n");
}
}
else
{
if (extend_correlation_symbols % GPS_L5I_NH_CODE_LENGTH == 0)
{
trk_param_fpga.extended_correlation_in_fpga = true;
trk_param_fpga.extend_fpga_integration_periods = extend_correlation_symbols / GPS_L5I_NH_CODE_LENGTH;
trk_param_fpga.fpga_integration_period = GPS_L5I_NH_CODE_LENGTH;
printf("correlation in fpga true\n");
printf("extend fpga integration periods true\n");
}
}
}
}
tracking_fpga_sc = dll_pll_veml_make_tracking_fpga(trk_param_fpga);
channel_ = 0;

1199
src/algorithms/tracking/gnuradio_blocks/dll_pll_veml_tracking_fpga.cc
View File

File diff suppressed because it is too large Load Diff

3
src/algorithms/tracking/gnuradio_blocks/dll_pll_veml_tracking_fpga.h
View File

@ -153,7 +153,7 @@ private:
double d_carrier_phase_step_rad;
double d_carrier_phase_rate_step_rad;
boost::circular_buffer<std::pair<double, double>> d_carr_ph_history;
// remaining code phase and carrier phase between tracking loops
double d_rem_code_phase_samples;
double d_rem_code_phase_samples_prev;
@ -221,7 +221,6 @@ private:
boost::mutex d_mutex;
bool d_stop_tracking;
};
#endif //GNSS_SDR_DLL_PLL_VEML_TRACKING_FPGA_H

323
src/algorithms/tracking/libs/fpga_multicorrelator.cc
View File

@ -211,20 +211,20 @@ void Fpga_Multicorrelator_8sc::Carrier_wipeoff_multicorrelator_resampler(
// release secondary code indices, keep channel locked
if (d_secondary_code_enabled == true)
{
//printf("in the right place\n");
// debug - force reset counter every time
//d_map_base[DROP_SAMPLES_REG_ADDR] = ENABLE_SECONDARY_CODE | INIT_SECONDARY_CODE_ADDRESSES;
d_map_base[DROP_SAMPLES_REG_ADDR] = ENABLE_SECONDARY_CODE; // keep secondary code enabled
{
//printf("in the right place\n");
// debug - force reset counter every time
//d_map_base[DROP_SAMPLES_REG_ADDR] = ENABLE_SECONDARY_CODE | INIT_SECONDARY_CODE_ADDRESSES;
d_map_base[DROP_SAMPLES_REG_ADDR] = ENABLE_SECONDARY_CODE; // keep secondary code enabled
// //printf("do not enable secondary code on purpose\n");
// d_map_base[DROP_SAMPLES_REG_ADDR] = 0; // block samples
}
// //printf("do not enable secondary code on purpose\n");
// d_map_base[DROP_SAMPLES_REG_ADDR] = 0; // block samples
}
else
{
//printf("in the wrong place\n");
d_map_base[DROP_SAMPLES_REG_ADDR] = 0; // block samples
}
{
//printf("in the wrong place\n");
d_map_base[DROP_SAMPLES_REG_ADDR] = 0; // block samples
}
Fpga_Multicorrelator_8sc::read_tracking_gps_results();
}
@ -476,10 +476,10 @@ void Fpga_Multicorrelator_8sc::read_tracking_gps_results(void)
void Fpga_Multicorrelator_8sc::unlock_channel(void)
{
// unlock the channel to let the next samples go through
d_map_base[DROP_SAMPLES_REG_ADDR] = DROP_SAMPLES; // unlock the channel and disable secondary codes
d_map_base[STOP_TRACKING_REG_ADDR] = 1; // set the tracking module back to idle
d_map_base[DROP_SAMPLES_REG_ADDR] = DROP_SAMPLES; // unlock the channel and disable secondary codes
d_map_base[STOP_TRACKING_REG_ADDR] = 1; // set the tracking module back to idle
d_secondary_code_enabled = false;
d_secondary_code_enabled = false;
}
@ -503,55 +503,44 @@ void Fpga_Multicorrelator_8sc::lock_channel(void)
void Fpga_Multicorrelator_8sc::set_secondary_code_lengths(uint32_t secondary_code_0_length, uint32_t secondary_code_1_length)
{
d_secondary_code_0_length = secondary_code_0_length;
d_secondary_code_1_length = secondary_code_1_length;
// debug
//printf("warning extending the code length 0 to 20\n");
//d_secondary_code_0_length = 20;
uint32_t secondary_code_length_0_minus_1 = d_secondary_code_0_length - 1;
uint32_t secondary_code_length_1_minus_1 = d_secondary_code_1_length - 1;
d_map_base[SECONDARY_CODE_LENGTHS_REG_ADDR] = secondary_code_length_1_minus_1 * 256 + secondary_code_length_0_minus_1;
d_secondary_code_0_length = secondary_code_0_length;
d_secondary_code_1_length = secondary_code_1_length;
// debug
//printf("warning extending the code length 0 to 20\n");
//d_secondary_code_0_length = 20;
uint32_t secondary_code_length_0_minus_1 = d_secondary_code_0_length - 1;
uint32_t secondary_code_length_1_minus_1 = d_secondary_code_1_length - 1;
d_map_base[SECONDARY_CODE_LENGTHS_REG_ADDR] = secondary_code_length_1_minus_1*256 + secondary_code_length_0_minus_1;
//std::cout << "setting secondary code lengths : \n";
//std::cout << "initialized correlator 1 sec code length = " << d_secondary_code_1_length << " correlator 0 sec code length = " << d_secondary_code_0_length << std::endl;
//std::cout << "setting secondary code lengths : \n";
//std::cout << "initialized correlator 1 sec code length = " << d_secondary_code_1_length << " correlator 0 sec code length = " << d_secondary_code_0_length << std::endl;
}
void Fpga_Multicorrelator_8sc::update_secondary_code_length(uint32_t first_length_secondary_code, uint32_t next_length_secondary_code)
{
d_map_base[FIRST_PRN_LENGTH_MINUS_1_REG_ADDR] = first_length_secondary_code - 1;
d_map_base[NEXT_PRN_LENGTH_MINUS_1_REG_ADDR] = next_length_secondary_code - 1;
//std::cout << " first_length_secondary_code = " << first_length_secondary_code << " next_length_secondary_code = " << next_length_secondary_code << " sum = " << first_length_secondary_code + next_length_secondary_code << std::endl;
d_map_base[FIRST_PRN_LENGTH_MINUS_1_REG_ADDR] = first_length_secondary_code - 1;
d_map_base[NEXT_PRN_LENGTH_MINUS_1_REG_ADDR] = next_length_secondary_code - 1;
//std::cout << " first_length_secondary_code = " << first_length_secondary_code << " next_length_secondary_code = " << next_length_secondary_code << " sum = " << first_length_secondary_code + next_length_secondary_code << std::endl;
}
void Fpga_Multicorrelator_8sc::initialize_secondary_code(uint32_t secondary_code, std::string *secondary_code_string)
{
uint32_t secondary_code_length;
uint32_t reg_addr;
if (secondary_code == 0)
{
secondary_code_length = d_secondary_code_0_length;
reg_addr = PROG_SECONDARY_CODE_0_DATA_REG_ADDR;
}
else
{
secondary_code_length = d_secondary_code_1_length;
reg_addr = PROG_SECONDARY_CODE_1_DATA_REG_ADDR;
}
Fpga_Multicorrelator_8sc::write_secondary_code(secondary_code_length, secondary_code_string, reg_addr);
uint32_t secondary_code_length;
uint32_t reg_addr;
if (secondary_code == 0)
{
secondary_code_length = d_secondary_code_0_length;
reg_addr = PROG_SECONDARY_CODE_0_DATA_REG_ADDR;
}
else
{
secondary_code_length = d_secondary_code_1_length;
reg_addr = PROG_SECONDARY_CODE_1_DATA_REG_ADDR;
}
Fpga_Multicorrelator_8sc::write_secondary_code(secondary_code_length, secondary_code_string, reg_addr);
}
@ -587,140 +576,139 @@ void Fpga_Multicorrelator_8sc::initialize_secondary_code(uint32_t secondary_code
void Fpga_Multicorrelator_8sc::write_secondary_code(uint32_t secondary_code_length, std::string *secondary_code_string, uint32_t reg_addr)
{
uint32_t num_words = ceil(((float) secondary_code_length)/SECONDARY_CODE_WORD_SIZE);
uint32_t last_word_size = secondary_code_length % SECONDARY_CODE_WORD_SIZE;
//uint32_t initial_pointer;
uint32_t num_words = ceil(((float)secondary_code_length) / SECONDARY_CODE_WORD_SIZE);
uint32_t last_word_size = secondary_code_length % SECONDARY_CODE_WORD_SIZE;
//uint32_t initial_pointer;
if (last_word_size == 0)
{
last_word_size = SECONDARY_CODE_WORD_SIZE;
}
// debug
//std::cout << "secondary_code_length = " << secondary_code_length << std::endl;
//std::cout << "secondary code string = " << *secondary_code_string << std::endl;
//std::cout << "reg_addr = " << reg_addr << std::endl;
if (last_word_size == 0)
{
last_word_size = SECONDARY_CODE_WORD_SIZE;
}
// debug
//std::cout << "secondary_code_length = " << secondary_code_length << std::endl;
//std::cout << "secondary code string = " << *secondary_code_string << std::endl;
//std::cout << "reg_addr = " << reg_addr << std::endl;
// debug
//std::cout << "num_words = " << num_words << std::endl;
//std::cout << "last_word_size = " << last_word_size << std::endl;
// debug
//std::cout << "num_words = " << num_words << std::endl;
//std::cout << "last_word_size = " << last_word_size << std::endl;
uint32_t write_val = 0U;
uint32_t pow_k;
uint32_t mem_addr;
if (num_words > 1)
{
for (mem_addr = 0; mem_addr < num_words - 1 ;mem_addr++)
{
//std::cout << "------------------------------------------------------ going to write word " << mem_addr << std::endl;
write_val = 0U;
pow_k = 1;
for (unsigned int k=0;k<SECONDARY_CODE_WORD_SIZE;k++)
{
// debug
//std::cout << "reading bit position = " << mem_addr*SECONDARY_CODE_WORD_SIZE + k << std::endl;
//std::cout << "bit shift = " << pow_k << std::endl;
uint32_t write_val = 0U;
uint32_t pow_k;
uint32_t mem_addr;
if (num_words > 1)
{
for (mem_addr = 0; mem_addr < num_words - 1; mem_addr++)
{
//std::cout << "------------------------------------------------------ going to write word " << mem_addr << std::endl;
write_val = 0U;
pow_k = 1;
for (unsigned int k = 0; k < SECONDARY_CODE_WORD_SIZE; k++)
{
// debug
//std::cout << "reading bit position = " << mem_addr*SECONDARY_CODE_WORD_SIZE + k << std::endl;
//std::cout << "bit shift = " << pow_k << std::endl;
std::string string_tmp(1, secondary_code_string->at(mem_addr*SECONDARY_CODE_WORD_SIZE + k));
write_val = write_val | std::stoi(string_tmp)*pow_k;
std::string string_tmp(1, secondary_code_string->at(mem_addr * SECONDARY_CODE_WORD_SIZE + k));
write_val = write_val | std::stoi(string_tmp) * pow_k;
// debug
//std::cout << "computing bit k = " << k << " bit k value = "<< std::stoi(string_tmp) << std::endl;
//std::cout << "computing bit k displaced = " << std::stoi(string_tmp)*pow_k << std::endl;
//std::cout << "write val = " << write_val << std::endl;
// debug
//std::cout << "computing bit k = " << k << " bit k value = "<< std::stoi(string_tmp) << std::endl;
//std::cout << "computing bit k displaced = " << std::stoi(string_tmp)*pow_k << std::endl;
//std::cout << "write val = " << write_val << std::endl;
pow_k = pow_k*2;
}
pow_k = pow_k * 2;
}
//std::cout << "writing secondary code reg addr " << reg_addr << "secondary code value " << write_val << std::endl;
//std::cout << "writing secondary code reg addr " << reg_addr << "secondary code value " << write_val << std::endl;
// debug
//write_val = 0;
// debug
//write_val = 0;
write_val = write_val | mem_addr*SECONDARY_CODE_ADDR_BITS | SECONDARY_CODE_WR_STROBE;
d_map_base[reg_addr] = write_val;
write_val = write_val | mem_addr * SECONDARY_CODE_ADDR_BITS | SECONDARY_CODE_WR_STROBE;
d_map_base[reg_addr] = write_val;
//std::cout << "writing fpga register value " << write_val << std::endl;
//std::cout << "writing fpga register value " << write_val << std::endl;
// debug
// std::cout << "wrote word " << mem_addr << "value is ";
// while (write_val) {
// if (write_val & 1)
// printf("1");
// else
// printf("0");
//
// write_val >>= 1;
// }
// printf("\n");
}
}
write_val = 0U;
pow_k = 1;
mem_addr = num_words - 1;
// debug
// std::cout << "wrote word " << mem_addr << "value is ";
// while (write_val) {
// if (write_val & 1)
// printf("1");
// else
// printf("0");
//
// write_val >>= 1;
// }
// printf("\n");
}
}
write_val = 0U;
pow_k = 1;
mem_addr = num_words - 1;
//std::cout << "------------------------------------------------------ going to write word " << mem_addr << std::endl;
//std::cout << "------------------------------------------------------ going to write word " << mem_addr << std::endl;
for (unsigned int k=0;k<last_word_size;k++)
{
// debug
//std::cout << "reading bit position = " << mem_addr*SECONDARY_CODE_WORD_SIZE + k << std::endl;
//std::cout << "bit shift = " << pow_k << std::endl;
for (unsigned int k = 0; k < last_word_size; k++)
{
// debug
//std::cout << "reading bit position = " << mem_addr*SECONDARY_CODE_WORD_SIZE + k << std::endl;
//std::cout << "bit shift = " << pow_k << std::endl;
std::string string_tmp(1, secondary_code_string->at(mem_addr*SECONDARY_CODE_WORD_SIZE + k));
write_val = write_val | std::stoi(string_tmp)*pow_k;
std::string string_tmp(1, secondary_code_string->at(mem_addr * SECONDARY_CODE_WORD_SIZE + k));
write_val = write_val | std::stoi(string_tmp) * pow_k;
// debug
//std::cout << "computing bit k = " << k << " bit k value = "<< std::stoi(string_tmp) << std::endl;
//std::cout << "computing bit k displaced = " << std::stoi(string_tmp)*pow_k << std::endl;
//std::cout << "write val = " << write_val << std::endl;
// debug
//std::cout << "computing bit k = " << k << " bit k value = "<< std::stoi(string_tmp) << std::endl;
//std::cout << "computing bit k displaced = " << std::stoi(string_tmp)*pow_k << std::endl;
//std::cout << "write val = " << write_val << std::endl;
pow_k = pow_k*2;
pow_k = pow_k * 2;
}
}
// debug
//write_val = 0;
// debug
//write_val = 0;
//std::cout << "writing secondary code reg addr " << reg_addr << "secondary code value " << write_val << std::endl;
//std::cout << "writing secondary code reg addr " << reg_addr << "secondary code value " << write_val << std::endl;
write_val = write_val | (mem_addr * SECONDARY_CODE_ADDR_BITS) | (SECONDARY_CODE_WR_STROBE);
d_map_base[reg_addr] = write_val;
write_val = write_val | (mem_addr*SECONDARY_CODE_ADDR_BITS) | (SECONDARY_CODE_WR_STROBE);
d_map_base[reg_addr] = write_val;
//std::cout << "writing fpga register value " << write_val << std::endl;
//std::cout << "writing fpga register value " << write_val << std::endl;
// // debug
// write_val = write_val | 705200;
// d_map_base[reg_addr] = write_val;
// printf("warning : extending the code length to 20\n");
// std::cout << "writing fpga register value " << write_val << std::endl;
// // debug
// write_val = write_val | 705200;
// d_map_base[reg_addr] = write_val;
// printf("warning : extending the code length to 20\n");
// std::cout << "writing fpga register value " << write_val << std::endl;
// // debug
// //write_val = (SECONDARY_CODE_WR_STROBE) | 0x00055400;
// write_val = (SECONDARY_CODE_WR_STROBE) | 0x00000155;
// d_map_base[reg_addr] = write_val;
// for (unsigned int k=1;k<5;k++)
// {
// write_val = (k*SECONDARY_CODE_ADDR_BITS) | (SECONDARY_CODE_WR_STROBE) | 0x00055555;
// d_map_base[reg_addr] = write_val;
// }
// // debug
// //write_val = (SECONDARY_CODE_WR_STROBE) | 0x00055400;
// write_val = (SECONDARY_CODE_WR_STROBE) | 0x00000155;
// d_map_base[reg_addr] = write_val;
// for (unsigned int k=1;k<5;k++)
// {
// write_val = (k*SECONDARY_CODE_ADDR_BITS) | (SECONDARY_CODE_WR_STROBE) | 0x00055555;
// d_map_base[reg_addr] = write_val;
// }
// // debug
// std::cout << "wrote word " << mem_addr << " value is " << write_val << " = ";
// while (write_val) {
// if (write_val & 1)
// printf("1");
// else
// printf("0");
//
// write_val >>= 1;
// }
// printf("\n");
//printf("\n=============================================================================* END OF THIS\n");
// // debug
// std::cout << "wrote word " << mem_addr << " value is " << write_val << " = ";
// while (write_val) {
// if (write_val & 1)
// printf("1");
// else
// printf("0");
//
// write_val >>= 1;
// }
// printf("\n");
//printf("\n=============================================================================* END OF THIS\n");
}
//void Fpga_Multicorrelator_8sc::init_secondary_code_indices(void)
@ -730,19 +718,18 @@ void Fpga_Multicorrelator_8sc::write_secondary_code(uint32_t secondary_code_leng
void Fpga_Multicorrelator_8sc::enable_secondary_codes()
{
d_map_base[DROP_SAMPLES_REG_ADDR] = INIT_SECONDARY_CODE_ADDRESSES | ENABLE_SECONDARY_CODE; // enable secondary codes and clear secondary code indices
d_secondary_code_enabled = true;
//std::cout << "enabling secondary codes d_map_base[DROP_SAMPLES_REG_ADDR] = " << (INIT_SECONDARY_CODE_ADDRESSES | ENABLE_SECONDARY_CODE) << std::endl;
d_map_base[DROP_SAMPLES_REG_ADDR] = INIT_SECONDARY_CODE_ADDRESSES | ENABLE_SECONDARY_CODE; // enable secondary codes and clear secondary code indices
d_secondary_code_enabled = true;
//std::cout << "enabling secondary codes d_map_base[DROP_SAMPLES_REG_ADDR] = " << (INIT_SECONDARY_CODE_ADDRESSES | ENABLE_SECONDARY_CODE) << std::endl;
// // debug
// printf("do not enable secondary code on purpose\n");
// d_map_base[DROP_SAMPLES_REG_ADDR] = 0;
// // debug
// printf("do not enable secondary code on purpose\n");
// d_map_base[DROP_SAMPLES_REG_ADDR] = 0;
}
void Fpga_Multicorrelator_8sc::disable_secondary_codes()
{
// this function is to be called before starting the tracking process in order to disable the secondary codes by default
//printf("xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx disabling secondary codes in fpga\n");
d_map_base[DROP_SAMPLES_REG_ADDR] = DROP_SAMPLES;
// this function is to be called before starting the tracking process in order to disable the secondary codes by default
//printf("xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx disabling secondary codes in fpga\n");
d_map_base[DROP_SAMPLES_REG_ADDR] = DROP_SAMPLES;
}

20
src/algorithms/tracking/libs/fpga_multicorrelator.h
View File

@ -73,12 +73,12 @@
#define SAMPLE_COUNTER_REG_ADDR_MSW 14
// FPGA-related constants
#define SECONDARY_CODE_WORD_SIZE 20 // the secondary codes are written in to the FPGA in words of SECONDARY_CODE_WORD_SIZE bits
#define SECONDARY_CODE_WR_STROBE 0x800000 // write strobe position in the secondary code write register
#define SECONDARY_CODE_ADDR_BITS 0x100000 // memory address position in the secondary code write register
#define DROP_SAMPLES 1 // bit 0 of DROP_SAMPLES_REG_ADDR
#define ENABLE_SECONDARY_CODE 2 // bit 1 of DROP_SAMPLES_REG_ADDR
#define INIT_SECONDARY_CODE_ADDRESSES 4 // bit 2 of DROP_SAMPLES_REG_ADDR
#define SECONDARY_CODE_WORD_SIZE 20 // the secondary codes are written in to the FPGA in words of SECONDARY_CODE_WORD_SIZE bits
#define SECONDARY_CODE_WR_STROBE 0x800000 // write strobe position in the secondary code write register
#define SECONDARY_CODE_ADDR_BITS 0x100000 // memory address position in the secondary code write register
#define DROP_SAMPLES 1 // bit 0 of DROP_SAMPLES_REG_ADDR
#define ENABLE_SECONDARY_CODE 2 // bit 1 of DROP_SAMPLES_REG_ADDR
#define INIT_SECONDARY_CODE_ADDRESSES 4 // bit 2 of DROP_SAMPLES_REG_ADDR
/*!
* \brief Class that implements carrier wipe-off and correlators.
@ -105,15 +105,15 @@ public:
uint64_t read_sample_counter();
void lock_channel(void);
void unlock_channel(void);
// void initialize_secondary_codes(bool track_pilot,
// uint32_t secondary_code_length_data, std::string *secondary_code_string_data,
// uint32_t secondary_code_length_pilot, std::string *secondary_code_string_pilot);
// void initialize_secondary_codes(bool track_pilot,
// uint32_t secondary_code_length_data, std::string *secondary_code_string_data,
// uint32_t secondary_code_length_pilot, std::string *secondary_code_string_pilot);
void set_secondary_code_lengths(uint32_t secondary_code_0_length, uint32_t secondary_code_1_length);
void initialize_secondary_code(uint32_t secondary_code, std::string *secondary_code_string);
void update_secondary_code_length(uint32_t first_length_secondary_code, uint32_t next_length_secondary_code);
void enable_secondary_codes();
void disable_secondary_codes();
// void init_secondary_code_indices();
// void init_secondary_code_indices();
private:

4
src/tests/unit-tests/signal-processing-blocks/tracking/gps_l1_ca_dll_pll_tracking_test_fpga.cc
View File

@ -209,8 +209,8 @@ GpsL1CADllPllTrackingTestFpga_msg_rx::GpsL1CADllPllTrackingTestFpga_msg_rx() : g
this->message_port_register_in(pmt::mp("events"));
this->set_msg_handler(pmt::mp("events"),
boost::bind(
&GpsL1CADllPllTrackingTestFpga_msg_rx::msg_handler_events,
this, _1));
&GpsL1CADllPllTrackingTestFpga_msg_rx::msg_handler_events,
this, _1));
rx_message = 0;
}