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Author SHA1 Message Date
Carles Fernandez
9efff7382d
Fix detection of Python modules when using Macports 2019-04-09 00:42:10 +02:00
Carles Fernandez
8ea4fd1317
Merge branch 'mmajoral-fpga' into next 2019-04-08 11:15:50 +02:00
Carles Fernandez
cc162dac9e
Code cleaning 2019-04-08 11:14:41 +02:00
Marc Majoral
6696e378c5 updated the reference value for the gain of the fft-ifft 2019-04-05 15:15:02 +02:00
Marc Majoral
6979e561b8 Merge branch 'next' of https://github.com/gnss-sdr/gnss-sdr into fpga 2019-04-04 19:55:56 +02:00
Marc Majoral
ff024e7292 cleaned unused code and added some comments. 2019-04-04 19:55:02 +02:00
Marc Majoral
eda3f21fb9 added the reading of the high_dyn parameter in the tracking adapter modules + added max_num_acqs parameter for the FPGA acquisition. 2019-04-04 16:10:29 +02:00
Javier Arribas
89c8f3eac9 Improving tracking plot script 2019-04-03 16:04:09 +02:00
Javier Arribas
02db271011 Set default Galileo E1 VE and VL correlator spacing to 0.5 2019-04-03 15:28:56 +02:00
Javier Arribas
fdf86ef75b Adjusting the optimal bandwidth for the automatic acquisition resampler in GPS L1 and L2C 2019-04-03 15:27:26 +02:00
Javier Arribas
bd22ef5153 Improving DLL discriminators implementation 2019-04-03 15:25:40 +02:00
Marc Majoral
d8e8b8a5a0 solved a bug in the E1 data code generation optimization 2019-04-03 10:21:16 +02:00
Marc Majoral
553946fb65 moved the setting of the flags for the writing of the local code to the initialization, to save cpu cycles during tracking. 2019-04-02 20:36:48 +02:00
Marc Majoral
a6110eb334 moved the calculations related to the local code that is specific to the FPGA to the initialisation phase of the tracking modules to save clock cycles during real-time tracking. 2019-04-02 18:46:37 +02:00
Marc Majoral
db05be36d1 removed non essential instructions in start_tracking() function and moved them to set_gnss_synchro (which is called with a valid PRN before starting an acquisition of a new channel) 2019-04-02 15:53:16 +02:00
Marc Majoral
5bc7a778e9 commented out the old DLL and PLL filters in the tracking modules + removed some old not used code in the acquisition that was already commented out. 2019-04-02 13:10:09 +02:00
Carles Fernandez
ae7686d4ad
Fix reading of environment variables 2019-04-02 03:31:46 +02:00
Carles Fernandez
8bce979242
Clean scripts. Prevent in-tree build 2019-04-02 02:41:20 +02:00
Marc Majoral
edac9923ae updated the tracking code loop filter, the carrier filter and the d_Prompt circular buffer. 2019-04-01 12:38:45 +02:00
Javier Arribas
dc6876e1c9 Adding null sinks to unconnected signal conditioners automatically to enable partial use of multichannel sources 2019-03-29 17:36:05 +01:00
Javier Arribas
dff91e1216 Improving Flexiband signal source multichannel configuration options 2019-03-29 17:34:06 +01:00
Marc Majoral
fb38247273 updated the tracking adapters and added new FPGA tracking correlator parameters according to what is implemented in the SW tracking correlator. 2019-03-28 12:30:57 +01:00
Marc Majoral
3098ca1a48 added the reception of messages from the telemetry module to the FPGA tracking modules. 2019-03-27 16:59:04 +01:00
Marc Majoral
3249f55029 Merge branch 'next' of https://github.com/gnss-sdr/gnss-sdr into fpga 2019-03-27 12:38:43 +01:00
Marc Majoral
4164d28abf solved a bug: the acquisition device driver was not properly closed if double acquisition was enabled and the second acquisition was not successful. 2019-03-27 12:35:36 +01:00
Marc Majoral
47b405f92d commented out debug messages that increase the time between accquisition and tracking 2019-03-27 11:57:31 +01:00
Carles Fernandez
1cf49f461a
Merge branch 'merge-dmiralles2009-bds_b3i' into next 
BeiDou B3I bug fixes #261
 2019-03-27 00:31:41 +01:00
Carles Fernandez
0f2e350d3c
Apply code formatting 2019-03-26 23:05:18 +01:00
Carles Fernandez
b6cb3c6a08
Move Beidou acq tests to extra, since they need binary files. Make those files downloadable from Sourceforge 2019-03-26 23:04:08 +01:00
Carles Fernandez
77851e5589
BeiDou B3I bug fixes (credits to dmiralles2019) 2019-03-26 22:34:08 +01:00
Damian Miralles
1a2d90a8f1
bds_b3i: fixing bugs in pvt computation 2019-03-26 22:15:31 +01:00
Marc Majoral
58a0de006e corrected comment 2019-03-26 16:41:20 +01:00
Marc Majoral
63cee0e63b In order to reduce the CPU workload, the FPGA acquisition does not close and open the device driver in between the first and the second acquisition anymore. 2019-03-26 16:35:19 +01:00
Marc Majoral
cbc8131677 optimized the computation of FPGA acquisition doppler shift and dopper step registers 
removed unnecessary function call
 2019-03-26 16:22:49 +01:00
Marc Majoral
9d7f8be4ef Merge branch 'next' of https://github.com/gnss-sdr/gnss-sdr into fpga 2019-03-26 12:30:36 +01:00
Marc Majoral
2b46c79ba7 optimized the process of computing and writing the fft of the local code to the acquisition HW accelerator. 
The writing of the local code is still performed by processor instructions in a loop.
THe FPGA L2 classes were updated accordingly.
 2019-03-26 12:26:08 +01:00
Marc Majoral
905a85670c currently optimizing the FPGA-related code 2019-03-25 19:45:54 +01:00
Carles Fernandez
41036c1538
Fix kernel 2019-03-24 19:53:51 +01:00
Carles Fernandez
d8f1e4b437
Increase required accuracy in 32-bit rotator_dot_prod test results 2019-03-24 19:35:53 +01:00
Carles Fernandez
441ff637eb
Fix AVX implementation 
Samples that are remanent from num_points / 16 were not adecuately integrated
 2019-03-24 13:50:12 +01:00
Carles Fernandez
b0199e1061
Improve style consistency 2019-03-23 14:24:49 +01:00
Carles Fernandez
7587d5fd4b
Update changelog 2019-03-23 13:59:31 +01:00
Carles Fernandez
026f045b93
Clean anotations (remove trailing /) 2019-03-23 13:15:25 +01:00
Carles Fernandez
1b0697fdf9
Simplify script 2019-03-23 12:59:49 +01:00
Carles Fernandez
28ade25157
Improve OpenSSL detection in Homebrew and messages if it fails 2019-03-23 12:57:45 +01:00
Carles Fernandez
b0f971fc56
Remove wrong lines from old script 2019-03-23 11:31:53 +01:00
Carles Fernandez
e2d3ad53a1
Add openSUSE to the list of distributions, reorder alphabetically 2019-03-23 11:28:50 +01:00
Carles Fernandez
a94e74def2
Search for generic BLAS and LAPACK implementations 2019-03-23 00:43:01 +01:00
Marc Majoral
2bae20d2fd Merge branch 'next' of https://github.com/gnss-sdr/gnss-sdr into fpga 
added second acquisition to reduce the time between acquisition and tracking when using the FPGA
moved the process of writing of the tracking local code to the HW accelerator from the start_tracking() function to the set_gnss_synchro() function (this is only applicable for the FPGA case)
there was a bug in the computation of the tracking starting position for the L1/E1 band when using the FPGA, only high sample counter values (>31 bits) were affected, due to a uint64_t*float mult.
 2019-03-22 19:03:46 +01:00
Javier Arribas
c877e74565 -Adding more FPGA helpers to channel operations 2019-03-22 18:11:45 +01:00