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https://github.com/gnss-sdr/gnss-sdr
synced 2024-12-14 20:20:35 +00:00
moved the setting of the flags for the writing of the local code to the initialization, to save cpu cycles during tracking.
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a6110eb334
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@ -48,6 +48,10 @@
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#include <cstring> // for memcpy
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#include <iostream> // for operator<<,
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// the following flag is FPGA-specific and they are using during the local code initialisation in the SW to save CPU cycles during tracking
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#define LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY 0x0C000000 // flag that enables WE (Write Enable) of the local code FPGA
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#define LOCAL_CODE_FPGA_CORRELATOR_SELECT_COUNT 0x20000000 // flag that selects the writing of the pilot code in the FPGA (as opposed to the data code)
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GalileoE1DllPllVemlTrackingFpga::GalileoE1DllPllVemlTrackingFpga(
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ConfigurationInterface* configuration, const std::string& role,
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@ -236,12 +240,14 @@ GalileoE1DllPllVemlTrackingFpga::GalileoE1DllPllVemlTrackingFpga(
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{
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tmp_value = 0;
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}
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tmp_value = tmp_value | LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY;
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d_ca_codes[static_cast<int32_t>(GALILEO_E1_B_CODE_LENGTH_CHIPS) * 2 * (PRN - 1) + s] = tmp_value;
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tmp_value = static_cast<int32_t>(data_codes_f[s]);
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if (tmp_value < 0)
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{
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tmp_value = 0;
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}
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tmp_value = tmp_value | LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY | LOCAL_CODE_FPGA_CORRELATOR_SELECT_COUNT;
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d_data_codes[static_cast<int32_t>(GALILEO_E1_B_CODE_LENGTH_CHIPS) * 2 * (PRN - 1) + s] = tmp_value;
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}
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}
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@ -257,6 +263,7 @@ GalileoE1DllPllVemlTrackingFpga::GalileoE1DllPllVemlTrackingFpga(
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{
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tmp_value = 0;
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}
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tmp_value = tmp_value | LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY;
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d_ca_codes[static_cast<int32_t>(GALILEO_E1_B_CODE_LENGTH_CHIPS) * 2 * (PRN - 1) + s] = tmp_value;
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}
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}
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@ -45,6 +45,10 @@
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#include <cstring> // for memcpy
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#include <iostream>
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// the following flag is FPGA-specific and they are using during the local code initialisation in the SW to save CPU cycles during tracking
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#define LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY 0x0C000000 // flag that enables WE (Write Enable) of the local code FPGA
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#define LOCAL_CODE_FPGA_CORRELATOR_SELECT_COUNT 0x20000000 // flag that selects the writing of the pilot code in the FPGA (as opposed to the data code)
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GalileoE5aDllPllTrackingFpga::GalileoE5aDllPllTrackingFpga(
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ConfigurationInterface *configuration, const std::string &role,
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@ -223,6 +227,7 @@ GalileoE5aDllPllTrackingFpga::GalileoE5aDllPllTrackingFpga(
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{
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tmp_value = 0;
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}
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tmp_value = tmp_value | LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY;
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d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = tmp_value;
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tmp_value = static_cast<int32_t>(aux_code[s].real());
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@ -230,6 +235,7 @@ GalileoE5aDllPllTrackingFpga::GalileoE5aDllPllTrackingFpga(
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{
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tmp_value = 0;
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}
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tmp_value = tmp_value | LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY | LOCAL_CODE_FPGA_CORRELATOR_SELECT_COUNT;
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d_data_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = tmp_value;
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//d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = static_cast<int32_t>(aux_code[s].imag());
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//d_data_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = static_cast<int32_t>(aux_code[s].real());
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@ -245,6 +251,7 @@ GalileoE5aDllPllTrackingFpga::GalileoE5aDllPllTrackingFpga(
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{
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tmp_value = 0;
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}
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tmp_value = tmp_value | LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY;
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d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = tmp_value;
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//d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = static_cast<int32_t>(aux_code[s].real());
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}
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@ -48,8 +48,10 @@
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#include <cstring> // for memcpy
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#include <iostream>
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#define NUM_PRNs 32
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#define NUM_PRNs 32 // total number of PRNs
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// the following flag is FPGA-specific and they are using during the local code initialisation in the SW to save CPU cycles during tracking
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#define LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY 0x0C000000 // flag that enables WE (Write Enable) of the local code FPGA
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GpsL1CaDllPllTrackingFpga::GpsL1CaDllPllTrackingFpga(
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ConfigurationInterface* configuration, const std::string& role,
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@ -214,10 +216,13 @@ GpsL1CaDllPllTrackingFpga::GpsL1CaDllPllTrackingFpga(
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// The code is generated as a series of 1s and -1s. In order to store the values using only one bit, a -1 is stored as a 0 in the FPGA
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for (uint32_t k = 0; k < GPS_L1_CA_CODE_LENGTH_CHIPS; k++)
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{
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if (d_ca_codes[(int32_t(GPS_L1_CA_CODE_LENGTH_CHIPS)) * (PRN - 1) + k] < 0)
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int32_t tmp_value = d_ca_codes[(int32_t(GPS_L1_CA_CODE_LENGTH_CHIPS)) * (PRN - 1) + k];
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if (tmp_value < 0)
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{
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d_ca_codes[(int32_t(GPS_L1_CA_CODE_LENGTH_CHIPS)) * (PRN - 1) + k] = 0;
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tmp_value = 0;
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}
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tmp_value = tmp_value | LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY;
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d_ca_codes[(int32_t(GPS_L1_CA_CODE_LENGTH_CHIPS)) * (PRN - 1) + k] = tmp_value;
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}
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}
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trk_param_fpga.ca_codes = d_ca_codes;
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@ -50,7 +50,11 @@
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#include <cstring> // for memcpy
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#include <iostream>
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#define NUM_PRNs 32
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#define NUM_PRNs 32 // number of PRNS
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// the following flag is FPGA-specific and they are using during the local code initialisation in the SW to save CPU cycles during tracking
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#define LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY 0x0C000000 // flag that enables WE (Write Enable) of the local code FPGA
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#define LOCAL_CODE_FPGA_CORRELATOR_SELECT_COUNT 0x20000000 // flag that selects the writing of the pilot code in the FPGA (as opposed to the data code)
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GpsL5DllPllTrackingFpga::GpsL5DllPllTrackingFpga(
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@ -241,6 +245,7 @@ GpsL5DllPllTrackingFpga::GpsL5DllPllTrackingFpga(
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{
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tmp_value = 0;
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}
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tmp_value = tmp_value | LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY;
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d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = tmp_value;
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tmp_value = static_cast<int32_t>(data_code[s]);
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@ -248,6 +253,7 @@ GpsL5DllPllTrackingFpga::GpsL5DllPllTrackingFpga(
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{
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tmp_value = 0;
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}
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tmp_value = tmp_value | LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY | LOCAL_CODE_FPGA_CORRELATOR_SELECT_COUNT;
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d_data_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = tmp_value;
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//d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = static_cast<int32_t>(tracking_code[s]);
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@ -266,6 +272,7 @@ GpsL5DllPllTrackingFpga::GpsL5DllPllTrackingFpga(
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{
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tmp_value = 0;
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}
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tmp_value = tmp_value | LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY;
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d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = tmp_value;
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//d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = static_cast<int32_t>(tracking_code[s]);
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}
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@ -300,8 +300,8 @@ uint32_t Fpga_Multicorrelator_8sc::fpga_acquisition_test_register(
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void Fpga_Multicorrelator_8sc::fpga_configure_tracking_gps_local_code(int32_t PRN)
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{
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uint32_t k;
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uint32_t code_chip;
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uint32_t select_pilot_corelator = LOCAL_CODE_FPGA_CORRELATOR_SELECT_COUNT;
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//uint32_t code_chip;
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//uint32_t select_pilot_corelator = LOCAL_CODE_FPGA_CORRELATOR_SELECT_COUNT;
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d_map_base[PROG_MEMS_ADDR] = LOCAL_CODE_FPGA_CLEAR_ADDRESS_COUNTER;
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for (k = 0; k < d_code_length_samples; k++)
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@ -314,9 +314,11 @@ void Fpga_Multicorrelator_8sc::fpga_configure_tracking_gps_local_code(int32_t PR
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// {
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// code_chip = 0;
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// }
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code_chip = d_ca_codes[(d_code_length_samples * (PRN - 1)) + k];
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//code_chip = d_ca_codes[(d_code_length_samples * (PRN - 1)) + k];
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// copy the local code to the FPGA memory one by one
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d_map_base[PROG_MEMS_ADDR] = LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY | code_chip; // | select_fpga_correlator;
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//d_map_base[PROG_MEMS_ADDR] = LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY | code_chip; // | select_fpga_correlator;
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d_map_base[PROG_MEMS_ADDR] = d_ca_codes[(d_code_length_samples * (PRN - 1)) + k];
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; // | select_fpga_correlator;
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}
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if (d_track_pilot)
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{
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@ -331,8 +333,9 @@ void Fpga_Multicorrelator_8sc::fpga_configure_tracking_gps_local_code(int32_t PR
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// {
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// code_chip = 0;
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// }
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code_chip = d_data_codes[(d_code_length_samples * (PRN - 1)) + k];
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d_map_base[PROG_MEMS_ADDR] = LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY | code_chip | select_pilot_corelator;
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//code_chip = d_data_codes[(d_code_length_samples * (PRN - 1)) + k];
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//d_map_base[PROG_MEMS_ADDR] = LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY | code_chip | select_pilot_corelator;
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d_map_base[PROG_MEMS_ADDR] = d_data_codes[(d_code_length_samples * (PRN - 1)) + k];
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}
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}
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