mirror of
https://github.com/gnss-sdr/gnss-sdr
synced 2024-12-14 20:20:35 +00:00
moved the calculations related to the local code that is specific to the FPGA to the initialisation phase of the tracking modules to save clock cycles during real-time tracking.
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db05be36d1
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a6110eb334
@ -83,7 +83,7 @@ GalileoE1DllPllVemlTrackingFpga::GalileoE1DllPllVemlTrackingFpga(
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}
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trk_param_fpga.pll_bw_hz = pll_bw_hz;
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float dll_bw_hz = configuration->property(role + ".dll_bw_hz", 0.5);
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if (FLAGS_dll_bw_hz != 0.0)
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if (FLAGS_dll_bw_hz != 0.0)
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{
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dll_bw_hz = static_cast<float>(FLAGS_dll_bw_hz);
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}
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@ -228,19 +228,36 @@ GalileoE1DllPllVemlTrackingFpga::GalileoE1DllPllVemlTrackingFpga(
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galileo_e1_code_gen_sinboc11_float(ca_codes_f, pilot_signal, PRN);
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galileo_e1_code_gen_sinboc11_float(data_codes_f, data_signal, PRN);
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// The code is generated as a series of 1s and -1s. In order to store the values using only one bit, a -1 is stored as a 0 in the FPGA
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for (uint32_t s = 0; s < 2 * GALILEO_E1_B_CODE_LENGTH_CHIPS; s++)
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{
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d_ca_codes[static_cast<int32_t>(GALILEO_E1_B_CODE_LENGTH_CHIPS) * 2 * (PRN - 1) + s] = static_cast<int32_t>(ca_codes_f[s]);
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d_data_codes[static_cast<int32_t>(GALILEO_E1_B_CODE_LENGTH_CHIPS) * 2 * (PRN - 1) + s] = static_cast<int32_t>(data_codes_f[s]);
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int32_t tmp_value = static_cast<int32_t>(ca_codes_f[s]);
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if (tmp_value < 0)
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{
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tmp_value = 0;
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}
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d_ca_codes[static_cast<int32_t>(GALILEO_E1_B_CODE_LENGTH_CHIPS) * 2 * (PRN - 1) + s] = tmp_value;
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tmp_value = static_cast<int32_t>(data_codes_f[s]);
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if (tmp_value < 0)
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{
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tmp_value = 0;
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}
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d_data_codes[static_cast<int32_t>(GALILEO_E1_B_CODE_LENGTH_CHIPS) * 2 * (PRN - 1) + s] = tmp_value;
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}
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}
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else
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{
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galileo_e1_code_gen_sinboc11_float(ca_codes_f, data_signal, PRN);
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// The code is generated as a series of 1s and -1s. In order to store the values using only one bit, a -1 is stored as a 0 in the FPGA
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for (uint32_t s = 0; s < 2 * GALILEO_E1_B_CODE_LENGTH_CHIPS; s++)
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{
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d_ca_codes[static_cast<int32_t>(GALILEO_E1_B_CODE_LENGTH_CHIPS) * 2 * (PRN - 1) + s] = static_cast<int32_t>(ca_codes_f[s]);
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uint32_t tmp_value = static_cast<int32_t>(ca_codes_f[s]);
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if (tmp_value < 0)
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{
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tmp_value = 0;
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}
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d_ca_codes[static_cast<int32_t>(GALILEO_E1_B_CODE_LENGTH_CHIPS) * 2 * (PRN - 1) + s] = tmp_value;
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}
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}
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}
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@ -212,19 +212,41 @@ GalileoE5aDllPllTrackingFpga::GalileoE5aDllPllTrackingFpga(
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for (uint32_t PRN = 1; PRN <= GALILEO_E5A_NUMBER_OF_CODES; PRN++)
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{
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galileo_e5_a_code_gen_complex_primary(aux_code, PRN, const_cast<char *>(sig_));
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if (trk_param_fpga.track_pilot)
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{
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// The code is generated as a series of 1s and -1s. In order to store the values using only one bit, a -1 is stored as a 0 in the FPGA
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for (uint32_t s = 0; s < code_length_chips; s++)
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{
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d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = static_cast<int32_t>(aux_code[s].imag());
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d_data_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = static_cast<int32_t>(aux_code[s].real());
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int32_t tmp_value = static_cast<int32_t>(aux_code[s].imag());
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if (tmp_value < 0)
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{
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tmp_value = 0;
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}
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d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = tmp_value;
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tmp_value = static_cast<int32_t>(aux_code[s].real());
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if (tmp_value < 0)
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{
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tmp_value = 0;
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}
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d_data_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = tmp_value;
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//d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = static_cast<int32_t>(aux_code[s].imag());
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//d_data_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = static_cast<int32_t>(aux_code[s].real());
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}
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}
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else
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{
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// The code is generated as a series of 1s and -1s. In order to store the values using only one bit, a -1 is stored as a 0 in the FPGA
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for (uint32_t s = 0; s < code_length_chips; s++)
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{
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d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = static_cast<int32_t>(aux_code[s].real());
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int32_t tmp_value = static_cast<int32_t>(aux_code[s].real());
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if (tmp_value < 0)
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{
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tmp_value = 0;
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}
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d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = tmp_value;
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//d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = static_cast<int32_t>(aux_code[s].real());
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}
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}
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}
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@ -210,6 +210,15 @@ GpsL1CaDllPllTrackingFpga::GpsL1CaDllPllTrackingFpga(
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for (uint32_t PRN = 1; PRN <= NUM_PRNs; PRN++)
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{
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gps_l1_ca_code_gen_int(&d_ca_codes[(int32_t(GPS_L1_CA_CODE_LENGTH_CHIPS)) * (PRN - 1)], PRN, 0);
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// The code is generated as a series of 1s and -1s. In order to store the values using only one bit, a -1 is stored as a 0 in the FPGA
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for (uint32_t k = 0; k < GPS_L1_CA_CODE_LENGTH_CHIPS; k++)
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{
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if (d_ca_codes[(int32_t(GPS_L1_CA_CODE_LENGTH_CHIPS)) * (PRN - 1) + k] < 0)
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{
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d_ca_codes[(int32_t(GPS_L1_CA_CODE_LENGTH_CHIPS)) * (PRN - 1) + k] = 0;
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}
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}
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}
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trk_param_fpga.ca_codes = d_ca_codes;
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trk_param_fpga.code_length_chips = GPS_L1_CA_CODE_LENGTH_CHIPS;
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@ -233,18 +233,41 @@ GpsL5DllPllTrackingFpga::GpsL5DllPllTrackingFpga(
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gps_l5q_code_gen_float(tracking_code, PRN);
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gps_l5i_code_gen_float(data_code, PRN);
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// The code is generated as a series of 1s and -1s. In order to store the values using only one bit, a -1 is stored as a 0 in the FPGA
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for (uint32_t s = 0; s < code_length_chips; s++)
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{
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d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = static_cast<int32_t>(tracking_code[s]);
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d_data_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = static_cast<int32_t>(data_code[s]);
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int32_t tmp_value = static_cast<int32_t>(tracking_code[s]);
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if (tmp_value < 0)
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{
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tmp_value = 0;
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}
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d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = tmp_value;
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tmp_value = static_cast<int32_t>(data_code[s]);
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if (tmp_value < 0)
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{
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tmp_value = 0;
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}
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d_data_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = tmp_value;
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//d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = static_cast<int32_t>(tracking_code[s]);
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//d_data_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = static_cast<int32_t>(data_code[s]);
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}
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}
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else
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{
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gps_l5i_code_gen_float(tracking_code, PRN);
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// The code is generated as a series of 1s and -1s. In order to store the values using only one bit, a -1 is stored as a 0 in the FPGA
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for (uint32_t s = 0; s < code_length_chips; s++)
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{
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d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = static_cast<int32_t>(tracking_code[s]);
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int32_t tmp_value = static_cast<int32_t>(tracking_code[s]);
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if (tmp_value < 0)
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{
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tmp_value = 0;
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}
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d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = tmp_value;
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//d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = static_cast<int32_t>(tracking_code[s]);
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}
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}
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}
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@ -306,15 +306,15 @@ void Fpga_Multicorrelator_8sc::fpga_configure_tracking_gps_local_code(int32_t PR
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d_map_base[PROG_MEMS_ADDR] = LOCAL_CODE_FPGA_CLEAR_ADDRESS_COUNTER;
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for (k = 0; k < d_code_length_samples; k++)
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{
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if (d_ca_codes[(d_code_length_samples * (PRN - 1)) + k] == 1)
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{
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code_chip = 1;
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}
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else
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{
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code_chip = 0;
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}
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// if (d_ca_codes[(d_code_length_samples * (PRN - 1)) + k] == 1)
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// {
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// code_chip = 1;
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// }
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// else
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// {
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// code_chip = 0;
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// }
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code_chip = d_ca_codes[(d_code_length_samples * (PRN - 1)) + k];
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// copy the local code to the FPGA memory one by one
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d_map_base[PROG_MEMS_ADDR] = LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY | code_chip; // | select_fpga_correlator;
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}
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@ -323,14 +323,15 @@ void Fpga_Multicorrelator_8sc::fpga_configure_tracking_gps_local_code(int32_t PR
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d_map_base[PROG_MEMS_ADDR] = LOCAL_CODE_FPGA_CLEAR_ADDRESS_COUNTER;
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for (k = 0; k < d_code_length_samples; k++)
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{
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if (d_data_codes[(d_code_length_samples * (PRN - 1)) + k] == 1)
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{
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code_chip = 1;
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}
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else
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{
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code_chip = 0;
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}
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// if (d_data_codes[(d_code_length_samples * (PRN - 1)) + k] == 1)
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// {
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// code_chip = 1;
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// }
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// else
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// {
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// code_chip = 0;
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// }
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code_chip = d_data_codes[(d_code_length_samples * (PRN - 1)) + k];
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d_map_base[PROG_MEMS_ADDR] = LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY | code_chip | select_pilot_corelator;
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}
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}
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