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dd996bc2e2
Commit Graph

274 Commits

Author SHA1 Message Date
Marc Majoral
dd996bc2e2 Merge branch 'next' of https://github.com/mmajoral/gnss-sdr into fpga_extended_coherent_integration 2019-07-18 11:35:34 +02:00
Marc Majoral
4c22a1ce1a the tracking module is now sending 1 synchro_data per data symbol. 2019-07-17 18:01:27 +02:00
Carles Fernandez
d7460022ed
Avoid C arrays 
See https://clang.llvm.org/extra/clang-tidy/checks/modernize-avoid-c-arrays.html
 2019-07-14 14:09:12 +02:00
Marc Majoral
58cc961aec Merge branch 'next' of https://github.com/mmajoral/gnss-sdr into fpga_extended_coherent_integration 2019-07-10 18:08:30 +02:00
Marc Majoral
c8ccd5ef91 Merge branch 'next' of https://github.com/mmajoral/gnss-sdr into fpga_extended_coherent_integration 2019-07-04 12:55:36 +02:00
Marc Majoral
feccc62c04 solved some bugs related to the extended integration in the FPGA 2019-07-04 12:48:35 +02:00
Javier Arribas
cf967be252 Consolidating unified dll pll veml tracking to synchronize symbols for GPS L1, L5, Galileo E1, E5 and Beidou B1, B3. Beidou bug fixes in acquisition. Adapting all telemetry decoders to use 1 sample per symbol 2019-07-03 18:57:26 +02:00
Carles Fernandez
587ec66e78 Remove wrong delete 2019-07-01 11:03:18 +02:00
Carles Fernandez
5e42795677
Use auto 2019-06-30 12:09:11 +02:00
Carles Fernandez
d5e5e5725d
Apply fixes by clang-tidy 2019-06-30 00:01:54 +02:00
Carles Fernandez
751f54990c
Introduce gsl::span. Bound checking at compile time, no overhead at runtime 
See https://github.com/isocpp/CppCoreGuidelines/blob/master/CppCoreGuidelines.md
 2019-06-29 01:28:30 +02:00
Marc Majoral
2982961e49 currently making changes to be able to extend the FPGA coherent integration beyond 20 ms for GPS L1, 1 ms for Galileo E1, 10 ms for GPS L5 and 20 ms for Galileo E5a using SW. 2019-06-28 10:54:19 +02:00
Carles Fernandez
0e5211dbf0
Modern CUDA usage 2019-06-24 20:02:19 +02:00
Marc Majoral
b48a70b9dd enabled FPGA extended coherent integration by default 2019-06-18 19:36:02 +02:00
Marc Majoral
05d006d1f9 Merge branch 'next' of https://github.com/mmajoral/gnss-sdr into fpga_extended_coherent_integration 2019-06-18 18:25:24 +02:00
Marc Majoral
33d1115246 added support for extended coherent integration in the FPGA. The code still needs to be optimized and cleaned. 2019-06-18 18:22:01 +02:00
Javier Arribas
88f78a107c Improving unified tracking. Added Doppler frequency correction for false PLL lock 2019-06-14 12:52:46 +02:00
Javier Arribas
559080b651 Improving tracking stability of carrier lock detector 2019-06-11 20:20:23 +02:00
Javier Arribas
e7517dc86d Removing superseded GPS tracking block. Carrier Aiding is now included in unified tracking 2019-06-11 10:11:20 +02:00
Marc Majoral
6979e561b8 Merge branch 'next' of https://github.com/gnss-sdr/gnss-sdr into fpga 2019-04-04 19:55:56 +02:00
Marc Majoral
ff024e7292 cleaned unused code and added some comments. 2019-04-04 19:55:02 +02:00
Marc Majoral
eda3f21fb9 added the reading of the high_dyn parameter in the tracking adapter modules + added max_num_acqs parameter for the FPGA acquisition. 2019-04-04 16:10:29 +02:00
Javier Arribas
02db271011 Set default Galileo E1 VE and VL correlator spacing to 0.5 2019-04-03 15:28:56 +02:00
Marc Majoral
d8e8b8a5a0 solved a bug in the E1 data code generation optimization 2019-04-03 10:21:16 +02:00
Marc Majoral
553946fb65 moved the setting of the flags for the writing of the local code to the initialization, to save cpu cycles during tracking. 2019-04-02 20:36:48 +02:00
Marc Majoral
a6110eb334 moved the calculations related to the local code that is specific to the FPGA to the initialisation phase of the tracking modules to save clock cycles during real-time tracking. 2019-04-02 18:46:37 +02:00
Marc Majoral
fb38247273 updated the tracking adapters and added new FPGA tracking correlator parameters according to what is implemented in the SW tracking correlator. 2019-03-28 12:30:57 +01:00
Carles Fernandez
6a17a33d6f
Expose more tracking parameters to the configuration: filters order, FLL usage, pull-in time 2019-03-21 19:21:39 +01:00
Carles Fernandez
597ef26092
Minor fixes 2019-03-18 19:28:35 +01:00
Carles Fernandez
52c69073ac
Apply clang-tidy fixes 2019-03-18 09:10:00 +01:00
Carles Fernandez
ed9aaf86ce
Fix building, apply formatting 2019-03-18 08:43:38 +01:00
Damian Miralles
dc65760122
bds_b3i: Updating branch with new changes from upstream repo 2019-03-12 10:54:17 -05:00
Damian Miralles
2b4a395dc8 bds_b3i: merging new changes, fixing D2 decoding bug 2019-03-07 09:38:49 -06:00
Carles Fernandez
dd7a52c93b
Fix headers 2019-03-06 21:54:39 +01:00
Carles Fernandez
502bf32d83 Improve includes (IWYU) 2019-03-06 14:36:51 +01:00
Carles Fernandez
2f6c123307
Fix header 2019-03-03 14:35:39 +01:00
Carles Fernandez
e7ea5c1fdd
Remove superfluous 'using google::LogMessage' 2019-03-03 13:39:35 +01:00
Carles Fernandez
08ce4cdd75
Sort includes, fix coverity scan defect 2019-03-03 00:15:20 +01:00
Carles Fernandez
fcfe63ba08
Fix defects detected by coverity scan 2019-03-01 20:49:45 +01:00
Damian Miralles
9ccb86dac6 Merge branch 'next' into bds_b3i 2019-03-01 13:29:10 -06:00
Damian Miralles
8782fcba69 bds_b3i: merging new changes, fixing small bugs 2019-03-01 13:28:21 -06:00
Carles Fernandez
2543b2aae2
Fix error 2019-03-01 16:59:29 +01:00
Carles Fernandez
e43b8f5284
Fix defects detected by Coverity Scan 2019-03-01 15:29:43 +01:00
Carles Fernandez
df0a77ee0d
Fix warnings 
more protection on read/write failures and some code cleaning
 2019-03-01 10:11:36 +01:00
Marc Majoral
c32e0b427a coding style + removed some unnecessary memory arrays in the FPGA E5A tracking adapter class. 2019-02-27 17:27:31 +01:00
Marc Majoral
a03ed571e6 replaced int and unsigned int by int32_t and uint32_t 
removed some unused variables
 2019-02-27 14:37:07 +01:00
Marc Majoral
8d770d9be9 more code cleaning 
removed some non used variables
 2019-02-27 13:30:09 +01:00
Marc Majoral
2b6e7749a8 cleaned the source code of the FPGA switch and the FPGA tracking adapters 2019-02-26 19:30:08 +01:00
Marc Majoral
cf0a37300a Merge branch 'next' of https://github.com/gnss-sdr/gnss-sdr into fpga 2019-02-25 19:21:00 +01:00
Carles Fernandez
d7d4cd09ae
Fix naming in fgpa and extra unit test implementations 2019-02-22 15:57:15 +01:00