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currently making changes to be able to extend the FPGA coherent integration beyond 20 ms for GPS L1, 1 ms for Galileo E1, 10 ms for GPS L5 and 20 ms for Galileo E5a using SW.

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This commit is contained in:
Marc Majoral 2019-06-28 10:54:19 +02:00
parent 0bb38ce38b
commit 2982961e49
8 changed files with 212 additions and 61 deletions
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2
src/algorithms/tracking/adapters/galileo_e1_dll_pll_veml_tracking_fpga.cc
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@ -281,6 +281,8 @@ GalileoE1DllPllVemlTrackingFpga::GalileoE1DllPllVemlTrackingFpga(
trk_param_fpga.code_length_chips = GALILEO_E1_B_CODE_LENGTH_CHIPS;
trk_param_fpga.code_samples_per_chip = code_samples_per_chip; // 2 sample per chip
trk_param_fpga.extended_correlation_in_fpga = false;
trk_param_fpga.extend_fpga_integration_periods = 1; // (number of FPGA integrations that are combined in the SW)
trk_param_fpga.fpga_integration_period = 1; // (number of symbols that are effectively integrated in the FPGA)
//################# MAKE TRACKING GNURadio object ###################
tracking_fpga_sc = dll_pll_veml_make_tracking_fpga(trk_param_fpga);
channel_ = 0;

33
src/algorithms/tracking/adapters/galileo_e5a_dll_pll_tracking_fpga.cc
View File

@ -262,14 +262,37 @@ GalileoE5aDllPllTrackingFpga::GalileoE5aDllPllTrackingFpga(
trk_param_fpga.data_codes = d_data_codes;
trk_param_fpga.code_length_chips = code_length_chips;
trk_param_fpga.code_samples_per_chip = code_samples_per_chip; // 2 sample per chip
trk_param_fpga.extended_correlation_in_fpga = false; // by default
trk_param_fpga.extend_fpga_integration_periods = 1; // (number of FPGA integrations that are combined in the SW)
trk_param_fpga.fpga_integration_period = 1; // (number of symbols that are effectively integrated in the FPGA)
if (d_track_pilot)
{
trk_param_fpga.extended_correlation_in_fpga = true;
}
else
{
trk_param_fpga.extended_correlation_in_fpga = false;
if (extend_correlation_symbols >1)
{
if (extend_correlation_symbols <= GALILEO_E5A_I_SECONDARY_CODE_LENGTH)
{
if ((GALILEO_E5A_I_SECONDARY_CODE_LENGTH % extend_correlation_symbols) == 0)
{
trk_param_fpga.extended_correlation_in_fpga = true;
trk_param_fpga.fpga_integration_period = extend_correlation_symbols;
printf("correlation in fpga true\n");
}
}
else
{
if (extend_correlation_symbols % GALILEO_E5A_I_SECONDARY_CODE_LENGTH == 0)
{
trk_param_fpga.extended_correlation_in_fpga = true;
trk_param_fpga.extend_fpga_integration_periods = extend_correlation_symbols/GALILEO_E5A_I_SECONDARY_CODE_LENGTH;
trk_param_fpga.fpga_integration_period = GALILEO_E5A_I_SECONDARY_CODE_LENGTH;
printf("correlation in fpga true\n");
printf("extend fpga integration periods true\n");
}
}
}
}
//################# MAKE TRACKING GNURadio object ###################
tracking_fpga_sc = dll_pll_veml_make_tracking_fpga(trk_param_fpga);
channel_ = 0;

33
src/algorithms/tracking/adapters/gps_l1_ca_dll_pll_tracking_fpga.cc
View File

@ -49,7 +49,8 @@
#include <iostream>
#define NUM_PRNs 32 // total number of PRNs
#define GPS_CA_BIT_DURATION_MS 20
#define GPS_CA_CODE_PERIOD_MS 1
// the following flag is FPGA-specific and they are using arrange the values of the local code in the way the FPGA
// expects. This arrangement is done in the initialisation to avoid consuming unnecessary clock cycles during tracking.
#define LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY 0x0C000000 // flag that enables WE (Write Enable) of the local code FPGA
@ -229,7 +230,35 @@ GpsL1CaDllPllTrackingFpga::GpsL1CaDllPllTrackingFpga(
trk_param_fpga.ca_codes = d_ca_codes;
trk_param_fpga.code_length_chips = GPS_L1_CA_CODE_LENGTH_CHIPS;
trk_param_fpga.code_samples_per_chip = 1; // 1 sample per chip
trk_param_fpga.extended_correlation_in_fpga = true;
trk_param_fpga.extended_correlation_in_fpga = false; // by default
trk_param_fpga.extend_fpga_integration_periods = 1; // (number of FPGA integrations that are combined in the SW)
trk_param_fpga.fpga_integration_period = 1; // (number of symbols that are effectively integrated in the FPGA)
if (symbols_extended_correlator >1)
{
if (symbols_extended_correlator <= GPS_CA_BIT_DURATION_MS)
{
if ((GPS_CA_BIT_DURATION_MS % symbols_extended_correlator) == 0)
{
trk_param_fpga.extended_correlation_in_fpga = true;
trk_param_fpga.fpga_integration_period = symbols_extended_correlator;
printf("correlation in fpga true\n");
}
}
else
{
if (symbols_extended_correlator % GPS_CA_BIT_DURATION_MS == 0)
{
trk_param_fpga.extended_correlation_in_fpga = true;
trk_param_fpga.extend_fpga_integration_periods = symbols_extended_correlator/GPS_CA_BIT_DURATION_MS;
trk_param_fpga.fpga_integration_period = GPS_CA_BIT_DURATION_MS;
printf("correlation in fpga true\n");
printf("extend fpga integration periods true\n");
}
}
}
//################# MAKE TRACKING GNURadio object ###################
tracking_fpga_sc = dll_pll_veml_make_tracking_fpga(trk_param_fpga);
channel_ = 0;

32
src/algorithms/tracking/adapters/gps_l5_dll_pll_tracking_fpga.cc
View File

@ -286,7 +286,37 @@ GpsL5DllPllTrackingFpga::GpsL5DllPllTrackingFpga(
trk_param_fpga.data_codes = d_data_codes;
trk_param_fpga.code_length_chips = code_length_chips;
trk_param_fpga.code_samples_per_chip = code_samples_per_chip; // 2 sample per chip
trk_param_fpga.extended_correlation_in_fpga = true;
trk_param_fpga.extended_correlation_in_fpga = false; // by default
trk_param_fpga.extend_fpga_integration_periods = 1; // (number of FPGA integrations that are combined in the SW)
trk_param_fpga.fpga_integration_period = 1; // (number of symbols that are effectively integrated in the FPGA)
if (d_track_pilot)
{
if (extend_correlation_symbols > 1)
{
if (extend_correlation_symbols <= GPS_L5I_NH_CODE_LENGTH)
{
if ((GPS_L5I_NH_CODE_LENGTH % extend_correlation_symbols) == 0)
{
trk_param_fpga.extended_correlation_in_fpga = true;
trk_param_fpga.fpga_integration_period = extend_correlation_symbols;
printf("correlation in fpga true\n");
}
}
else
{
if (extend_correlation_symbols % GPS_L5I_NH_CODE_LENGTH == 0)
{
trk_param_fpga.extended_correlation_in_fpga = true;
trk_param_fpga.extend_fpga_integration_periods = extend_correlation_symbols/GPS_L5I_NH_CODE_LENGTH;
trk_param_fpga.fpga_integration_period = GPS_L5I_NH_CODE_LENGTH;
printf("correlation in fpga true\n");
printf("extend fpga integration periods true\n");
}
}
}
}
tracking_fpga_sc = dll_pll_veml_make_tracking_fpga(trk_param_fpga);
channel_ = 0;
DLOG(INFO) << "tracking(" << tracking_fpga_sc->unique_id() << ")";

163
src/algorithms/tracking/gnuradio_blocks/dll_pll_veml_tracking_fpga.cc
View File

@ -128,6 +128,10 @@ dll_pll_veml_tracking_fpga::dll_pll_veml_tracking_fpga(const Dll_Pll_Conf_Fpga &
d_extended_correlation_in_fpga = trk_parameters.extended_correlation_in_fpga;
d_extend_fpga_integration_periods = trk_parameters.extend_fpga_integration_periods; // by default
d_fpga_integration_period = trk_parameters.fpga_integration_period; // by default
//printf("d_extended_correlation_in_fpga = %d\n", d_extended_correlation_in_fpga);
d_sc_remodulate_enabled = false; // by default
@ -204,6 +208,7 @@ dll_pll_veml_tracking_fpga::dll_pll_veml_tracking_fpga(const Dll_Pll_Conf_Fpga &
//printf("EXTENDED CORRELATION IN FPGA ENABLED => ENABLING SECONDARY CODE REMODULATION\n");
d_sc_demodulate_enabled = true;
d_sc_remodulate_enabled = true;
}
}
@ -872,7 +877,7 @@ void dll_pll_veml_tracking_fpga::update_tracking_vars()
// Compute the next buffer length based in the new period of the PRN sequence and the code phase error estimation
T_prn_samples_prev = T_prn_samples;
T_prn_samples = T_prn_seconds * trk_parameters.fs_in;
K_blk_samples_prev = K_blk_samples;
//K_blk_samples_prev = K_blk_samples;
K_blk_samples = T_prn_samples + d_rem_code_phase_samples; // initially d_rem_code_phase_samples is zero. It is updated at the end of this function
d_actual_blk_length = static_cast<int32_t>(std::floor(K_blk_samples));
@ -945,8 +950,10 @@ void dll_pll_veml_tracking_fpga::update_tracking_vars_extend_integration_in_FPGA
{
// first compute the long integration intermediate prn length values based on the current values (not the values that are compute here for the next iteration)
d_extended_integration_first_prn_length_samples = d_current_integration_length_samples - (trk_parameters.extend_correlation_symbols - 1)*static_cast<int32_t>(std::floor(T_prn_samples));
d_extended_integration_next_prn_length_samples = static_cast<int32_t>(std::floor(T_prn_samples));
//d_extended_integration_first_prn_length_samples = d_current_integration_length_samples - (trk_parameters.extend_correlation_symbols - 1)*static_cast<int32_t>(std::floor(T_prn_samples));
d_extended_integration_first_prn_length_samples = d_current_integration_length_samples - (d_fpga_integration_period - 1)*static_cast<int32_t>(std::floor(T_prn_samples));
d_extended_integration_next_prn_length_samples = static_cast<int32_t>(std::floor(T_prn_samples));
T_chip_seconds = 1.0 / d_code_freq_chips;
T_prn_seconds = T_chip_seconds * static_cast<double>(d_code_length_chips);
@ -956,8 +963,9 @@ void dll_pll_veml_tracking_fpga::update_tracking_vars_extend_integration_in_FPGA
// Compute the next buffer length based in the new period of the PRN sequence and the code phase error estimation
T_prn_samples_prev = T_prn_samples;
T_prn_samples = T_prn_seconds * trk_parameters.fs_in;
K_blk_samples_prev = K_blk_samples;
K_blk_samples = T_prn_samples*trk_parameters.extend_correlation_symbols + d_rem_code_phase_samples;
//K_blk_samples_prev = K_blk_samples;
//K_blk_samples = T_prn_samples*trk_parameters.extend_correlation_symbols + d_rem_code_phase_samples;
K_blk_samples = T_prn_samples*d_fpga_integration_period + d_rem_code_phase_samples;
d_actual_blk_length = static_cast<int32_t>(std::floor(K_blk_samples));
d_next_integration_length_samples = 2*d_actual_blk_length - d_current_integration_length_samples;
@ -1808,8 +1816,9 @@ void dll_pll_veml_tracking_fpga::set_gnss_synchro(Gnss_Synchro *p_gnss_synchro)
T_chip_seconds = 1.0 / d_code_freq_chips;
T_prn_seconds = T_chip_seconds * static_cast<double>(d_code_length_chips);
T_prn_samples_prev = T_prn_seconds * trk_parameters.fs_in;
K_blk_samples_prev = T_prn_samples_prev*trk_parameters.extend_correlation_symbols;
//K_blk_samples_prev = T_prn_samples_prev*trk_parameters.extend_correlation_symbols;
//K_blk_samples_prev = T_prn_samples_prev*d_fpga_integration_period;
d_debug_counter = 0;
enable_post_apply_secondary_code = 0;
@ -1822,44 +1831,6 @@ void dll_pll_veml_tracking_fpga::set_gnss_synchro(Gnss_Synchro *p_gnss_synchro)
multicorrelator_fpga->disable_secondary_codes(); // make sure the processing of the secondary codes is disabled by default
// if (d_enable_extended_integration == true)
// {
// if (d_extended_correlation_in_fpga == true)
// {
// // Now we can write the secondary codes that do not depend on the PRN number
// if (trk_parameters.system == 'G')
// {
// if (signal_type == "L5")
// {
// if (trk_parameters.track_pilot)
// {
// multicorrelator_fpga->set_secondary_code_lengths(d_secondary_code_length_pilot, d_secondary_code_length_data);
// multicorrelator_fpga->initialize_secondary_code(0, d_secondary_code_string_pilot);
// multicorrelator_fpga->initialize_secondary_code(1, d_secondary_code_string_data);
// }
// else
// {
// multicorrelator_fpga->set_secondary_code_lengths(d_secondary_code_length_data, 0);
// multicorrelator_fpga->initialize_secondary_code(0, d_secondary_code_string_data);
// }
// }
// }
// else if (trk_parameters.system == 'E')
// {
// if (signal_type == "5X")
// {
// // coherent integration in the FPGA is only enabled when tracking the pilot.
// if (trk_parameters.track_pilot)
// {
// multicorrelator_fpga->set_secondary_code_lengths(d_secondary_code_length_pilot, d_secondary_code_length_data);
// multicorrelator_fpga->initialize_secondary_code(0, d_secondary_code_string_pilot);
// multicorrelator_fpga->initialize_secondary_code(1, d_secondary_code_string_data);
// }
//
// }
// }
// }
// }
}
@ -2149,17 +2120,29 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
if (d_extended_correlation_in_fpga)
{
// correction on already computed parameters
K_blk_samples = T_prn_samples*trk_parameters.extend_correlation_symbols + d_rem_code_phase_samples_prev;
d_next_integration_length_samples = static_cast<int32_t>(std::floor(K_blk_samples));
if (d_sc_demodulate_enabled)
{
multicorrelator_fpga->enable_secondary_codes();
}
d_state = 5;
if (d_extend_fpga_integration_periods > 1)
{
// correction on already computed parameters
K_blk_samples = T_prn_samples*(trk_parameters.extend_correlation_symbols/d_extend_fpga_integration_periods) + d_rem_code_phase_samples_prev;
d_next_integration_length_samples = static_cast<int32_t>(std::floor(K_blk_samples));
d_state = 5;
}
else
{
// correction on already computed parameters
K_blk_samples = T_prn_samples*trk_parameters.extend_correlation_symbols + d_rem_code_phase_samples_prev;
d_next_integration_length_samples = static_cast<int32_t>(std::floor(K_blk_samples));
d_state = 6;
}
}
else
{
@ -2331,11 +2314,87 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
d_state = 3; // new coherent integration (correlation time extension) cycle
}
}
break;
break;
}
case 5: // coherent integration (correlation time extension)
{
d_sample_counter = d_sample_counter_next;
d_sample_counter_next = d_sample_counter + static_cast<uint64_t>(d_current_integration_length_samples);
case 5: // narrow tracking IN THE FPGA
// Fill the acquisition data
current_synchro_data = *d_acquisition_gnss_synchro;
extended_correlation_in_fpga_enabled = true;
// this must be computed for the secondary prn code
if (d_secondary)
{
d_first_length_secondary_code = d_current_integration_length_samples - (trk_parameters.extend_correlation_symbols - 1)*static_cast<int32_t>(std::floor(T_prn_samples));
d_next_length_secondary_code = static_cast<int32_t>(std::floor(T_prn_samples));
multicorrelator_fpga->update_secondary_code_length(d_first_length_secondary_code, d_next_length_secondary_code);
}
// perform a correlation step
do_correlation_step();
update_tracking_vars_extend_integration_in_FPGA();
save_correlation_results_extended_integration_in_FPGA();
// ########### Output the tracking results to Telemetry block ##########
if (interchange_iq)
{
if (trk_parameters.track_pilot)
{
// Note that data and pilot components are in quadrature. I and Q are interchanged
current_synchro_data.Prompt_I = static_cast<double>((*d_Prompt_Data).imag());
current_synchro_data.Prompt_Q = static_cast<double>((*d_Prompt_Data).real());
}
else
{
current_synchro_data.Prompt_I = static_cast<double>((*d_Prompt).imag());
current_synchro_data.Prompt_Q = static_cast<double>((*d_Prompt).real());
}
}
else
{
if (trk_parameters.track_pilot)
{
// Note that data and pilot components are in quadrature. I and Q are interchanged
current_synchro_data.Prompt_I = static_cast<double>((*d_Prompt_Data).real());
current_synchro_data.Prompt_Q = static_cast<double>((*d_Prompt_Data).imag());
}
else
{
current_synchro_data.Prompt_I = static_cast<double>((*d_Prompt).real());
current_synchro_data.Prompt_Q = static_cast<double>((*d_Prompt).imag());
}
}
current_synchro_data.Tracking_sample_counter = d_sample_counter + d_extended_integration_first_prn_length_samples;
current_synchro_data.Code_phase_samples = d_rem_code_phase_samples;
current_synchro_data.Carrier_phase_rads = d_extended_integration_first_acc_carrier_phase_rad;
current_synchro_data.Carrier_Doppler_hz = d_carrier_doppler_hz;
current_synchro_data.CN0_dB_hz = d_CN0_SNV_dB_Hz;
current_synchro_data.Flag_valid_symbol_output = true;
current_synchro_data.correlation_length_ms = d_correlation_length_ms;
d_num_current_syncrho_repetitions = trk_parameters.extend_correlation_symbols;
d_extend_correlation_symbols_count++;
if (d_extend_correlation_symbols_count == (trk_parameters.extend_correlation_symbols - 1))
{
d_extend_correlation_symbols_count = 0;
d_state = 6;
}
log_data_extended_integration_in_FPGA(false, true);
break;
}
case 6: // narrow tracking IN THE FPGA
{
d_sample_counter = d_sample_counter_next;
@ -2443,7 +2502,7 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
// debug
d_sc_prompt_changed = false;
if (d_state == 3 || d_state == 4 | d_state ==5)
if (d_state == 3 || d_state == 4 | d_state ==6)
{
// debug - remodulate secondary code
if (d_sc_remodulate_enabled == true)
@ -2519,7 +2578,7 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
current_synchro_data.Carrier_phase_rads = d_extended_integration_first_acc_carrier_phase_rad;
d_sc_prompt_changed = false;
if (d_state == 3 || d_state == 4 | d_state ==5)
if (d_state == 3 || d_state == 4 | d_state ==6)
{
if (d_sc_remodulate_enabled == true)

6
src/algorithms/tracking/gnuradio_blocks/dll_pll_veml_tracking_fpga.h
View File

@ -194,7 +194,7 @@ private:
double T_prn_samples;
double K_blk_samples;
double K_blk_samples_prev;
//double K_blk_samples_prev;
int32_t d_current_integration_length_samples;
@ -276,6 +276,10 @@ private:
float debug_d_rem_carr_phase_rad;
uint32_t debug_first_time;
uint32_t d_extend_fpga_integration_periods;
uint32_t d_fpga_integration_period;
};

2
src/algorithms/tracking/libs/dll_pll_conf_fpga.cc
View File

@ -78,4 +78,6 @@ Dll_Pll_Conf_Fpga::Dll_Pll_Conf_Fpga()
ca_codes = nullptr;
data_codes = nullptr;
extended_correlation_in_fpga = false;
extend_fpga_integration_periods = 1;
fpga_integration_period = 0;
}

2
src/algorithms/tracking/libs/dll_pll_conf_fpga.h
View File

@ -84,6 +84,8 @@ public:
int32_t* ca_codes;
int32_t* data_codes;
bool extended_correlation_in_fpga;
uint32_t extend_fpga_integration_periods;
uint32_t fpga_integration_period;
Dll_Pll_Conf_Fpga();
};