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527 Commits

Author SHA1 Message Date
Carles Fernandez 0ddb063784
Modernize code 
Automatize memory management
De-clutter clan-tidy warnings by fixing obvious issues
 2019-07-19 18:23:36 +02:00
Carles Fernandez 9572b37da7
Remove uses of bitwise operations on signed integer types 
Based in the High Integrity C++ Standard, Section 5.6.1
See https://www.perforce.com/resources/qac/high-integrity-c-coding-standard-expressions

Removed some c arrays by std::array
 2019-07-14 23:34:07 +02:00
Carles Fernandez d7460022ed
Avoid C arrays 
See https://clang.llvm.org/extra/clang-tidy/checks/modernize-avoid-c-arrays.html
 2019-07-14 14:09:12 +02:00
Carles Fernandez def3a8875a
Misc improvements 
Remove cstdio
Remove usage of cstring and memcpy when it is not needed
Mark move cobstructor with noexcept
 2019-07-14 02:28:28 +02:00
Carles Fernandez 4adb05570a Fix typos detected by codespell 2019-07-09 11:52:53 +02:00
Javier Arribas cf967be252 Consolidating unified dll pll veml tracking to synchronize symbols for GPS L1, L5, Galileo E1, E5 and Beidou B1, B3. Beidou bug fixes in acquisition. Adapting all telemetry decoders to use 1 sample per symbol 2019-07-03 18:57:26 +02:00
Carles Fernandez 081439d6f8 Code cleaning 2019-07-02 17:48:00 +02:00
Carles Fernandez f1022385b0 Improve memory management 
In class definitions, first write the public interface, then private
 2019-07-01 21:54:52 +02:00
Carles Fernandez d72542861f
Replace raw pointers by smart pointers. Remove delete 2019-06-30 12:51:23 +02:00
Carles Fernandez 2cc06c8b63
Remove delete in FPGA adapters 2019-06-30 12:10:14 +02:00
Carles Fernandez 17b1ef8b98
Do not use deletes. Improve memory management 2019-06-30 04:47:15 +02:00
Carles Fernandez d5e5e5725d
Apply fixes by clang-tidy 2019-06-30 00:01:54 +02:00
Carles Fernandez dd3b2f11db
Fix wrong loop 2019-06-29 21:13:14 +02:00
Carles Fernandez dd53f81b1a
Replace memcpy by copy_n. Avoid pointer arithmetics 2019-06-29 11:58:08 +02:00
Carles Fernandez 751f54990c
Introduce gsl::span. Bound checking at compile time, no overhead at runtime 
See https://github.com/isocpp/CppCoreGuidelines/blob/master/CppCoreGuidelines.md
 2019-06-29 01:28:30 +02:00
Carles Fernandez e28062de87
Modernize OpenCL code 2019-06-24 19:25:51 +02:00
Carles Fernandez de79147def
Fix OpenCL test if the OpenCL Platform is not ready 2019-06-24 14:33:08 +02:00
Carles Fernandez 9318fe540d
Fixes for modern OpenCL versions 2019-06-24 13:39:34 +02:00
Carles Fernandez a2dcf223f0
Create OpenCL imported target 2019-06-24 11:25:18 +02:00
Carles Fernandez 8d424a13b6
Replace boost::filesystem by std::experimental::filesystem when the later is available 2019-06-12 20:39:29 +02:00
Carles Fernandez ca6b4b545b
Replace Boost::filesystem by std::filesystem if C++17 support is available 2019-06-10 21:41:13 +02:00
Marc Majoral e1d01d3b97 Re-enable uio interrupts manually + do not enable interrupt generation at reset. 2019-05-13 16:30:01 +02:00
Carles Fernandez 307373e362
Avoid unnecessary copy of channel_fsm 2019-04-22 13:03:01 +02:00
Marc Majoral bf3f66278f closed the acquisition device driver in the proper way + updated fpga block expponent. 2019-04-15 16:39:05 +02:00
Marc Majoral 059fbfedc2 changed default fft/ifft block exp 2019-04-12 15:26:47 +02:00
Marc Majoral 7a06434928 removed unnecessary function in fpga_acquisition class 2019-04-12 15:16:31 +02:00
Marc Majoral 9f80eaf0ff code cleanup 2019-04-12 11:36:30 +02:00
Marc Majoral a628ad5906 removed FPGA dummy read 2019-04-12 10:03:57 +02:00
Marc Majoral 19e46a2ebf Merge branch 'next' of https://github.com/gnss-sdr/gnss-sdr into fpga 2019-04-10 19:53:45 +02:00
Marc Majoral 91f509abf9 write the code phase rate and the nco phase rate parameters in the FPGA 2019-04-10 11:31:34 +02:00
Javier Arribas a79280d029 FPGA compilation error fix 2019-04-09 20:01:30 +02:00
Javier Arribas 141e101363 Bug fix that restores the acquisition and tracking destructor calls due to circular smart pointer references 2019-04-09 17:39:48 +02:00
Carles Fernandez cc162dac9e
Code cleaning 2019-04-08 11:14:41 +02:00
Marc Majoral 4d530b0ce4 updated fft-ifft ref exponents 2019-04-05 15:59:40 +02:00
Marc Majoral 6696e378c5 updated the reference value for the gain of the fft-ifft 2019-04-05 15:15:02 +02:00
Marc Majoral ff024e7292 cleaned unused code and added some comments. 2019-04-04 19:55:02 +02:00
Marc Majoral eda3f21fb9 added the reading of the high_dyn parameter in the tracking adapter modules + added max_num_acqs parameter for the FPGA acquisition. 2019-04-04 16:10:29 +02:00
Marc Majoral 5bc7a778e9 commented out the old DLL and PLL filters in the tracking modules + removed some old not used code in the acquisition that was already commented out. 2019-04-02 13:10:09 +02:00
Marc Majoral 3249f55029 Merge branch 'next' of https://github.com/gnss-sdr/gnss-sdr into fpga 2019-03-27 12:38:43 +01:00
Marc Majoral 4164d28abf solved a bug: the acquisition device driver was not properly closed if double acquisition was enabled and the second acquisition was not successful. 2019-03-27 12:35:36 +01:00
Marc Majoral 47b405f92d commented out debug messages that increase the time between accquisition and tracking 2019-03-27 11:57:31 +01:00
Carles Fernandez 77851e5589
BeiDou B3I bug fixes (credits to dmiralles2019) 2019-03-26 22:34:08 +01:00
Marc Majoral 58a0de006e corrected comment 2019-03-26 16:41:20 +01:00
Marc Majoral 63cee0e63b In order to reduce the CPU workload, the FPGA acquisition does not close and open the device driver in between the first and the second acquisition anymore. 2019-03-26 16:35:19 +01:00
Marc Majoral cbc8131677 optimized the computation of FPGA acquisition doppler shift and dopper step registers 
removed unnecessary function call
 2019-03-26 16:22:49 +01:00
Marc Majoral 2b46c79ba7 optimized the process of computing and writing the fft of the local code to the acquisition HW accelerator. 
The writing of the local code is still performed by processor instructions in a loop.
THe FPGA L2 classes were updated accordingly.
 2019-03-26 12:26:08 +01:00
Marc Majoral 905a85670c currently optimizing the FPGA-related code 2019-03-25 19:45:54 +01:00
Marc Majoral 2bae20d2fd Merge branch 'next' of https://github.com/gnss-sdr/gnss-sdr into fpga 
added second acquisition to reduce the time between acquisition and tracking when using the FPGA
moved the process of writing of the tracking local code to the HW accelerator from the start_tracking() function to the set_gnss_synchro() function (this is only applicable for the FPGA case)
there was a bug in the computation of the tracking starting position for the L1/E1 band when using the FPGA, only high sample counter values (>31 bits) were affected, due to a uint64_t*float mult.
 2019-03-22 19:03:46 +01:00
Carles Fernandez 88b60aa6b1 Remove unused includes 2019-03-20 18:08:39 +01:00
Carles Fernandez f3d91bbd38 Remove unused includes 2019-03-20 18:00:37 +01:00