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/*!
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* \ file galileo_e1_dll_pll_veml_tracking_fpga . cc
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* \ brief Adapts a DLL + PLL VEML ( Very Early Minus Late ) tracking loop block
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* to a TrackingInterface for Galileo E1 signals for the FPGA
* \ author Marc Majoral , 2019. mmajoral ( at ) cttc . cat
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*
* Code DLL + carrier PLL according to the algorithms described in :
* K . Borre , D . M . Akos , N . Bertelsen , P . Rinder , and S . H . Jensen ,
* A Software - Defined GPS and Galileo Receiver . A Single - Frequency
* Approach , Birkhauser , 2007
*
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* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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*
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* GNSS - SDR is a Global Navigation Satellite System software - defined receiver .
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* This file is part of GNSS - SDR .
*
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* Copyright ( C ) 2010 - 2020 ( see AUTHORS file for a list of contributors )
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* SPDX - License - Identifier : GPL - 3.0 - or - later
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*
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* - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
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*/
# include "galileo_e1_dll_pll_veml_tracking_fpga.h"
# include "Galileo_E1.h"
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# include "configuration_interface.h"
# include "display.h"
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# include "dll_pll_conf_fpga.h"
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# include "galileo_e1_signal_replica.h"
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# include "gnss_sdr_flags.h"
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# include "uio_fpga.h"
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# include <glog/logging.h>
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# include <volk_gnsssdr/volk_gnsssdr_alloc.h>
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# include <array>
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GalileoE1DllPllVemlTrackingFpga : : GalileoE1DllPllVemlTrackingFpga (
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const ConfigurationInterface * configuration , const std : : string & role ,
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unsigned int in_streams , unsigned int out_streams ) : role_ ( role ) , in_streams_ ( in_streams ) , out_streams_ ( out_streams )
{
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Dll_Pll_Conf_Fpga trk_params_fpga = Dll_Pll_Conf_Fpga ( ) ;
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DLOG ( INFO ) < < " role " < < role ;
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trk_params_fpga . SetFromConfiguration ( configuration , role ) ;
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if ( trk_params_fpga . extend_correlation_symbols < 1 )
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{
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trk_params_fpga . extend_correlation_symbols = 1 ;
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std : : cout < < TEXT_RED < < " WARNING: Galileo E1. extend_correlation_symbols must be bigger than 0. Coherent integration has been set to 1 symbol (4 ms) " < < TEXT_RESET < < ' \n ' ;
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}
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else if ( ! trk_params_fpga . track_pilot and trk_params_fpga . extend_correlation_symbols > 1 )
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{
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trk_params_fpga . extend_correlation_symbols = 1 ;
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std : : cout < < TEXT_RED < < " WARNING: Galileo E1. Extended coherent integration is not allowed when tracking the data component. Coherent integration has been set to 4 ms (1 symbol) " < < TEXT_RESET < < ' \n ' ;
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}
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if ( ( trk_params_fpga . extend_correlation_symbols > 1 ) and ( trk_params_fpga . pll_bw_narrow_hz > trk_params_fpga . pll_bw_hz or trk_params_fpga . dll_bw_narrow_hz > trk_params_fpga . dll_bw_hz ) )
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{
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std : : cout < < TEXT_RED < < " WARNING: Galileo E1. PLL or DLL narrow tracking bandwidth is higher than wide tracking one " < < TEXT_RESET < < ' \n ' ;
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}
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d_track_pilot = trk_params_fpga . track_pilot ;
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const auto vector_length = static_cast < int32_t > ( std : : round ( trk_params_fpga . fs_in / ( GALILEO_E1_CODE_CHIP_RATE_CPS / GALILEO_E1_B_CODE_LENGTH_CHIPS ) ) ) ;
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trk_params_fpga . vector_length = vector_length ;
trk_params_fpga . system = ' E ' ;
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const std : : array < char , 3 > sig_ { ' 1 ' , ' B ' , ' \0 ' } ;
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std : : memcpy ( trk_params_fpga . signal , sig_ . data ( ) , 3 ) ;
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// UIO device file
device_name = configuration - > property ( role + " .devicename " , default_device_name ) ;
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// compute the number of tracking channels that have already been instantiated. The order in which
// GNSS-SDR instantiates the tracking channels i L1, L2, L5, E1, E5a
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num_prev_assigned_ch = configuration - > property ( " Channels_1C.count " , 0 ) +
configuration - > property ( " Channels_2S.count " , 0 ) +
configuration - > property ( " Channels_L5.count " , 0 ) ;
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// ################# PRE-COMPUTE ALL THE CODES #################
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uint32_t code_samples_per_chip = 2 ;
d_ca_codes = static_cast < int32_t * > ( volk_gnsssdr_malloc ( static_cast < int32_t > ( GALILEO_E1_B_CODE_LENGTH_CHIPS ) * code_samples_per_chip * GALILEO_E1_NUMBER_OF_CODES * sizeof ( int32_t ) , volk_gnsssdr_get_alignment ( ) ) ) ;
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volk_gnsssdr : : vector < float > ca_codes_f ( static_cast < uint32_t > ( GALILEO_E1_B_CODE_LENGTH_CHIPS ) * code_samples_per_chip ) ;
volk_gnsssdr : : vector < float > data_codes_f ;
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d_data_codes = nullptr ;
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if ( d_track_pilot )
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{
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d_data_codes = static_cast < int32_t * > ( volk_gnsssdr_malloc ( ( static_cast < uint32_t > ( GALILEO_E1_B_CODE_LENGTH_CHIPS ) ) * code_samples_per_chip * GALILEO_E1_NUMBER_OF_CODES * sizeof ( int32_t ) , volk_gnsssdr_get_alignment ( ) ) ) ;
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data_codes_f . resize ( static_cast < uint32_t > ( GALILEO_E1_B_CODE_LENGTH_CHIPS ) * code_samples_per_chip , 0.0 ) ;
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}
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for ( uint32_t PRN = 1 ; PRN < = GALILEO_E1_NUMBER_OF_CODES ; PRN + + )
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{
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std : : array < char , 3 > data_signal = { ' 1 ' , ' B ' , ' \0 ' } ;
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if ( d_track_pilot )
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{
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std : : array < char , 3 > pilot_signal = { ' 1 ' , ' C ' , ' \0 ' } ;
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galileo_e1_code_gen_sinboc11_float ( ca_codes_f , pilot_signal , PRN ) ;
galileo_e1_code_gen_sinboc11_float ( data_codes_f , data_signal , PRN ) ;
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// The code is generated as a series of 1s and -1s. In order to store the values using only one bit, a -1 is stored as a 0 in the FPGA
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for ( uint32_t s = 0 ; s < 2 * GALILEO_E1_B_CODE_LENGTH_CHIPS ; s + + )
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{
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auto tmp_value = static_cast < int32_t > ( ca_codes_f [ s ] ) ;
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if ( tmp_value < 0 )
{
tmp_value = 0 ;
}
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tmp_value = tmp_value | LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY ;
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d_ca_codes [ static_cast < int32_t > ( GALILEO_E1_B_CODE_LENGTH_CHIPS ) * 2 * ( PRN - 1 ) + s ] = tmp_value ;
tmp_value = static_cast < int32_t > ( data_codes_f [ s ] ) ;
if ( tmp_value < 0 )
{
tmp_value = 0 ;
}
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tmp_value = tmp_value | LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY | LOCAL_CODE_FPGA_CORRELATOR_SELECT_COUNT ;
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d_data_codes [ static_cast < int32_t > ( GALILEO_E1_B_CODE_LENGTH_CHIPS ) * 2 * ( PRN - 1 ) + s ] = tmp_value ;
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}
}
else
{
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galileo_e1_code_gen_sinboc11_float ( ca_codes_f , data_signal , PRN ) ;
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// The code is generated as a series of 1s and -1s. In order to store the values using only one bit, a -1 is stored as a 0 in the FPGA
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for ( uint32_t s = 0 ; s < 2 * GALILEO_E1_B_CODE_LENGTH_CHIPS ; s + + )
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{
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auto tmp_value = static_cast < int32_t > ( ca_codes_f [ s ] ) ;
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if ( tmp_value < 0 )
{
tmp_value = 0 ;
}
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tmp_value = tmp_value | LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY ;
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d_ca_codes [ static_cast < int32_t > ( GALILEO_E1_B_CODE_LENGTH_CHIPS ) * 2 * ( PRN - 1 ) + s ] = tmp_value ;
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}
}
}
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trk_params_fpga . ca_codes = d_ca_codes ;
trk_params_fpga . data_codes = d_data_codes ;
trk_params_fpga . code_length_chips = GALILEO_E1_B_CODE_LENGTH_CHIPS ;
trk_params_fpga . code_samples_per_chip = code_samples_per_chip ; // 2 sample per chip
trk_params_fpga . extended_correlation_in_fpga = false ;
trk_params_fpga . extend_fpga_integration_periods = 1 ; // (number of FPGA integrations that are combined in the SW)
trk_params_fpga . fpga_integration_period = 1 ; // (number of symbols that are effectively integrated in the FPGA)
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// ################# MAKE TRACKING GNU Radio object ###################
tracking_fpga_sc = dll_pll_veml_make_tracking_fpga ( trk_params_fpga ) ;
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channel_ = 0 ;
DLOG ( INFO ) < < " tracking( " < < tracking_fpga_sc - > unique_id ( ) < < " ) " ;
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if ( in_streams_ > 1 )
{
LOG ( ERROR ) < < " This implementation only supports one input stream " ;
}
if ( out_streams_ > 1 )
{
LOG ( ERROR ) < < " This implementation only supports one output stream " ;
}
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}
GalileoE1DllPllVemlTrackingFpga : : ~ GalileoE1DllPllVemlTrackingFpga ( )
{
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volk_gnsssdr_free ( d_ca_codes ) ;
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if ( d_track_pilot )
{
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volk_gnsssdr_free ( d_data_codes ) ;
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}
}
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void GalileoE1DllPllVemlTrackingFpga : : stop_tracking ( )
{
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tracking_fpga_sc - > stop_tracking ( ) ;
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}
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void GalileoE1DllPllVemlTrackingFpga : : start_tracking ( )
{
tracking_fpga_sc - > start_tracking ( ) ;
}
/*
* Set tracking channel unique ID
*/
void GalileoE1DllPllVemlTrackingFpga : : set_channel ( unsigned int channel )
{
channel_ = channel ;
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// UIO device file
std : : string device_io_name ;
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// find the uio device file corresponding to the tracking multicorrelator
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if ( find_uio_dev_file_name ( device_io_name , device_name , channel - num_prev_assigned_ch ) < 0 )
{
std : : cout < < " Cannot find the FPGA uio device file corresponding to device name " < < device_name < < std : : endl ;
throw std : : exception ( ) ;
}
tracking_fpga_sc - > set_channel ( channel , device_io_name ) ;
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}
void GalileoE1DllPllVemlTrackingFpga : : set_gnss_synchro ( Gnss_Synchro * p_gnss_synchro )
{
tracking_fpga_sc - > set_gnss_synchro ( p_gnss_synchro ) ;
}
void GalileoE1DllPllVemlTrackingFpga : : connect ( gr : : top_block_sptr top_block )
{
if ( top_block )
{ /* top_block is not null */
} ;
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// nothing to connect, now the tracking uses gr_sync_decimator
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}
void GalileoE1DllPllVemlTrackingFpga : : disconnect ( gr : : top_block_sptr top_block )
{
if ( top_block )
{ /* top_block is not null */
} ;
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// nothing to disconnect, now the tracking uses gr_sync_decimator
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}
gr : : basic_block_sptr GalileoE1DllPllVemlTrackingFpga : : get_left_block ( )
{
return tracking_fpga_sc ;
}
gr : : basic_block_sptr GalileoE1DllPllVemlTrackingFpga : : get_right_block ( )
{
return tracking_fpga_sc ;
}