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2025-12-25 11:40:35 +00:00
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emerald_rapids.myco
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Emerald Rapids is [[Intel]]'s fifth generation of "Xeon Scalable" server [[central processing unit|CPU]]s, succeeding [[Sapphire Rapids]]. Emerald Rapids uses the same core design as Sapphire Rapids, but a redesigned chiplet layout (two die instead of four) and much more [[L3 cache]].
Only the XCC products are materially changed; lower-core-count single-chiplet products are mostly the same across generations.
Emerald Rapids uses the [[Eagle Stream]] platform, with 8-channel [[DDR5]] up to 5600MT/s (varies by SKU) and 80 PCIe 5.0 lanes.
=> https://newsletter.semianalysis.com/p/intel-emerald-rapids-backtracks-on