preamble_timestamp_samples message port connection
1. Check for message port presence both in trk and nav blocks
2. Check for configuration property Tracking_xG.extend_correlation_ms
Signed-off-by: Vlad P <vladisslav2011@gmail.com>
1. Emit a message from preamble detection branch from telemetry decoder
2. Connect flowgraph message ports to pass the message from telemetry
decoder block to a dll-pll-c-aid-tracking block
3. Name message ports correctly as the massage is passed in samples, not
seconds
Signed-off-by: Vladisslav P <vladisslav2011@gmail.com>
Added acquisition and tracking monitors to view intermediate outputs of
GNSS-SDR from monitoring clients. Each monitor (acquisition, tracking,
original monitor, and pvt) pushes its data to a different UDP port.
If a channel event was happening after flowgraph stop and before flowgraph disconnection, it caused a crash. This was avoided by sleeping the control thread during 500 ms after disconnection and before the block destructors were called, so the event could be processed, but this was not a robust solution.
Avoid indirection caused by passing shared_ptr by reference
The block factory does not have responsability on the lifetime of their inputs
Define std::make_unique when using C++11 and make use of it
Printers are turned into unique_ptr to express ownership
Printers do not participate on the lifelime of the data, so they take const raw pointers
Modernize tests code
Improve modularity of CMake design
Improve building speed in multicore processors
Files command_event.* moved to core/libs
Remove Armadillo from public core_receiver interface
Uniformize name format for classes
Apply some fixes by clang-tidy
Improve documentation
added second acquisition to reduce the time between acquisition and tracking when using the FPGA
moved the process of writing of the tracking local code to the HW accelerator from the start_tracking() function to the set_gnss_synchro() function (this is only applicable for the FPGA case)
there was a bug in the computation of the tracking starting position for the L1/E1 band when using the FPGA, only high sample counter values (>31 bits) were affected, due to a uint64_t*float mult.