mirrors
/
gnss-sdr
mirror of https://github.com/gnss-sdr/gnss-sdr
1
0
Fork 0
Code Issues Releases Wiki Activity
5,678 Commits 7 Branches 21 Tags 98 MiB
Commit Graph

494 Commits

Author SHA1 Message Date
Carles Fernandez cc162dac9e
Code cleaning 2019-04-08 11:14:41 +02:00
Marc Majoral 6696e378c5 updated the reference value for the gain of the fft-ifft 2019-04-05 15:15:02 +02:00
Marc Majoral ff024e7292 cleaned unused code and added some comments. 2019-04-04 19:55:02 +02:00
Marc Majoral eda3f21fb9 added the reading of the high_dyn parameter in the tracking adapter modules + added max_num_acqs parameter for the FPGA acquisition. 2019-04-04 16:10:29 +02:00
Marc Majoral 5bc7a778e9 commented out the old DLL and PLL filters in the tracking modules + removed some old not used code in the acquisition that was already commented out. 2019-04-02 13:10:09 +02:00
Marc Majoral 3249f55029 Merge branch 'next' of https://github.com/gnss-sdr/gnss-sdr into fpga 2019-03-27 12:38:43 +01:00
Marc Majoral 4164d28abf solved a bug: the acquisition device driver was not properly closed if double acquisition was enabled and the second acquisition was not successful. 2019-03-27 12:35:36 +01:00
Marc Majoral 47b405f92d commented out debug messages that increase the time between accquisition and tracking 2019-03-27 11:57:31 +01:00
Carles Fernandez 77851e5589
BeiDou B3I bug fixes (credits to dmiralles2019) 2019-03-26 22:34:08 +01:00
Marc Majoral 58a0de006e corrected comment 2019-03-26 16:41:20 +01:00
Marc Majoral 63cee0e63b In order to reduce the CPU workload, the FPGA acquisition does not close and open the device driver in between the first and the second acquisition anymore. 2019-03-26 16:35:19 +01:00
Marc Majoral cbc8131677 optimized the computation of FPGA acquisition doppler shift and dopper step registers 
removed unnecessary function call
 2019-03-26 16:22:49 +01:00
Marc Majoral 2b46c79ba7 optimized the process of computing and writing the fft of the local code to the acquisition HW accelerator. 
The writing of the local code is still performed by processor instructions in a loop.
THe FPGA L2 classes were updated accordingly.
 2019-03-26 12:26:08 +01:00
Marc Majoral 905a85670c currently optimizing the FPGA-related code 2019-03-25 19:45:54 +01:00
Marc Majoral 2bae20d2fd Merge branch 'next' of https://github.com/gnss-sdr/gnss-sdr into fpga 
added second acquisition to reduce the time between acquisition and tracking when using the FPGA
moved the process of writing of the tracking local code to the HW accelerator from the start_tracking() function to the set_gnss_synchro() function (this is only applicable for the FPGA case)
there was a bug in the computation of the tracking starting position for the L1/E1 band when using the FPGA, only high sample counter values (>31 bits) were affected, due to a uint64_t*float mult.
 2019-03-22 19:03:46 +01:00
Carles Fernandez 88b60aa6b1 Remove unused includes 2019-03-20 18:08:39 +01:00
Carles Fernandez f3d91bbd38 Remove unused includes 2019-03-20 18:00:37 +01:00
Marc Majoral e6b661494c moved to 16 bits per local code. 2019-03-20 16:59:32 +01:00
Javier Arribas 55b1f316ed Removing gnuradio block inheritance in FPGA acquisition 2019-03-20 16:57:50 +01:00
Marc Majoral 6da82535ba Merge branch 'next' of https://github.com/gnss-sdr/gnss-sdr into fpga 2019-03-20 16:35:55 +01:00
Carles Fernandez 8a52c20e28 Add missing override keyword 2019-03-20 15:44:59 +01:00
Javier Arribas 0be8c657de Reducing the latency in the acquisition to tracking transition 2019-03-20 15:13:17 +01:00
Marc Majoral a24d26f427 set the default sampling frequency of the HW source to 12.5 Msps and the default bandpass bandwidth to 12.5 MHz + other minor changes 2019-03-19 10:14:09 +01:00
Marc Majoral bef7e42fb9 Merge branch 'next' of https://github.com/gnss-sdr/gnss-sdr into fpga 2019-03-18 19:37:19 +01:00
Carles Fernandez 52c69073ac
Apply clang-tidy fixes 2019-03-18 09:10:00 +01:00
Carles Fernandez ed9aaf86ce
Fix building, apply formatting 2019-03-18 08:43:38 +01:00
Damian Miralles dc65760122
bds_b3i: Updating branch with new changes from upstream repo 2019-03-12 10:54:17 -05:00
Damian Miralles 2b4a395dc8 bds_b3i: merging new changes, fixing D2 decoding bug 2019-03-07 09:38:49 -06:00
Carles Fernandez dd7a52c93b
Fix headers 2019-03-06 21:54:39 +01:00
Carles Fernandez 9ce827437c Improve includes (IWYU) 2019-03-06 16:10:18 +01:00
Carles Fernandez 5b8ab9f591 Improve includes (IWYU) 2019-03-06 13:49:14 +01:00
Carles Fernandez e7ea5c1fdd
Remove superfluous 'using google::LogMessage' 2019-03-03 13:39:35 +01:00
Carles Fernandez fcfe63ba08
Fix defects detected by coverity scan 2019-03-01 20:49:45 +01:00
Marc Majoral 5a2dc274cf but solved: double acquisition was using uint32_t for the initial doppler estimation. Therefore when the first estimated doppler was negative it was reset to zero. 2019-03-01 20:37:14 +01:00
Damian Miralles 9ccb86dac6 Merge branch 'next' into bds_b3i 2019-03-01 13:29:10 -06:00
Damian Miralles 8782fcba69 bds_b3i: merging new changes, fixing small bugs 2019-03-01 13:28:21 -06:00
Carles Fernandez e43b8f5284
Fix defects detected by Coverity Scan 2019-03-01 15:29:43 +01:00
Carles Fernandez df0a77ee0d
Fix warnings 
more protection on read/write failures and some code cleaning
 2019-03-01 10:11:36 +01:00
Carles Fernandez 7c71ed9404
Merge branch 'fpga' of https://github.com/gnss-sdr/gnss-sdr into merge-fpga 
Applied checks and formatting
 2019-02-28 21:45:30 +01:00
Marc Majoral ea86546d99 implemented double acquisition for the FPGA 2019-02-28 20:49:35 +01:00
Marc Majoral c32e0b427a coding style + removed some unnecessary memory arrays in the FPGA E5A tracking adapter class. 2019-02-27 17:27:31 +01:00
Marc Majoral a03ed571e6 replaced int and unsigned int by int32_t and uint32_t 
removed some unused variables
 2019-02-27 14:37:07 +01:00
Marc Majoral 8d770d9be9 more code cleaning 
removed some non used variables
 2019-02-27 13:30:09 +01:00
Marc Majoral 5e22e4c50a cleaned the FPGA acquisition code 2019-02-26 18:28:14 +01:00
Marc Majoral cf0a37300a Merge branch 'next' of https://github.com/gnss-sdr/gnss-sdr into fpga 2019-02-25 19:21:00 +01:00
Carles Fernandez d7d4cd09ae
Fix naming in fgpa and extra unit test implementations 2019-02-22 15:57:15 +01:00
Carles Fernandez 62a7e54359
Introduce readability-identifier-naming check 
This commit enforces naming style for Classes and global constants:
Camel_Snake_Case for Classes
UPPER_CASE for global constants
CamelCase for abstract classes
 2019-02-22 10:47:24 +01:00
Carles Fernandez 9bc771bed6
Deploy a new option -DENABLE_CLANG_TIDY to integrate clang-tidy checks and fixes into the compilation process, if found. It defaults to OFF 2019-02-21 09:59:06 +01:00
Marc Majoral fd3eb2a80e The termination process is now done correctly when using the FPGA. 2019-02-13 17:48:14 +01:00
Carles Fernandez 31383258b0 clang-tidy: apply checks 2019-02-12 15:56:18 +01:00