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mirror of https://github.com/gnss-sdr/gnss-sdr synced 2024-06-25 06:23:18 +00:00

Code cleaning: remove tabulators, remove multiple blank lines

This commit is contained in:
Carles Fernandez 2017-03-13 20:54:25 +01:00
parent 507bc86cc9
commit ef5cb645a7
9 changed files with 290 additions and 336 deletions

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@ -103,7 +103,7 @@ GpsL1CaDllPllCAidTrackingFpga::GpsL1CaDllPllCAidTrackingFpga(
{ {
item_size_ = sizeof(lv_16sc_t); item_size_ = sizeof(lv_16sc_t);
// LOG(WARNING) << item_type_ << " unknown tracking item type"; // LOG(WARNING) << item_type_ << " unknown tracking item type";
LOG(WARNING) << item_type_ << " the tracking item type for the FPGA tracking test has to be cshort"; LOG(WARNING) << item_type_ << " the tracking item type for the FPGA tracking test has to be cshort";
} }
channel_ = 0; channel_ = 0;
@ -112,7 +112,7 @@ GpsL1CaDllPllCAidTrackingFpga::GpsL1CaDllPllCAidTrackingFpga(
GpsL1CaDllPllCAidTrackingFpga::~GpsL1CaDllPllCAidTrackingFpga() GpsL1CaDllPllCAidTrackingFpga::~GpsL1CaDllPllCAidTrackingFpga()
{ {
printf("gspl1cadllpllcaidtrackingfpga destructor called\n"); LOG(INFO) << "gspl1cadllpllcaidtrackingfpga destructor called";
} }
@ -125,11 +125,12 @@ void GpsL1CaDllPllCAidTrackingFpga::start_tracking()
} }
else else
{ {
// LOG(WARNING) << item_type_ << " unknown tracking item type"; // LOG(WARNING) << item_type_ << " unknown tracking item type";
LOG(WARNING) << item_type_ << " the tracking item type for the FPGA tracking test has to be cshort"; LOG(WARNING) << item_type_ << " the tracking item type for the FPGA tracking test has to be cshort";
} }
} }
/* /*
* Set tracking channel unique ID * Set tracking channel unique ID
*/ */
@ -143,11 +144,12 @@ void GpsL1CaDllPllCAidTrackingFpga::set_channel(unsigned int channel)
} }
else else
{ {
// LOG(WARNING) << item_type_ << " unknown tracking item type"; // LOG(WARNING) << item_type_ << " unknown tracking item type";
LOG(WARNING) << item_type_ << " the tracking item type for the FPGA tracking test has to be cshort"; LOG(WARNING) << item_type_ << " the tracking item type for the FPGA tracking test has to be cshort";
} }
} }
void GpsL1CaDllPllCAidTrackingFpga::set_gnss_synchro(Gnss_Synchro* p_gnss_synchro) void GpsL1CaDllPllCAidTrackingFpga::set_gnss_synchro(Gnss_Synchro* p_gnss_synchro)
{ {
if (item_type_.compare("cshort") == 0) if (item_type_.compare("cshort") == 0)
@ -156,44 +158,42 @@ void GpsL1CaDllPllCAidTrackingFpga::set_gnss_synchro(Gnss_Synchro* p_gnss_synchr
} }
else else
{ {
// LOG(WARNING) << item_type_ << " unknown tracking item type"; // LOG(WARNING) << item_type_ << " unknown tracking item type";
LOG(WARNING) << item_type_ << " the tracking item type for the FPGA tracking test has to be cshort"; LOG(WARNING) << item_type_ << " the tracking item type for the FPGA tracking test has to be cshort";
} }
} }
void GpsL1CaDllPllCAidTrackingFpga::connect(gr::top_block_sptr top_block) void GpsL1CaDllPllCAidTrackingFpga::connect(gr::top_block_sptr top_block)
{ {
if(top_block) { /* top_block is not null */}; if(top_block) { /* top_block is not null */};
//nothing to connect, now the tracking uses gr_sync_decimator //nothing to connect, now the tracking uses gr_sync_decimator
} }
void GpsL1CaDllPllCAidTrackingFpga::disconnect(gr::top_block_sptr top_block) void GpsL1CaDllPllCAidTrackingFpga::disconnect(gr::top_block_sptr top_block)
{ {
if(top_block) { /* top_block is not null */}; if(top_block) { /* top_block is not null */};
//nothing to disconnect, now the tracking uses gr_sync_decimator //nothing to disconnect, now the tracking uses gr_sync_decimator
} }
// CONVERT TO SOURCE // CONVERT TO SOURCE
gr::basic_block_sptr GpsL1CaDllPllCAidTrackingFpga::get_left_block() gr::basic_block_sptr GpsL1CaDllPllCAidTrackingFpga::get_left_block()
{ {
if (item_type_.compare("cshort") == 0) if (item_type_.compare("cshort") == 0)
{ {
return tracking_fpga_sc; return tracking_fpga_sc;
} }
else else
{ {
//LOG(WARNING) << item_type_ << " unknown tracking item type"; //LOG(WARNING) << item_type_ << " unknown tracking item type";
LOG(WARNING) << item_type_ << " the tracking item type for the FPGA tracking test has to be cshort"; LOG(WARNING) << item_type_ << " the tracking item type for the FPGA tracking test has to be cshort";
return nullptr; return nullptr;
} }
} }
gr::basic_block_sptr GpsL1CaDllPllCAidTrackingFpga::get_right_block() gr::basic_block_sptr GpsL1CaDllPllCAidTrackingFpga::get_right_block()
{ {
if (item_type_.compare("cshort") == 0) if (item_type_.compare("cshort") == 0)

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@ -52,7 +52,6 @@ class ConfigurationInterface;
class GpsL1CaDllPllCAidTrackingFpga : public TrackingInterface class GpsL1CaDllPllCAidTrackingFpga : public TrackingInterface
{ {
public: public:
GpsL1CaDllPllCAidTrackingFpga(ConfigurationInterface* configuration, GpsL1CaDllPllCAidTrackingFpga(ConfigurationInterface* configuration,
std::string role, std::string role,
unsigned int in_streams, unsigned int in_streams,

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@ -309,8 +309,6 @@ gps_l1_ca_dll_pll_c_aid_tracking_fpga_sc::~gps_l1_ca_dll_pll_c_aid_tracking_fpga
int gps_l1_ca_dll_pll_c_aid_tracking_fpga_sc::general_work (int noutput_items __attribute__((unused)), gr_vector_int &ninput_items __attribute__((unused)), int gps_l1_ca_dll_pll_c_aid_tracking_fpga_sc::general_work (int noutput_items __attribute__((unused)), gr_vector_int &ninput_items __attribute__((unused)),
gr_vector_const_void_star &input_items, gr_vector_void_star &output_items) gr_vector_const_void_star &input_items, gr_vector_void_star &output_items)
{ {
// Block input data and block output stream pointers // Block input data and block output stream pointers
Gnss_Synchro **out = (Gnss_Synchro **) &output_items[0]; Gnss_Synchro **out = (Gnss_Synchro **) &output_items[0];
@ -321,8 +319,6 @@ int gps_l1_ca_dll_pll_c_aid_tracking_fpga_sc::general_work (int noutput_items __
double CURRENT_INTEGRATION_TIME_S = 0.0; double CURRENT_INTEGRATION_TIME_S = 0.0;
double CORRECTED_INTEGRATION_TIME_S = 0.0; double CORRECTED_INTEGRATION_TIME_S = 0.0;
if (d_enable_tracking == true) if (d_enable_tracking == true)
{ {
// Fill the acquisition data // Fill the acquisition data
@ -655,11 +651,11 @@ void gps_l1_ca_dll_pll_c_aid_tracking_fpga_sc::set_channel(unsigned int channel)
d_dump_filename.append(".dat"); d_dump_filename.append(".dat");
d_dump_file.exceptions (std::ifstream::failbit | std::ifstream::badbit); d_dump_file.exceptions (std::ifstream::failbit | std::ifstream::badbit);
d_dump_file.open(d_dump_filename.c_str(), std::ios::out | std::ios::binary); d_dump_file.open(d_dump_filename.c_str(), std::ios::out | std::ios::binary);
LOG(INFO) << "Tracking dump enabled on channel " << d_channel << " Log file: " << d_dump_filename.c_str() << std::endl; LOG(INFO) << "Tracking dump enabled on channel " << d_channel << " Log file: " << d_dump_filename.c_str();
} }
catch (const std::ifstream::failure* e) catch (const std::ifstream::failure* e)
{ {
LOG(WARNING) << "channel " << d_channel << " Exception opening trk dump file " << e->what() << std::endl; LOG(WARNING) << "channel " << d_channel << " Exception opening trk dump file " << e->what();
} }
} }
} }

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@ -77,7 +77,6 @@ bool fpga_multicorrelator_8sc::init(
int n_correlators) int n_correlators)
{ {
size_t size = max_signal_length_samples * sizeof(lv_16sc_t); size_t size = max_signal_length_samples * sizeof(lv_16sc_t);
d_n_correlators = n_correlators; d_n_correlators = n_correlators;
// instantiate variable length vectors // instantiate variable length vectors
@ -87,12 +86,13 @@ bool fpga_multicorrelator_8sc::init(
return true; return true;
} }
void fpga_multicorrelator_8sc::set_initial_sample(int samples_offset) void fpga_multicorrelator_8sc::set_initial_sample(int samples_offset)
{ {
d_initial_sample_counter = samples_offset; d_initial_sample_counter = samples_offset;
} }
bool fpga_multicorrelator_8sc::set_local_code_and_taps( bool fpga_multicorrelator_8sc::set_local_code_and_taps(
int code_length_chips, int code_length_chips,
const lv_16sc_t* local_code_in, const lv_16sc_t* local_code_in,
@ -102,12 +102,9 @@ bool fpga_multicorrelator_8sc::set_local_code_and_taps(
d_shifts_chips = shifts_chips; d_shifts_chips = shifts_chips;
d_code_length_chips = code_length_chips; d_code_length_chips = code_length_chips;
fpga_multicorrelator_8sc::fpga_configure_tracking_gps_local_code(); fpga_multicorrelator_8sc::fpga_configure_tracking_gps_local_code();
return true; return true;
} }
@ -122,15 +119,10 @@ bool fpga_multicorrelator_8sc::set_output_vectors(lv_16sc_t* corr_out)
void fpga_multicorrelator_8sc::update_local_code(int correlator_length_samples, float rem_code_phase_chips, float code_phase_step_chips) void fpga_multicorrelator_8sc::update_local_code(int correlator_length_samples, float rem_code_phase_chips, float code_phase_step_chips)
{ {
d_rem_code_phase_chips = rem_code_phase_chips; d_rem_code_phase_chips = rem_code_phase_chips;
fpga_multicorrelator_8sc::fpga_compute_code_shift_parameters(); fpga_multicorrelator_8sc::fpga_compute_code_shift_parameters();
fpga_multicorrelator_8sc::fpga_configure_code_parameters_in_fpga(); fpga_multicorrelator_8sc::fpga_configure_code_parameters_in_fpga();
} }
@ -141,7 +133,6 @@ bool fpga_multicorrelator_8sc::Carrier_wipeoff_multicorrelator_resampler(
float code_phase_step_chips, float code_phase_step_chips,
int signal_length_samples) int signal_length_samples)
{ {
update_local_code(signal_length_samples, rem_code_phase_chips, code_phase_step_chips); update_local_code(signal_length_samples, rem_code_phase_chips, code_phase_step_chips);
d_rem_carrier_phase_in_rad = rem_carrier_phase_in_rad; d_rem_carrier_phase_in_rad = rem_carrier_phase_in_rad;
@ -163,7 +154,6 @@ bool fpga_multicorrelator_8sc::Carrier_wipeoff_multicorrelator_resampler(
printf("Tracking_module Interrupt number %d\n", irq_count); printf("Tracking_module Interrupt number %d\n", irq_count);
} }
fpga_multicorrelator_8sc::read_tracking_gps_results(); fpga_multicorrelator_8sc::read_tracking_gps_results();
return true; return true;
@ -182,23 +172,18 @@ fpga_multicorrelator_8sc::fpga_multicorrelator_8sc()
fpga_multicorrelator_8sc::~fpga_multicorrelator_8sc() fpga_multicorrelator_8sc::~fpga_multicorrelator_8sc()
{ {
close(d_fd); close(d_fd);
} }
bool fpga_multicorrelator_8sc::free() bool fpga_multicorrelator_8sc::free()
{ {
// unlock the hardware // unlock the hardware
fpga_multicorrelator_8sc::unlock_channel(); // unlock the channel fpga_multicorrelator_8sc::unlock_channel(); // unlock the channel
// free the FPGA dynamically created variables // free the FPGA dynamically created variables
if (d_initial_index != nullptr) if (d_initial_index != nullptr)
{ {
volk_gnsssdr_free(d_initial_index); volk_gnsssdr_free(d_initial_index);
d_initial_index = nullptr; d_initial_index = nullptr;
} }
@ -213,11 +198,8 @@ bool fpga_multicorrelator_8sc::free()
} }
void fpga_multicorrelator_8sc::set_channel(unsigned int channel) void fpga_multicorrelator_8sc::set_channel(unsigned int channel)
{ {
d_channel = channel; d_channel = channel;
snprintf(d_device_io_name, MAX_LENGTH_DEVICEIO_NAME, "/dev/uio%d",d_channel); snprintf(d_device_io_name, MAX_LENGTH_DEVICEIO_NAME, "/dev/uio%d",d_channel);
@ -244,11 +226,12 @@ void fpga_multicorrelator_8sc::set_channel(unsigned int channel)
} }
else else
{ {
printf("Test register sanity check success !\n"); LOG(INFO) << "Test register sanity check success !";
} }
} }
unsigned fpga_multicorrelator_8sc::fpga_acquisition_test_register(unsigned writeval) unsigned fpga_multicorrelator_8sc::fpga_acquisition_test_register(unsigned writeval)
{ {
unsigned readval; unsigned readval;
@ -258,29 +241,28 @@ unsigned fpga_multicorrelator_8sc::fpga_acquisition_test_register(unsigned write
readval = d_map_base[15]; readval = d_map_base[15];
// return read value // return read value
return readval; return readval;
} }
void fpga_multicorrelator_8sc::fpga_configure_tracking_gps_local_code(void) void fpga_multicorrelator_8sc::fpga_configure_tracking_gps_local_code(void)
{ {
int k,s; int k,s;
unsigned temp; unsigned temp;
unsigned *ena_write_signals; unsigned *ena_write_signals;
ena_write_signals = new unsigned[d_n_correlators]; ena_write_signals = new unsigned[d_n_correlators];
ena_write_signals[0]= 0x00000000; ena_write_signals[0] = 0x00000000;
ena_write_signals[1]= 0x20000000; ena_write_signals[1] = 0x20000000;
for (s=2;s<d_n_correlators;s++) for (s = 2; s < d_n_correlators; s++)
{ {
ena_write_signals[s]= ena_write_signals[s-1]*2; //0x40000000; ena_write_signals[s]= ena_write_signals[s-1]*2; //0x40000000;
} }
for (s=0;s<d_n_correlators;s++) for (s = 0; s < d_n_correlators; s++)
{ {
// clear memory address counter // clear memory address counter
d_map_base[11] = 0x10000000; d_map_base[11] = 0x10000000;
// write correlator 0 // write correlator 0
for (k=0;k< d_code_length_chips;k++) for (k = 0; k < d_code_length_chips; k++)
{ {
if (lv_creal(d_local_code_in[k]) == 1) if (lv_creal(d_local_code_in[k]) == 1)
{ {
@ -291,13 +273,13 @@ void fpga_multicorrelator_8sc::fpga_configure_tracking_gps_local_code(void)
temp = 0; temp = 0;
} }
d_map_base[11] = 0x0C000000 | (temp & 0xFFFF) | ena_write_signals[s]; d_map_base[11] = 0x0C000000 | (temp & 0xFFFF) | ena_write_signals[s];
} }
} }
delete [] ena_write_signals; delete [] ena_write_signals;
} }
void fpga_multicorrelator_8sc::fpga_compute_code_shift_parameters(void) void fpga_multicorrelator_8sc::fpga_compute_code_shift_parameters(void)
{ {
float tempvalues[3]; float tempvalues[3];
@ -305,7 +287,7 @@ void fpga_multicorrelator_8sc::fpga_compute_code_shift_parameters(void)
float tempvalues3[3]; float tempvalues3[3];
int i; int i;
for (i=0;i<d_n_correlators;i++) for (i = 0; i < d_n_correlators; i++)
{ {
// initial index calculation // initial index calculation
tempvalues[i] = floor(d_shifts_chips[i] + d_rem_code_phase_chips); tempvalues[i] = floor(d_shifts_chips[i] + d_rem_code_phase_chips);
@ -326,15 +308,14 @@ void fpga_multicorrelator_8sc::fpga_compute_code_shift_parameters(void)
tempvalues3[i] = tempvalues3[i] + 1.0; // fmod operator does not work as in Matlab with negative numbers tempvalues3[i] = tempvalues3[i] + 1.0; // fmod operator does not work as in Matlab with negative numbers
} }
d_initial_interp_counter[i] = (unsigned) floor(MAX_CODE_RESAMPLER_COUNTER * tempvalues3[i]); d_initial_interp_counter[i] = (unsigned) floor(MAX_CODE_RESAMPLER_COUNTER * tempvalues3[i]);
} }
} }
void fpga_multicorrelator_8sc::fpga_configure_code_parameters_in_fpga(void) void fpga_multicorrelator_8sc::fpga_configure_code_parameters_in_fpga(void)
{ {
int i; int i;
for (i=0;i<d_n_correlators;i++) for (i = 0; i < d_n_correlators; i++)
{ {
d_map_base[1+i] = d_initial_index[i]; d_map_base[1+i] = d_initial_index[i];
d_map_base[1 + d_n_correlators + i] = d_initial_interp_counter[i]; d_map_base[1 + d_n_correlators + i] = d_initial_interp_counter[i];
@ -348,7 +329,7 @@ void fpga_multicorrelator_8sc::fpga_compute_signal_parameters_in_fpga(void)
float d_rem_carrier_phase_in_rad_temp; float d_rem_carrier_phase_in_rad_temp;
float d_phase_step_rad_int_temp; float d_phase_step_rad_int_temp;
d_code_phase_step_chips_num = (unsigned) roundf(MAX_CODE_RESAMPLER_COUNTER*d_code_phase_step_chips); d_code_phase_step_chips_num = (unsigned) roundf(MAX_CODE_RESAMPLER_COUNTER * d_code_phase_step_chips);
if (d_rem_carrier_phase_in_rad > M_PI) if (d_rem_carrier_phase_in_rad > M_PI)
{ {
@ -375,8 +356,9 @@ void fpga_multicorrelator_8sc::fpga_compute_signal_parameters_in_fpga(void)
{ {
d_phase_step_rad_int = -d_phase_step_rad_int; d_phase_step_rad_int = -d_phase_step_rad_int;
} }
} }
void fpga_multicorrelator_8sc::fpga_configure_signal_parameters_in_fpga(void) void fpga_multicorrelator_8sc::fpga_configure_signal_parameters_in_fpga(void)
{ {
d_map_base[0] = d_code_phase_step_chips_num; d_map_base[0] = d_code_phase_step_chips_num;
@ -387,6 +369,7 @@ void fpga_multicorrelator_8sc::fpga_configure_signal_parameters_in_fpga(void)
d_map_base[13] = d_initial_sample_counter; d_map_base[13] = d_initial_sample_counter;
} }
void fpga_multicorrelator_8sc::fpga_launch_multicorrelator_fpga(void) void fpga_multicorrelator_8sc::fpga_launch_multicorrelator_fpga(void)
{ {
// enable interrupts // enable interrupts
@ -397,50 +380,46 @@ void fpga_multicorrelator_8sc::fpga_launch_multicorrelator_fpga(void)
} }
void fpga_multicorrelator_8sc::read_tracking_gps_results(void) void fpga_multicorrelator_8sc::read_tracking_gps_results(void)
{ {
int *readval_real; int *readval_real;
int *readval_imag; int *readval_imag;
int k; int k;
readval_real= new int[d_n_correlators]; readval_real = new int[d_n_correlators];
readval_imag= new int[d_n_correlators]; readval_imag = new int[d_n_correlators];
for (k=0;k<d_n_correlators;k++) for (k =0 ; k < d_n_correlators; k++)
{ {
readval_real[k] = d_map_base[1 + k]; readval_real[k] = d_map_base[1 + k];
if (readval_real[k] >= 1048576) // 0x100000 (21 bits two's complement) if (readval_real[k] >= 1048576) // 0x100000 (21 bits two's complement)
{ {
readval_real[k] = -2097152 + readval_real[k]; readval_real[k] = -2097152 + readval_real[k];
} }
readval_real[k] = readval_real[k]*2; // the results are shifted two bits to the left due to the complex multiplier in the FPGA readval_real[k] = readval_real[k] * 2; // the results are shifted two bits to the left due to the complex multiplier in the FPGA
} }
for (k=0;k<d_n_correlators;k++) for (k = 0; k < d_n_correlators; k++)
{ {
readval_imag[k] = d_map_base[1 + d_n_correlators + k]; readval_imag[k] = d_map_base[1 + d_n_correlators + k];
if (readval_imag[k] >= 1048576) // 0x100000 (21 bits two's complement) if (readval_imag[k] >= 1048576) // 0x100000 (21 bits two's complement)
{ {
readval_imag[k] = -2097152 + readval_imag[k]; readval_imag[k] = -2097152 + readval_imag[k];
} }
readval_imag[k] = readval_imag[k]*2; // the results are shifted two bits to the left due to the complex multiplier in the FPGA readval_imag[k] = readval_imag[k] * 2; // the results are shifted two bits to the left due to the complex multiplier in the FPGA
} }
for (k=0;k<d_n_correlators;k++) for (k = 0; k < d_n_correlators; k++)
{ {
d_corr_out[k] = lv_cmake(readval_real[k], readval_imag[k]); d_corr_out[k] = lv_cmake(readval_real[k], readval_imag[k]);
} }
delete[] readval_real; delete[] readval_real;
delete[] readval_imag; delete[] readval_imag;
} }
void fpga_multicorrelator_8sc::unlock_channel(void) void fpga_multicorrelator_8sc::unlock_channel(void)
{ {
// unlock the channel to let the next samples go through // unlock the channel to let the next samples go through
d_map_base[12] = 1; // unlock the channel d_map_base[12] = 1; // unlock the channel
} }

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@ -61,14 +61,12 @@ public:
void set_initial_sample(int samples_offset); void set_initial_sample(int samples_offset);
private: private:
const lv_16sc_t *d_local_code_in; const lv_16sc_t *d_local_code_in;
lv_16sc_t *d_corr_out; lv_16sc_t *d_corr_out;
float *d_shifts_chips; float *d_shifts_chips;
int d_code_length_chips; int d_code_length_chips;
int d_n_correlators; int d_n_correlators;
// data related to the hardware module and the driver // data related to the hardware module and the driver
char d_device_io_name[MAX_LENGTH_DEVICEIO_NAME]; // driver io name char d_device_io_name[MAX_LENGTH_DEVICEIO_NAME]; // driver io name
int d_fd; // driver descriptor int d_fd; // driver descriptor

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@ -130,11 +130,11 @@ if(OPENCL_FOUND)
add_definitions(-DOPENCL_BLOCKS_TEST=1) add_definitions(-DOPENCL_BLOCKS_TEST=1)
endif(OPENCL_FOUND) endif(OPENCL_FOUND)
if (ENABLE_CUDA) if(ENABLE_CUDA)
add_definitions(-DCUDA_BLOCKS_TEST=1) add_definitions(-DCUDA_BLOCKS_TEST=1)
endif(ENABLE_CUDA) endif(ENABLE_CUDA)
if (ENABLE_FPGA) if(ENABLE_FPGA)
add_definitions(-DFPGA_BLOCKS_TEST=1) add_definitions(-DFPGA_BLOCKS_TEST=1)
endif(ENABLE_FPGA) endif(ENABLE_FPGA)

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@ -119,6 +119,10 @@ DECLARE_string(log_dir);
#include "unit-tests/signal-processing-blocks/tracking/gpu_multicorrelator_test.cc" #include "unit-tests/signal-processing-blocks/tracking/gpu_multicorrelator_test.cc"
#endif #endif
#if FPGA_BLOCKS_TEST
#include "unit-tests/signal-processing-blocks/tracking/gps_l1_ca_dll_pll_tracking_test_fpga.cc"
#endif
#include "unit-tests/signal-processing-blocks/pvt/rtcm_test.cc" #include "unit-tests/signal-processing-blocks/pvt/rtcm_test.cc"
#include "unit-tests/signal-processing-blocks/pvt/rtcm_printer_test.cc" #include "unit-tests/signal-processing-blocks/pvt/rtcm_printer_test.cc"
#include "unit-tests/signal-processing-blocks/pvt/rinex_printer_test.cc" #include "unit-tests/signal-processing-blocks/pvt/rinex_printer_test.cc"
@ -132,9 +136,7 @@ DECLARE_string(log_dir);
#endif #endif
#endif #endif
#if FPGA_BLOCKS_TEST
#include "unit-tests/signal-processing-blocks/tracking/gps_l1_ca_dll_pll_tracking_test_fpga.cc"
#endif
// For GPS NAVIGATION (L1) // For GPS NAVIGATION (L1)
concurrent_queue<Gps_Acq_Assist> global_gps_acq_assist_queue; concurrent_queue<Gps_Acq_Assist> global_gps_acq_assist_queue;

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@ -36,9 +36,9 @@
#include <iostream> #include <iostream>
#include <unistd.h> #include <unistd.h>
#include <armadillo> #include <armadillo>
#include <boost/thread.hpp> // to test the FPGA we have to create a simultaneous task to send the samples using the DMA and stop the test #include <boost/thread.hpp>// to test the FPGA we have to create a simultaneous task to send the samples using the DMA and stop the test
#include <boost/chrono.hpp> // temporary for debugging #include <boost/chrono.hpp> // temporary for debugging
#include <stdio.h> // FPGA read input file #include <stdio.h>// FPGA read input file
#include <gnuradio/top_block.h> #include <gnuradio/top_block.h>
#include <gnuradio/blocks/file_source.h> #include <gnuradio/blocks/file_source.h>
#include <gnuradio/analog/sig_source_waveform.h> #include <gnuradio/analog/sig_source_waveform.h>
@ -68,6 +68,8 @@
#define MAX_INPUT_SAMPLES_TOTAL MAX_INPUT_SAMPLES_PER_TEST_CASE*MAX_NUM_TEST_CASES #define MAX_INPUT_SAMPLES_TOTAL MAX_INPUT_SAMPLES_PER_TEST_CASE*MAX_NUM_TEST_CASES
#define DMA_TRANSFER_SIZE 2046 #define DMA_TRANSFER_SIZE 2046
#define MIN_SAMPLES_REMAINING 20000 // number of remaining samples in the DMA that causes the CPU to stop the flowgraph (it has to be a bit alrger than 2x max packet size) #define MIN_SAMPLES_REMAINING 20000 // number of remaining samples in the DMA that causes the CPU to stop the flowgraph (it has to be a bit alrger than 2x max packet size)
void wait(int seconds) void wait(int seconds)
{ {
boost::this_thread::sleep_for(boost::chrono::seconds{seconds}); boost::this_thread::sleep_for(boost::chrono::seconds{seconds});
@ -90,14 +92,13 @@ void send_tracking_gps_input_samples(FILE *ptr_myfile, int num_remaining_samples
exit(1); exit(1);
} }
buffer=(char *)malloc(DMA_TRANSFER_SIZE); buffer = (char *)malloc(DMA_TRANSFER_SIZE);
if (!buffer) if (!buffer)
{ {
fprintf(stderr, "Memory error!"); fprintf(stderr, "Memory error!");
} }
while(num_remaining_samples > 0)
while(num_remaining_samples >0)
{ {
if (num_remaining_samples < MIN_SAMPLES_REMAINING) if (num_remaining_samples < MIN_SAMPLES_REMAINING)
{ {
@ -125,35 +126,28 @@ void send_tracking_gps_input_samples(FILE *ptr_myfile, int num_remaining_samples
num_samples_transferred = num_samples_transferred + num_remaining_samples; num_samples_transferred = num_samples_transferred + num_remaining_samples;
num_remaining_samples = 0; num_remaining_samples = 0;
} }
} }
free(buffer); free(buffer);
close(tx_fd); close(tx_fd);
} }
// thread that sends the samples to the FPGA // thread that sends the samples to the FPGA
void thread(gr::top_block_sptr top_block, const char * file_name) void thread(gr::top_block_sptr top_block, const char * file_name)
{ {
// file descriptor // file descriptor
FILE *ptr_myfile; FILE *ptr_myfile;
int fileLen; int fileLen;
ptr_myfile=fopen(file_name,"rb"); ptr_myfile = fopen(file_name,"rb");
if (!ptr_myfile) if (!ptr_myfile)
{ {
printf("Unable to open file!"); printf("Unable to open file!");
} }
fseek(ptr_myfile, 0, SEEK_END); fseek(ptr_myfile, 0, SEEK_END);
fileLen=ftell(ptr_myfile); fileLen = ftell(ptr_myfile);
fseek(ptr_myfile, 0, SEEK_SET); fseek(ptr_myfile, 0, SEEK_SET);
wait(20); // wait for some time to give time to the other thread to program the device wait(20); // wait for some time to give time to the other thread to program the device
@ -162,17 +156,19 @@ void thread(gr::top_block_sptr top_block, const char * file_name)
send_tracking_gps_input_samples(ptr_myfile, fileLen, top_block); send_tracking_gps_input_samples(ptr_myfile, fileLen, top_block);
fclose(ptr_myfile); fclose(ptr_myfile);
} }
// ######## GNURADIO BLOCK MESSAGE RECEVER ######### // ######## GNURADIO BLOCK MESSAGE RECEVER #########
class GpsL1CADllPllTrackingTestFpga_msg_rx; class GpsL1CADllPllTrackingTestFpga_msg_rx;
typedef boost::shared_ptr<GpsL1CADllPllTrackingTestFpga_msg_rx> GpsL1CADllPllTrackingTestFpga_msg_rx_sptr; typedef boost::shared_ptr<GpsL1CADllPllTrackingTestFpga_msg_rx> GpsL1CADllPllTrackingTestFpga_msg_rx_sptr;
GpsL1CADllPllTrackingTestFpga_msg_rx_sptr GpsL1CADllPllTrackingTestFpga_msg_rx_make(); GpsL1CADllPllTrackingTestFpga_msg_rx_sptr GpsL1CADllPllTrackingTestFpga_msg_rx_make();
class GpsL1CADllPllTrackingTestFpga_msg_rx : public gr::block class GpsL1CADllPllTrackingTestFpga_msg_rx : public gr::block
{ {
private: private:
@ -185,11 +181,13 @@ public:
~GpsL1CADllPllTrackingTestFpga_msg_rx(); //!< Default destructor ~GpsL1CADllPllTrackingTestFpga_msg_rx(); //!< Default destructor
}; };
GpsL1CADllPllTrackingTestFpga_msg_rx_sptr GpsL1CADllPllTrackingTestFpga_msg_rx_make() GpsL1CADllPllTrackingTestFpga_msg_rx_sptr GpsL1CADllPllTrackingTestFpga_msg_rx_make()
{ {
return GpsL1CADllPllTrackingTestFpga_msg_rx_sptr(new GpsL1CADllPllTrackingTestFpga_msg_rx()); return GpsL1CADllPllTrackingTestFpga_msg_rx_sptr(new GpsL1CADllPllTrackingTestFpga_msg_rx());
} }
void GpsL1CADllPllTrackingTestFpga_msg_rx::msg_handler_events(pmt::pmt_t msg) void GpsL1CADllPllTrackingTestFpga_msg_rx::msg_handler_events(pmt::pmt_t msg)
{ {
try try
@ -204,6 +202,7 @@ void GpsL1CADllPllTrackingTestFpga_msg_rx::msg_handler_events(pmt::pmt_t msg)
} }
} }
GpsL1CADllPllTrackingTestFpga_msg_rx::GpsL1CADllPllTrackingTestFpga_msg_rx() : GpsL1CADllPllTrackingTestFpga_msg_rx::GpsL1CADllPllTrackingTestFpga_msg_rx() :
gr::block("GpsL1CADllPllTrackingTestFpga_msg_rx", gr::io_signature::make(0, 0, 0), gr::io_signature::make(0, 0, 0)) gr::block("GpsL1CADllPllTrackingTestFpga_msg_rx", gr::io_signature::make(0, 0, 0), gr::io_signature::make(0, 0, 0))
{ {
@ -212,16 +211,15 @@ GpsL1CADllPllTrackingTestFpga_msg_rx::GpsL1CADllPllTrackingTestFpga_msg_rx() :
rx_message = 0; rx_message = 0;
} }
GpsL1CADllPllTrackingTestFpga_msg_rx::~GpsL1CADllPllTrackingTestFpga_msg_rx() GpsL1CADllPllTrackingTestFpga_msg_rx::~GpsL1CADllPllTrackingTestFpga_msg_rx()
{} {}
// ########################################################### // ###########################################################
class GpsL1CADllPllTrackingTestFpga: public ::testing::Test class GpsL1CADllPllTrackingTestFpga: public ::testing::Test
{ {
public: public:
std::string generator_binary; std::string generator_binary;
std::string p1; std::string p1;
@ -335,13 +333,13 @@ void GpsL1CADllPllTrackingTestFpga::configure_receiver()
config->set_property("Tracking_1C.early_late_space_chips", "0.5"); config->set_property("Tracking_1C.early_late_space_chips", "0.5");
} }
void GpsL1CADllPllTrackingTestFpga::check_results_doppler(arma::vec true_time_s, void GpsL1CADllPllTrackingTestFpga::check_results_doppler(arma::vec true_time_s,
arma::vec true_value, arma::vec true_value,
arma::vec meas_time_s, arma::vec meas_time_s,
arma::vec meas_value) arma::vec meas_value)
{ {
//1. True value interpolation to match the measurement times //1. True value interpolation to match the measurement times
arma::vec true_value_interp; arma::vec true_value_interp;
arma::interp1(true_time_s, true_value, meas_time_s, true_value_interp); arma::interp1(true_time_s, true_value, meas_time_s, true_value_interp);
@ -361,20 +359,18 @@ void GpsL1CADllPllTrackingTestFpga::check_results_doppler(arma::vec true_time_s,
double min_error = arma::min(err); double min_error = arma::min(err);
//5. report //5. report
std::cout << std::setprecision(10) << "TRK Doppler RMSE=" << rmse std::cout << std::setprecision(10) << "TRK Doppler RMSE=" << rmse
<< ", mean=" << error_mean << ", mean=" << error_mean
<< ", stdev="<< sqrt(error_var) << " (max,min)=" << max_error << "," << min_error << " [Hz]" << std::endl; << ", stdev="<< sqrt(error_var) << " (max,min)=" << max_error << "," << min_error << " [Hz]" << std::endl;
} }
void GpsL1CADllPllTrackingTestFpga::check_results_acc_carrier_phase(arma::vec true_time_s, void GpsL1CADllPllTrackingTestFpga::check_results_acc_carrier_phase(arma::vec true_time_s,
arma::vec true_value, arma::vec true_value,
arma::vec meas_time_s, arma::vec meas_time_s,
arma::vec meas_value) arma::vec meas_value)
{ {
//1. True value interpolation to match the measurement times //1. True value interpolation to match the measurement times
arma::vec true_value_interp; arma::vec true_value_interp;
arma::interp1(true_time_s, true_value, meas_time_s, true_value_interp); arma::interp1(true_time_s, true_value, meas_time_s, true_value_interp);
@ -394,26 +390,24 @@ void GpsL1CADllPllTrackingTestFpga::check_results_acc_carrier_phase(arma::vec tr
double min_error = arma::min(err); double min_error = arma::min(err);
//5. report //5. report
std::cout << std::setprecision(10) << "TRK acc carrier phase RMSE=" << rmse std::cout << std::setprecision(10) << "TRK acc carrier phase RMSE=" << rmse
<< ", mean=" << error_mean << ", mean=" << error_mean
<< ", stdev=" << sqrt(error_var) << " (max,min)=" << max_error << "," << min_error << " [Hz]" << std::endl; << ", stdev=" << sqrt(error_var) << " (max,min)=" << max_error << "," << min_error << " [Hz]" << std::endl;
} }
void GpsL1CADllPllTrackingTestFpga::check_results_codephase(arma::vec true_time_s, void GpsL1CADllPllTrackingTestFpga::check_results_codephase(arma::vec true_time_s,
arma::vec true_value, arma::vec true_value,
arma::vec meas_time_s, arma::vec meas_time_s,
arma::vec meas_value) arma::vec meas_value)
{ {
//1. True value interpolation to match the measurement times //1. True value interpolation to match the measurement times
arma::vec true_value_interp; arma::vec true_value_interp;
arma::interp1(true_time_s, true_value, meas_time_s, true_value_interp); arma::interp1(true_time_s, true_value, meas_time_s, true_value_interp);
//2. RMSE //2. RMSE
arma::vec err; arma::vec err;
err = meas_value - true_value_interp; err = meas_value - true_value_interp;
arma::vec err2 = arma::square(err); arma::vec err2 = arma::square(err);
double rmse = sqrt(arma::mean(err2)); double rmse = sqrt(arma::mean(err2));
@ -427,16 +421,14 @@ void GpsL1CADllPllTrackingTestFpga::check_results_codephase(arma::vec true_time_
double min_error = arma::min(err); double min_error = arma::min(err);
//5. report //5. report
std::cout << std::setprecision(10) << "TRK code phase RMSE=" << rmse std::cout << std::setprecision(10) << "TRK code phase RMSE=" << rmse
<< ", mean=" << error_mean << ", mean=" << error_mean
<< ", stdev=" << sqrt(error_var) << " (max,min)=" << max_error << "," << min_error << " [Chips]" << std::endl; << ", stdev=" << sqrt(error_var) << " (max,min)=" << max_error << "," << min_error << " [Chips]" << std::endl;
} }
TEST_F(GpsL1CADllPllTrackingTestFpga, ValidationOfResultsFpga) TEST_F(GpsL1CADllPllTrackingTestFpga, ValidationOfResultsFpga)
{ {
configure_generator(); configure_generator();
// DO not generate signal raw signal samples and observations RINEX file by default // DO not generate signal raw signal samples and observations RINEX file by default
@ -478,39 +470,31 @@ TEST_F(GpsL1CADllPllTrackingTestFpga, ValidationOfResultsFpga)
//restart the epoch counter //restart the epoch counter
true_obs_data.restart(); true_obs_data.restart();
std::cout << "Initial Doppler [Hz]=" << true_obs_data.doppler_l1_hz << " Initial code delay [Chips]=" << true_obs_data.prn_delay_chips << std::endl; std::cout << "Initial Doppler [Hz]=" << true_obs_data.doppler_l1_hz << " Initial code delay [Chips]=" << true_obs_data.prn_delay_chips << std::endl;
gnss_synchro.Acq_delay_samples = (GPS_L1_CA_CODE_LENGTH_CHIPS - true_obs_data.prn_delay_chips / GPS_L1_CA_CODE_LENGTH_CHIPS) * baseband_sampling_freq * GPS_L1_CA_CODE_PERIOD; gnss_synchro.Acq_delay_samples = (GPS_L1_CA_CODE_LENGTH_CHIPS - true_obs_data.prn_delay_chips / GPS_L1_CA_CODE_LENGTH_CHIPS) * baseband_sampling_freq * GPS_L1_CA_CODE_PERIOD;
gnss_synchro.Acq_doppler_hz = true_obs_data.doppler_l1_hz; gnss_synchro.Acq_doppler_hz = true_obs_data.doppler_l1_hz;
gnss_synchro.Acq_samplestamp_samples = 0; gnss_synchro.Acq_samplestamp_samples = 0;
ASSERT_NO_THROW( { ASSERT_NO_THROW( {
tracking->set_channel(gnss_synchro.Channel_ID); tracking->set_channel(gnss_synchro.Channel_ID);
}) << "Failure setting channel." << std::endl; }) << "Failure setting channel." << std::endl;
ASSERT_NO_THROW( { ASSERT_NO_THROW( {
tracking->set_gnss_synchro(&gnss_synchro); tracking->set_gnss_synchro(&gnss_synchro);
}) << "Failure setting gnss_synchro." << std::endl; }) << "Failure setting gnss_synchro." << std::endl;
ASSERT_NO_THROW( { ASSERT_NO_THROW( {
tracking->connect(top_block); tracking->connect(top_block);
}) << "Failure connecting tracking to the top_block." << std::endl; }) << "Failure connecting tracking to the top_block." << std::endl;
ASSERT_NO_THROW( { ASSERT_NO_THROW( {
gr::blocks::null_sink::sptr sink = gr::blocks::null_sink::make(sizeof(Gnss_Synchro)); gr::blocks::null_sink::sptr sink = gr::blocks::null_sink::make(sizeof(Gnss_Synchro));
top_block->connect(tracking->get_right_block(), 0, sink, 0); top_block->connect(tracking->get_right_block(), 0, sink, 0);
top_block->msg_connect(tracking->get_right_block(), pmt::mp("events"), msg_rx, pmt::mp("events")); top_block->msg_connect(tracking->get_right_block(), pmt::mp("events"), msg_rx, pmt::mp("events"));
}) << "Failure connecting the blocks of tracking test." << std::endl; }) << "Failure connecting the blocks of tracking test." << std::endl;
tracking->start_tracking(); tracking->start_tracking();
// assemble again the file name in a null terminated string (not available by default in the main program flow) // assemble again the file name in a null terminated string (not available by default in the main program flow)
std::string file = "./" + filename_raw_data; std::string file = "./" + filename_raw_data;
const char * file_name = file.c_str(); const char * file_name = file.c_str();
@ -530,9 +514,6 @@ TEST_F(GpsL1CADllPllTrackingTestFpga, ValidationOfResultsFpga)
// wait until child thread terminates // wait until child thread terminates
t.join(); t.join();
//check results //check results
//load the true values //load the true values
long int nepoch = true_obs_data.num_epochs(); long int nepoch = true_obs_data.num_epochs();
@ -602,4 +583,3 @@ TEST_F(GpsL1CADllPllTrackingTestFpga, ValidationOfResultsFpga)
std::cout << "Signal tracking completed in " << (end - begin) << " microseconds" << std::endl; std::cout << "Signal tracking completed in " << (end - begin) << " microseconds" << std::endl;
} }