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mirror of https://github.com/gnss-sdr/gnss-sdr synced 2025-08-05 21:33:47 +00:00

applied clang-format

This commit is contained in:
Marc Majoral 2019-07-19 11:55:53 +02:00
parent 8c84702f27
commit 8b0e170a56
12 changed files with 903 additions and 946 deletions

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@ -134,56 +134,52 @@ void pcps_acquisition_fpga::set_state(int32_t state)
void pcps_acquisition_fpga::send_positive_acquisition() void pcps_acquisition_fpga::send_positive_acquisition()
{ {
// debug L5 // debug L5
// d_gnss_synchro->Acq_delay_samples = 2694; // d_gnss_synchro->Acq_delay_samples = 2694;
// d_gnss_synchro->Acq_doppler_hz = 2650; // d_gnss_synchro->Acq_doppler_hz = 2650;
// d_gnss_synchro->Acq_samplestamp_samples = 56500224; // d_gnss_synchro->Acq_samplestamp_samples = 56500224;
// d_gnss_synchro->Flag_valid_word = 0; // d_gnss_synchro->Flag_valid_word = 0;
// d_gnss_synchro->Flag_valid_pseudorange = 0; // d_gnss_synchro->Flag_valid_pseudorange = 0;
// d_gnss_synchro->Flag_valid_symbol_output = 0; // d_gnss_synchro->Flag_valid_symbol_output = 0;
// d_gnss_synchro->Flag_valid_acquisition = 0; // d_gnss_synchro->Flag_valid_acquisition = 0;
// d_gnss_synchro->Acq_delay_samples = 10846; // d_gnss_synchro->Acq_delay_samples = 10846;
// d_gnss_synchro->Acq_doppler_hz = 2575; // d_gnss_synchro->Acq_doppler_hz = 2575;
// d_gnss_synchro->Acq_samplestamp_samples = 399605760; // d_gnss_synchro->Acq_samplestamp_samples = 399605760;
// d_gnss_synchro->Flag_valid_word = 0; // d_gnss_synchro->Flag_valid_word = 0;
// d_gnss_synchro->Flag_valid_pseudorange = 0; // d_gnss_synchro->Flag_valid_pseudorange = 0;
// d_gnss_synchro->Flag_valid_symbol_output = 0; // d_gnss_synchro->Flag_valid_symbol_output = 0;
// d_gnss_synchro->Flag_valid_acquisition = 0; // d_gnss_synchro->Flag_valid_acquisition = 0;
// if (d_channel == 0) // if (d_channel == 0)
// { // {
// d_gnss_synchro->Acq_delay_samples = 401; // d_gnss_synchro->Acq_delay_samples = 401;
// d_gnss_synchro->Acq_doppler_hz = 2650; // d_gnss_synchro->Acq_doppler_hz = 2650;
// d_gnss_synchro->Acq_samplestamp_samples = 96591872; // d_gnss_synchro->Acq_samplestamp_samples = 96591872;
// d_gnss_synchro->Flag_valid_word = 0; // d_gnss_synchro->Flag_valid_word = 0;
// d_gnss_synchro->Flag_valid_pseudorange = 0; // d_gnss_synchro->Flag_valid_pseudorange = 0;
// d_gnss_synchro->Flag_valid_symbol_output = 0; // d_gnss_synchro->Flag_valid_symbol_output = 0;
// d_gnss_synchro->Flag_valid_acquisition = 0; // d_gnss_synchro->Flag_valid_acquisition = 0;
// d_gnss_synchro->Acq_delay_samples = 1505; // d_gnss_synchro->Acq_delay_samples = 1505;
// d_gnss_synchro->Acq_doppler_hz = 2575; // d_gnss_synchro->Acq_doppler_hz = 2575;
// d_gnss_synchro->Acq_samplestamp_samples = 194265553; // d_gnss_synchro->Acq_samplestamp_samples = 194265553;
// d_gnss_synchro->Flag_valid_word = 0; // d_gnss_synchro->Flag_valid_word = 0;
// d_gnss_synchro->Flag_valid_pseudorange = 0; // d_gnss_synchro->Flag_valid_pseudorange = 0;
// d_gnss_synchro->Flag_valid_symbol_output = 0; // d_gnss_synchro->Flag_valid_symbol_output = 0;
// d_gnss_synchro->Flag_valid_acquisition = 0; // d_gnss_synchro->Flag_valid_acquisition = 0;
// } // }
// debug E5a // debug E5a
// d_gnss_synchro->Acq_delay_samples = 2012; // d_gnss_synchro->Acq_delay_samples = 2012;
// d_gnss_synchro->Acq_doppler_hz = -1125; // d_gnss_synchro->Acq_doppler_hz = -1125;
// d_gnss_synchro->Acq_samplestamp_samples = 363462656; // d_gnss_synchro->Acq_samplestamp_samples = 363462656;
// d_gnss_synchro->Flag_valid_word = 0; // d_gnss_synchro->Flag_valid_word = 0;
// d_gnss_synchro->Flag_valid_pseudorange = 0; // d_gnss_synchro->Flag_valid_pseudorange = 0;
// d_gnss_synchro->Flag_valid_symbol_output = 0; // d_gnss_synchro->Flag_valid_symbol_output = 0;
// d_gnss_synchro->Flag_valid_acquisition = 0; // d_gnss_synchro->Flag_valid_acquisition = 0;
// Declare positive acquisition using a message port // Declare positive acquisition using a message port
@ -199,21 +195,21 @@ void pcps_acquisition_fpga::send_positive_acquisition()
<< ", input signal power " << d_input_power; << ", input signal power " << d_input_power;
// std::cout << "positive acquisition" // std::cout << "positive acquisition"
// << ", satellite " << d_gnss_synchro->System << " " << d_gnss_synchro->PRN // << ", satellite " << d_gnss_synchro->System << " " << d_gnss_synchro->PRN
// << ", sample_stamp " << d_sample_counter // << ", sample_stamp " << d_sample_counter
// << ", test statistics value " << d_test_statistics // << ", test statistics value " << d_test_statistics
// << ", test statistics threshold " << d_threshold // << ", test statistics threshold " << d_threshold
// << ", code phase " << d_gnss_synchro->Acq_delay_samples // << ", code phase " << d_gnss_synchro->Acq_delay_samples
// << ", doppler " << d_gnss_synchro->Acq_doppler_hz // << ", doppler " << d_gnss_synchro->Acq_doppler_hz
// << ", magnitude " << d_mag // << ", magnitude " << d_mag
// << ", input signal power " << d_input_power // << ", input signal power " << d_input_power
// << ", d_gnss_synchro->Acq_samplestamp_samples " << d_gnss_synchro->Acq_samplestamp_samples // << ", d_gnss_synchro->Acq_samplestamp_samples " << d_gnss_synchro->Acq_samplestamp_samples
// << ", d_gnss_synchro->Flag_valid_word " << d_gnss_synchro->Flag_valid_word // << ", d_gnss_synchro->Flag_valid_word " << d_gnss_synchro->Flag_valid_word
// << ", Flag_valid_pseudorange " << d_gnss_synchro->Flag_valid_pseudorange // << ", Flag_valid_pseudorange " << d_gnss_synchro->Flag_valid_pseudorange
// << ", d_gnss_synchro->Flag_valid_symbol_output " << d_gnss_synchro->Flag_valid_symbol_output // << ", d_gnss_synchro->Flag_valid_symbol_output " << d_gnss_synchro->Flag_valid_symbol_output
// << ", d_gnss_synchro->Flag_valid_acquisition " << d_gnss_synchro->Flag_valid_acquisition // << ", d_gnss_synchro->Flag_valid_acquisition " << d_gnss_synchro->Flag_valid_acquisition
// << std::endl; // << std::endl;
//the channel FSM is set, so, notify it directly the positive acquisition to minimize delays //the channel FSM is set, so, notify it directly the positive acquisition to minimize delays
d_channel_fsm.lock()->Event_valid_acquisition(); d_channel_fsm.lock()->Event_valid_acquisition();

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@ -175,12 +175,12 @@ GalileoE1DllPllVemlTrackingFpga::GalileoE1DllPllVemlTrackingFpga(
trk_param_fpga.max_carrier_lock_fail = configuration->property(role + ".max_carrier_lock_fail", trk_param_fpga.max_carrier_lock_fail); trk_param_fpga.max_carrier_lock_fail = configuration->property(role + ".max_carrier_lock_fail", trk_param_fpga.max_carrier_lock_fail);
trk_param_fpga.carrier_lock_th = configuration->property(role + ".carrier_lock_th", trk_param_fpga.carrier_lock_th); trk_param_fpga.carrier_lock_th = configuration->property(role + ".carrier_lock_th", trk_param_fpga.carrier_lock_th);
// int32_t max_lock_fail = configuration->property(role + ".max_lock_fail", 50); // int32_t max_lock_fail = configuration->property(role + ".max_lock_fail", 50);
// if (FLAGS_max_lock_fail != 50) // if (FLAGS_max_lock_fail != 50)
// { // {
// max_lock_fail = FLAGS_max_lock_fail; // max_lock_fail = FLAGS_max_lock_fail;
// } // }
// trk_param_fpga.max_lock_fail = max_lock_fail; // trk_param_fpga.max_lock_fail = max_lock_fail;
// FPGA configuration parameters // FPGA configuration parameters

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@ -168,12 +168,12 @@ GalileoE5aDllPllTrackingFpga::GalileoE5aDllPllTrackingFpga(
trk_param_fpga.max_carrier_lock_fail = configuration->property(role + ".max_carrier_lock_fail", trk_param_fpga.max_carrier_lock_fail); trk_param_fpga.max_carrier_lock_fail = configuration->property(role + ".max_carrier_lock_fail", trk_param_fpga.max_carrier_lock_fail);
trk_param_fpga.carrier_lock_th = configuration->property(role + ".carrier_lock_th", trk_param_fpga.carrier_lock_th); trk_param_fpga.carrier_lock_th = configuration->property(role + ".carrier_lock_th", trk_param_fpga.carrier_lock_th);
// int32_t max_lock_fail = configuration->property(role + ".max_lock_fail", 50); // int32_t max_lock_fail = configuration->property(role + ".max_lock_fail", 50);
// if (FLAGS_max_lock_fail != 50) // if (FLAGS_max_lock_fail != 50)
// { // {
// max_lock_fail = FLAGS_max_lock_fail; // max_lock_fail = FLAGS_max_lock_fail;
// } // }
// trk_param_fpga.max_lock_fail = max_lock_fail; // trk_param_fpga.max_lock_fail = max_lock_fail;
d_data_codes = nullptr; d_data_codes = nullptr;
@ -253,7 +253,7 @@ GalileoE5aDllPllTrackingFpga::GalileoE5aDllPllTrackingFpga(
trk_param_fpga.fpga_integration_period = 1; // (number of symbols that are effectively integrated in the FPGA) trk_param_fpga.fpga_integration_period = 1; // (number of symbols that are effectively integrated in the FPGA)
if (d_track_pilot) if (d_track_pilot)
{ {
if (extend_correlation_symbols >1) if (extend_correlation_symbols > 1)
{ {
if (extend_correlation_symbols <= GALILEO_E5A_I_SECONDARY_CODE_LENGTH) if (extend_correlation_symbols <= GALILEO_E5A_I_SECONDARY_CODE_LENGTH)
{ {
@ -269,7 +269,7 @@ GalileoE5aDllPllTrackingFpga::GalileoE5aDllPllTrackingFpga(
if (extend_correlation_symbols % GALILEO_E5A_I_SECONDARY_CODE_LENGTH == 0) if (extend_correlation_symbols % GALILEO_E5A_I_SECONDARY_CODE_LENGTH == 0)
{ {
trk_param_fpga.extended_correlation_in_fpga = true; trk_param_fpga.extended_correlation_in_fpga = true;
trk_param_fpga.extend_fpga_integration_periods = extend_correlation_symbols/GALILEO_E5A_I_SECONDARY_CODE_LENGTH; trk_param_fpga.extend_fpga_integration_periods = extend_correlation_symbols / GALILEO_E5A_I_SECONDARY_CODE_LENGTH;
trk_param_fpga.fpga_integration_period = GALILEO_E5A_I_SECONDARY_CODE_LENGTH; trk_param_fpga.fpga_integration_period = GALILEO_E5A_I_SECONDARY_CODE_LENGTH;
printf("correlation in fpga true\n"); printf("correlation in fpga true\n");
printf("extend fpga integration periods true\n"); printf("extend fpga integration periods true\n");

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@ -217,7 +217,7 @@ GpsL1CaDllPllTrackingFpga::GpsL1CaDllPllTrackingFpga(
trk_param_fpga.extended_correlation_in_fpga = false; // by default trk_param_fpga.extended_correlation_in_fpga = false; // by default
trk_param_fpga.extend_fpga_integration_periods = 1; // (number of FPGA integrations that are combined in the SW) trk_param_fpga.extend_fpga_integration_periods = 1; // (number of FPGA integrations that are combined in the SW)
trk_param_fpga.fpga_integration_period = 1; // (number of symbols that are effectively integrated in the FPGA) trk_param_fpga.fpga_integration_period = 1; // (number of symbols that are effectively integrated in the FPGA)
if (symbols_extended_correlator >1) if (symbols_extended_correlator > 1)
{ {
if (symbols_extended_correlator <= GPS_CA_BIT_DURATION_MS) if (symbols_extended_correlator <= GPS_CA_BIT_DURATION_MS)
{ {

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@ -106,12 +106,12 @@ GpsL2MDllPllTrackingFpga::GpsL2MDllPllTrackingFpga(
trk_param_fpga.max_carrier_lock_fail = configuration->property(role + ".max_carrier_lock_fail", trk_param_fpga.max_carrier_lock_fail); trk_param_fpga.max_carrier_lock_fail = configuration->property(role + ".max_carrier_lock_fail", trk_param_fpga.max_carrier_lock_fail);
trk_param_fpga.carrier_lock_th = configuration->property(role + ".carrier_lock_th", trk_param_fpga.carrier_lock_th); trk_param_fpga.carrier_lock_th = configuration->property(role + ".carrier_lock_th", trk_param_fpga.carrier_lock_th);
// int32_t max_lock_fail = configuration->property(role + ".max_lock_fail", 50); // int32_t max_lock_fail = configuration->property(role + ".max_lock_fail", 50);
// if (FLAGS_max_lock_fail != 50) // if (FLAGS_max_lock_fail != 50)
// { // {
// max_lock_fail = FLAGS_max_lock_fail; // max_lock_fail = FLAGS_max_lock_fail;
// } // }
// trk_param_fpga.max_lock_fail = max_lock_fail; // trk_param_fpga.max_lock_fail = max_lock_fail;
// FPGA configuration parameters // FPGA configuration parameters
std::string default_device_name = "/dev/uio"; std::string default_device_name = "/dev/uio";

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@ -294,7 +294,7 @@ GpsL5DllPllTrackingFpga::GpsL5DllPllTrackingFpga(
if (extend_correlation_symbols % GPS_L5I_NH_CODE_LENGTH == 0) if (extend_correlation_symbols % GPS_L5I_NH_CODE_LENGTH == 0)
{ {
trk_param_fpga.extended_correlation_in_fpga = true; trk_param_fpga.extended_correlation_in_fpga = true;
trk_param_fpga.extend_fpga_integration_periods = extend_correlation_symbols/GPS_L5I_NH_CODE_LENGTH; trk_param_fpga.extend_fpga_integration_periods = extend_correlation_symbols / GPS_L5I_NH_CODE_LENGTH;
trk_param_fpga.fpga_integration_period = GPS_L5I_NH_CODE_LENGTH; trk_param_fpga.fpga_integration_period = GPS_L5I_NH_CODE_LENGTH;
printf("correlation in fpga true\n"); printf("correlation in fpga true\n");
printf("extend fpga integration periods true\n"); printf("extend fpga integration periods true\n");

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@ -170,7 +170,6 @@ dll_pll_veml_tracking_fpga::dll_pll_veml_tracking_fpga(const Dll_Pll_Conf_Fpga &
if (trk_parameters.extend_correlation_symbols > 1) if (trk_parameters.extend_correlation_symbols > 1)
{ {
d_sc_demodulate_enabled = true; d_sc_demodulate_enabled = true;
} }
} }
if (trk_parameters.track_pilot) if (trk_parameters.track_pilot)
@ -255,7 +254,6 @@ dll_pll_veml_tracking_fpga::dll_pll_veml_tracking_fpga(const Dll_Pll_Conf_Fpga &
d_data_secondary_code_string = const_cast<std::string *>(&GALILEO_E5A_I_SECONDARY_CODE); d_data_secondary_code_string = const_cast<std::string *>(&GALILEO_E5A_I_SECONDARY_CODE);
// the pilot secondary code depends on PRN and it is initialized later // the pilot secondary code depends on PRN and it is initialized later
} }
else else
{ {
@ -463,8 +461,6 @@ dll_pll_veml_tracking_fpga::dll_pll_veml_tracking_fpga(const Dll_Pll_Conf_Fpga &
d_worker_is_done = false; d_worker_is_done = false;
d_stop_tracking = false; d_stop_tracking = false;
} }
void dll_pll_veml_tracking_fpga::msg_handler_telemetry_to_trk(const pmt::pmt_t &msg) void dll_pll_veml_tracking_fpga::msg_handler_telemetry_to_trk(const pmt::pmt_t &msg)
@ -524,12 +520,10 @@ void dll_pll_veml_tracking_fpga::start_tracking()
boost::mutex::scoped_lock lock(d_mutex); boost::mutex::scoped_lock lock(d_mutex);
d_worker_is_done = true; d_worker_is_done = true;
m_condition.notify_one(); m_condition.notify_one();
} }
dll_pll_veml_tracking_fpga::~dll_pll_veml_tracking_fpga() dll_pll_veml_tracking_fpga::~dll_pll_veml_tracking_fpga()
{ {
if (d_dump_file.is_open()) if (d_dump_file.is_open())
{ {
try try
@ -809,10 +803,10 @@ void dll_pll_veml_tracking_fpga::update_tracking_vars()
//T_prn_samples_prev = T_prn_samples; //T_prn_samples_prev = T_prn_samples;
T_prn_samples = T_prn_seconds * trk_parameters.fs_in; T_prn_samples = T_prn_seconds * trk_parameters.fs_in;
//K_blk_samples = T_prn_samples + d_rem_code_phase_samples; // initially d_rem_code_phase_samples is zero. It is updated at the end of this function //K_blk_samples = T_prn_samples + d_rem_code_phase_samples; // initially d_rem_code_phase_samples is zero. It is updated at the end of this function
K_blk_samples = T_prn_samples*d_current_fpga_integration_period + d_rem_code_phase_samples; // initially d_rem_code_phase_samples is zero. It is updated at the end of this function K_blk_samples = T_prn_samples * d_current_fpga_integration_period + d_rem_code_phase_samples; // initially d_rem_code_phase_samples is zero. It is updated at the end of this function
int32_t actual_blk_length = static_cast<int32_t>(std::floor(K_blk_samples)); int32_t actual_blk_length = static_cast<int32_t>(std::floor(K_blk_samples));
d_next_integration_length_samples = 2*actual_blk_length - d_current_integration_length_samples; d_next_integration_length_samples = 2 * actual_blk_length - d_current_integration_length_samples;
//################### PLL COMMANDS ################################################# //################### PLL COMMANDS #################################################
// carrier phase step (NCO phase increment per sample) [rads/sample] // carrier phase step (NCO phase increment per sample) [rads/sample]
@ -1360,7 +1354,6 @@ void dll_pll_veml_tracking_fpga::set_channel(uint32_t channel)
multicorrelator_fpga->set_secondary_code_lengths(d_secondary_code_length, d_data_secondary_code_length); multicorrelator_fpga->set_secondary_code_lengths(d_secondary_code_length, d_data_secondary_code_length);
multicorrelator_fpga->initialize_secondary_code(1, d_data_secondary_code_string); multicorrelator_fpga->initialize_secondary_code(1, d_data_secondary_code_string);
} }
} }
} }
} }
@ -1390,7 +1383,6 @@ void dll_pll_veml_tracking_fpga::set_gnss_synchro(Gnss_Synchro *p_gnss_synchro)
{ {
d_Prompt_Data[0] = gr_complex(0.0, 0.0); d_Prompt_Data[0] = gr_complex(0.0, 0.0);
} }
} }
else if (systemName == "Galileo" and signal_type == "1B") else if (systemName == "Galileo" and signal_type == "1B")
{ {
@ -1403,8 +1395,6 @@ void dll_pll_veml_tracking_fpga::set_gnss_synchro(Gnss_Synchro *p_gnss_synchro)
{ {
if (trk_parameters.track_pilot) if (trk_parameters.track_pilot)
{ {
d_secondary_code_string = const_cast<std::string *>(&GALILEO_E5A_Q_SECONDARY_CODE[d_acquisition_gnss_synchro->PRN - 1]); d_secondary_code_string = const_cast<std::string *>(&GALILEO_E5A_Q_SECONDARY_CODE[d_acquisition_gnss_synchro->PRN - 1]);
d_Prompt_Data[0] = gr_complex(0.0, 0.0); d_Prompt_Data[0] = gr_complex(0.0, 0.0);
@ -1472,9 +1462,6 @@ void dll_pll_veml_tracking_fpga::set_gnss_synchro(Gnss_Synchro *p_gnss_synchro)
d_current_fpga_integration_period = 1; d_current_fpga_integration_period = 1;
d_current_extended_correlation_in_fpga = false; d_current_extended_correlation_in_fpga = false;
} }
} }
@ -1499,9 +1486,8 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
Gnss_Synchro current_synchro_data = Gnss_Synchro(); Gnss_Synchro current_synchro_data = Gnss_Synchro();
current_synchro_data.Flag_valid_symbol_output = false; current_synchro_data.Flag_valid_symbol_output = false;
while((!current_synchro_data.Flag_valid_symbol_output) && (!d_stop_tracking)) while ((!current_synchro_data.Flag_valid_symbol_output) && (!d_stop_tracking))
{ {
d_current_integration_length_samples = d_next_integration_length_samples; d_current_integration_length_samples = d_next_integration_length_samples;
if (d_pull_in_transitory == true) if (d_pull_in_transitory == true)
@ -1520,7 +1506,6 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
{ {
case 1: // Pull-in case 1: // Pull-in
{ {
d_worker_is_done = false; d_worker_is_done = false;
@ -1669,7 +1654,6 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
} }
else if (d_symbols_per_bit > 1) //Signal does not have secondary code. Search a bit transition by sign change else if (d_symbols_per_bit > 1) //Signal does not have secondary code. Search a bit transition by sign change
{ {
//******* preamble correlation ******** //******* preamble correlation ********
d_Prompt_circular_buffer.push_back(*d_Prompt); d_Prompt_circular_buffer.push_back(*d_Prompt);
if (d_Prompt_circular_buffer.size() == d_secondary_code_length) if (d_Prompt_circular_buffer.size() == d_secondary_code_length)
@ -1683,7 +1667,6 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
<< " for satellite " << Gnss_Satellite(systemName, d_acquisition_gnss_synchro->PRN) << std::endl; << " for satellite " << Gnss_Satellite(systemName, d_acquisition_gnss_synchro->PRN) << std::endl;
} }
} }
} }
else else
{ {
@ -1715,12 +1698,11 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
if (d_extended_correlation_in_fpga) if (d_extended_correlation_in_fpga)
{ {
d_current_fpga_integration_period = d_fpga_integration_period; d_current_fpga_integration_period = d_fpga_integration_period;
d_current_extended_correlation_in_fpga = true; d_current_extended_correlation_in_fpga = true;
d_P_accu_old.real(d_P_accu_old.real()*d_fpga_integration_period); d_P_accu_old.real(d_P_accu_old.real() * d_fpga_integration_period);
d_P_accu_old.imag(d_P_accu_old.imag()*d_fpga_integration_period); d_P_accu_old.imag(d_P_accu_old.imag() * d_fpga_integration_period);
if (d_sc_demodulate_enabled) if (d_sc_demodulate_enabled)
{ {
@ -1730,7 +1712,7 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
if (d_extend_fpga_integration_periods > 1) if (d_extend_fpga_integration_periods > 1)
{ {
// correction on already computed parameters // correction on already computed parameters
K_blk_samples = T_prn_samples*(d_fpga_integration_period) + d_rem_code_phase_samples_prev; K_blk_samples = T_prn_samples * (d_fpga_integration_period) + d_rem_code_phase_samples_prev;
d_next_integration_length_samples = static_cast<int32_t>(std::floor(K_blk_samples)); d_next_integration_length_samples = static_cast<int32_t>(std::floor(K_blk_samples));
d_state = 5; d_state = 5;
@ -1738,7 +1720,7 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
else else
{ {
// correction on already computed parameters // correction on already computed parameters
K_blk_samples = T_prn_samples*trk_parameters.extend_correlation_symbols + d_rem_code_phase_samples_prev; K_blk_samples = T_prn_samples * trk_parameters.extend_correlation_symbols + d_rem_code_phase_samples_prev;
d_next_integration_length_samples = static_cast<int32_t>(std::floor(K_blk_samples)); d_next_integration_length_samples = static_cast<int32_t>(std::floor(K_blk_samples));
d_state = 6; d_state = 6;
@ -1833,7 +1815,6 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
// send something to let the scheduler know that it has to keep on calling general work and to finish the loop // send something to let the scheduler know that it has to keep on calling general work and to finish the loop
//current_synchro_data.Flag_valid_symbol_output=1; //current_synchro_data.Flag_valid_symbol_output=1;
} }
else else
{ {
@ -1880,8 +1861,7 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
// this must be computed for the secondary prn code // this must be computed for the secondary prn code
if (d_secondary) if (d_secondary)
{ {
uint32_t first_length_secondary_code = d_current_integration_length_samples - (d_fpga_integration_period - 1) * static_cast<int32_t>(std::floor(T_prn_samples));
uint32_t first_length_secondary_code = d_current_integration_length_samples - (d_fpga_integration_period - 1)*static_cast<int32_t>(std::floor(T_prn_samples));
uint32_t next_length_secondary_code = static_cast<int32_t>(std::floor(T_prn_samples)); uint32_t next_length_secondary_code = static_cast<int32_t>(std::floor(T_prn_samples));
multicorrelator_fpga->update_secondary_code_length(first_length_secondary_code, next_length_secondary_code); multicorrelator_fpga->update_secondary_code_length(first_length_secondary_code, next_length_secondary_code);
@ -1928,7 +1908,7 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
// this must be computed for the secondary prn code // this must be computed for the secondary prn code
if (d_secondary) if (d_secondary)
{ {
uint32_t first_length_secondary_code = d_current_integration_length_samples - (d_fpga_integration_period - 1)*static_cast<int32_t>(std::floor(T_prn_samples)); uint32_t first_length_secondary_code = d_current_integration_length_samples - (d_fpga_integration_period - 1) * static_cast<int32_t>(std::floor(T_prn_samples));
uint32_t next_length_secondary_code = static_cast<int32_t>(std::floor(T_prn_samples)); uint32_t next_length_secondary_code = static_cast<int32_t>(std::floor(T_prn_samples));
multicorrelator_fpga->update_secondary_code_length(first_length_secondary_code, next_length_secondary_code); multicorrelator_fpga->update_secondary_code_length(first_length_secondary_code, next_length_secondary_code);
@ -1945,7 +1925,6 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
// send something to let the scheduler know that it has to keep on calling general work and to finish the loop // send something to let the scheduler know that it has to keep on calling general work and to finish the loop
//current_synchro_data.Flag_valid_symbol_output=1; //current_synchro_data.Flag_valid_symbol_output=1;
} }
else else
{ {
@ -1983,8 +1962,6 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
{ {
d_state = 5; d_state = 5;
} }
} }
break; break;
} }
@ -1999,6 +1976,4 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
return 1; return 1;
} }
return 0; return 0;
} }

View File

@ -221,7 +221,6 @@ private:
boost::mutex d_mutex; boost::mutex d_mutex;
bool d_stop_tracking; bool d_stop_tracking;
}; };
#endif //GNSS_SDR_DLL_PLL_VEML_TRACKING_FPGA_H #endif //GNSS_SDR_DLL_PLL_VEML_TRACKING_FPGA_H

View File

@ -217,8 +217,8 @@ void Fpga_Multicorrelator_8sc::Carrier_wipeoff_multicorrelator_resampler(
//d_map_base[DROP_SAMPLES_REG_ADDR] = ENABLE_SECONDARY_CODE | INIT_SECONDARY_CODE_ADDRESSES; //d_map_base[DROP_SAMPLES_REG_ADDR] = ENABLE_SECONDARY_CODE | INIT_SECONDARY_CODE_ADDRESSES;
d_map_base[DROP_SAMPLES_REG_ADDR] = ENABLE_SECONDARY_CODE; // keep secondary code enabled d_map_base[DROP_SAMPLES_REG_ADDR] = ENABLE_SECONDARY_CODE; // keep secondary code enabled
// //printf("do not enable secondary code on purpose\n"); // //printf("do not enable secondary code on purpose\n");
// d_map_base[DROP_SAMPLES_REG_ADDR] = 0; // block samples // d_map_base[DROP_SAMPLES_REG_ADDR] = 0; // block samples
} }
else else
{ {
@ -503,11 +503,6 @@ void Fpga_Multicorrelator_8sc::lock_channel(void)
void Fpga_Multicorrelator_8sc::set_secondary_code_lengths(uint32_t secondary_code_0_length, uint32_t secondary_code_1_length) void Fpga_Multicorrelator_8sc::set_secondary_code_lengths(uint32_t secondary_code_0_length, uint32_t secondary_code_1_length)
{ {
d_secondary_code_0_length = secondary_code_0_length; d_secondary_code_0_length = secondary_code_0_length;
d_secondary_code_1_length = secondary_code_1_length; d_secondary_code_1_length = secondary_code_1_length;
@ -518,7 +513,7 @@ void Fpga_Multicorrelator_8sc::set_secondary_code_lengths(uint32_t secondary_cod
uint32_t secondary_code_length_0_minus_1 = d_secondary_code_0_length - 1; uint32_t secondary_code_length_0_minus_1 = d_secondary_code_0_length - 1;
uint32_t secondary_code_length_1_minus_1 = d_secondary_code_1_length - 1; uint32_t secondary_code_length_1_minus_1 = d_secondary_code_1_length - 1;
d_map_base[SECONDARY_CODE_LENGTHS_REG_ADDR] = secondary_code_length_1_minus_1*256 + secondary_code_length_0_minus_1; d_map_base[SECONDARY_CODE_LENGTHS_REG_ADDR] = secondary_code_length_1_minus_1 * 256 + secondary_code_length_0_minus_1;
//std::cout << "setting secondary code lengths : \n"; //std::cout << "setting secondary code lengths : \n";
//std::cout << "initialized correlator 1 sec code length = " << d_secondary_code_1_length << " correlator 0 sec code length = " << d_secondary_code_0_length << std::endl; //std::cout << "initialized correlator 1 sec code length = " << d_secondary_code_1_length << " correlator 0 sec code length = " << d_secondary_code_0_length << std::endl;
@ -529,10 +524,6 @@ void Fpga_Multicorrelator_8sc::update_secondary_code_length(uint32_t first_lengt
d_map_base[FIRST_PRN_LENGTH_MINUS_1_REG_ADDR] = first_length_secondary_code - 1; d_map_base[FIRST_PRN_LENGTH_MINUS_1_REG_ADDR] = first_length_secondary_code - 1;
d_map_base[NEXT_PRN_LENGTH_MINUS_1_REG_ADDR] = next_length_secondary_code - 1; d_map_base[NEXT_PRN_LENGTH_MINUS_1_REG_ADDR] = next_length_secondary_code - 1;
//std::cout << " first_length_secondary_code = " << first_length_secondary_code << " next_length_secondary_code = " << next_length_secondary_code << " sum = " << first_length_secondary_code + next_length_secondary_code << std::endl; //std::cout << " first_length_secondary_code = " << first_length_secondary_code << " next_length_secondary_code = " << next_length_secondary_code << " sum = " << first_length_secondary_code + next_length_secondary_code << std::endl;
} }
void Fpga_Multicorrelator_8sc::initialize_secondary_code(uint32_t secondary_code, std::string *secondary_code_string) void Fpga_Multicorrelator_8sc::initialize_secondary_code(uint32_t secondary_code, std::string *secondary_code_string)
@ -543,7 +534,6 @@ void Fpga_Multicorrelator_8sc::initialize_secondary_code(uint32_t secondary_code
{ {
secondary_code_length = d_secondary_code_0_length; secondary_code_length = d_secondary_code_0_length;
reg_addr = PROG_SECONDARY_CODE_0_DATA_REG_ADDR; reg_addr = PROG_SECONDARY_CODE_0_DATA_REG_ADDR;
} }
else else
{ {
@ -551,7 +541,6 @@ void Fpga_Multicorrelator_8sc::initialize_secondary_code(uint32_t secondary_code
reg_addr = PROG_SECONDARY_CODE_1_DATA_REG_ADDR; reg_addr = PROG_SECONDARY_CODE_1_DATA_REG_ADDR;
} }
Fpga_Multicorrelator_8sc::write_secondary_code(secondary_code_length, secondary_code_string, reg_addr); Fpga_Multicorrelator_8sc::write_secondary_code(secondary_code_length, secondary_code_string, reg_addr);
} }
@ -587,7 +576,7 @@ void Fpga_Multicorrelator_8sc::initialize_secondary_code(uint32_t secondary_code
void Fpga_Multicorrelator_8sc::write_secondary_code(uint32_t secondary_code_length, std::string *secondary_code_string, uint32_t reg_addr) void Fpga_Multicorrelator_8sc::write_secondary_code(uint32_t secondary_code_length, std::string *secondary_code_string, uint32_t reg_addr)
{ {
uint32_t num_words = ceil(((float) secondary_code_length)/SECONDARY_CODE_WORD_SIZE); uint32_t num_words = ceil(((float)secondary_code_length) / SECONDARY_CODE_WORD_SIZE);
uint32_t last_word_size = secondary_code_length % SECONDARY_CODE_WORD_SIZE; uint32_t last_word_size = secondary_code_length % SECONDARY_CODE_WORD_SIZE;
//uint32_t initial_pointer; //uint32_t initial_pointer;
@ -611,26 +600,26 @@ void Fpga_Multicorrelator_8sc::write_secondary_code(uint32_t secondary_code_leng
uint32_t mem_addr; uint32_t mem_addr;
if (num_words > 1) if (num_words > 1)
{ {
for (mem_addr = 0; mem_addr < num_words - 1 ;mem_addr++) for (mem_addr = 0; mem_addr < num_words - 1; mem_addr++)
{ {
//std::cout << "------------------------------------------------------ going to write word " << mem_addr << std::endl; //std::cout << "------------------------------------------------------ going to write word " << mem_addr << std::endl;
write_val = 0U; write_val = 0U;
pow_k = 1; pow_k = 1;
for (unsigned int k=0;k<SECONDARY_CODE_WORD_SIZE;k++) for (unsigned int k = 0; k < SECONDARY_CODE_WORD_SIZE; k++)
{ {
// debug // debug
//std::cout << "reading bit position = " << mem_addr*SECONDARY_CODE_WORD_SIZE + k << std::endl; //std::cout << "reading bit position = " << mem_addr*SECONDARY_CODE_WORD_SIZE + k << std::endl;
//std::cout << "bit shift = " << pow_k << std::endl; //std::cout << "bit shift = " << pow_k << std::endl;
std::string string_tmp(1, secondary_code_string->at(mem_addr*SECONDARY_CODE_WORD_SIZE + k)); std::string string_tmp(1, secondary_code_string->at(mem_addr * SECONDARY_CODE_WORD_SIZE + k));
write_val = write_val | std::stoi(string_tmp)*pow_k; write_val = write_val | std::stoi(string_tmp) * pow_k;
// debug // debug
//std::cout << "computing bit k = " << k << " bit k value = "<< std::stoi(string_tmp) << std::endl; //std::cout << "computing bit k = " << k << " bit k value = "<< std::stoi(string_tmp) << std::endl;
//std::cout << "computing bit k displaced = " << std::stoi(string_tmp)*pow_k << std::endl; //std::cout << "computing bit k displaced = " << std::stoi(string_tmp)*pow_k << std::endl;
//std::cout << "write val = " << write_val << std::endl; //std::cout << "write val = " << write_val << std::endl;
pow_k = pow_k*2; pow_k = pow_k * 2;
} }
//std::cout << "writing secondary code reg addr " << reg_addr << "secondary code value " << write_val << std::endl; //std::cout << "writing secondary code reg addr " << reg_addr << "secondary code value " << write_val << std::endl;
@ -639,23 +628,23 @@ void Fpga_Multicorrelator_8sc::write_secondary_code(uint32_t secondary_code_leng
// debug // debug
//write_val = 0; //write_val = 0;
write_val = write_val | mem_addr*SECONDARY_CODE_ADDR_BITS | SECONDARY_CODE_WR_STROBE; write_val = write_val | mem_addr * SECONDARY_CODE_ADDR_BITS | SECONDARY_CODE_WR_STROBE;
d_map_base[reg_addr] = write_val; d_map_base[reg_addr] = write_val;
//std::cout << "writing fpga register value " << write_val << std::endl; //std::cout << "writing fpga register value " << write_val << std::endl;
// debug // debug
// std::cout << "wrote word " << mem_addr << "value is "; // std::cout << "wrote word " << mem_addr << "value is ";
// while (write_val) { // while (write_val) {
// if (write_val & 1) // if (write_val & 1)
// printf("1"); // printf("1");
// else // else
// printf("0"); // printf("0");
// //
// write_val >>= 1; // write_val >>= 1;
// } // }
// printf("\n"); // printf("\n");
} }
} }
write_val = 0U; write_val = 0U;
@ -664,22 +653,21 @@ void Fpga_Multicorrelator_8sc::write_secondary_code(uint32_t secondary_code_leng
//std::cout << "------------------------------------------------------ going to write word " << mem_addr << std::endl; //std::cout << "------------------------------------------------------ going to write word " << mem_addr << std::endl;
for (unsigned int k=0;k<last_word_size;k++) for (unsigned int k = 0; k < last_word_size; k++)
{ {
// debug // debug
//std::cout << "reading bit position = " << mem_addr*SECONDARY_CODE_WORD_SIZE + k << std::endl; //std::cout << "reading bit position = " << mem_addr*SECONDARY_CODE_WORD_SIZE + k << std::endl;
//std::cout << "bit shift = " << pow_k << std::endl; //std::cout << "bit shift = " << pow_k << std::endl;
std::string string_tmp(1, secondary_code_string->at(mem_addr*SECONDARY_CODE_WORD_SIZE + k)); std::string string_tmp(1, secondary_code_string->at(mem_addr * SECONDARY_CODE_WORD_SIZE + k));
write_val = write_val | std::stoi(string_tmp)*pow_k; write_val = write_val | std::stoi(string_tmp) * pow_k;
// debug // debug
//std::cout << "computing bit k = " << k << " bit k value = "<< std::stoi(string_tmp) << std::endl; //std::cout << "computing bit k = " << k << " bit k value = "<< std::stoi(string_tmp) << std::endl;
//std::cout << "computing bit k displaced = " << std::stoi(string_tmp)*pow_k << std::endl; //std::cout << "computing bit k displaced = " << std::stoi(string_tmp)*pow_k << std::endl;
//std::cout << "write val = " << write_val << std::endl; //std::cout << "write val = " << write_val << std::endl;
pow_k = pow_k*2; pow_k = pow_k * 2;
} }
// debug // debug
@ -687,39 +675,39 @@ void Fpga_Multicorrelator_8sc::write_secondary_code(uint32_t secondary_code_leng
//std::cout << "writing secondary code reg addr " << reg_addr << "secondary code value " << write_val << std::endl; //std::cout << "writing secondary code reg addr " << reg_addr << "secondary code value " << write_val << std::endl;
write_val = write_val | (mem_addr*SECONDARY_CODE_ADDR_BITS) | (SECONDARY_CODE_WR_STROBE); write_val = write_val | (mem_addr * SECONDARY_CODE_ADDR_BITS) | (SECONDARY_CODE_WR_STROBE);
d_map_base[reg_addr] = write_val; d_map_base[reg_addr] = write_val;
//std::cout << "writing fpga register value " << write_val << std::endl; //std::cout << "writing fpga register value " << write_val << std::endl;
// // debug // // debug
// write_val = write_val | 705200; // write_val = write_val | 705200;
// d_map_base[reg_addr] = write_val; // d_map_base[reg_addr] = write_val;
// printf("warning : extending the code length to 20\n"); // printf("warning : extending the code length to 20\n");
// std::cout << "writing fpga register value " << write_val << std::endl; // std::cout << "writing fpga register value " << write_val << std::endl;
// // debug // // debug
// //write_val = (SECONDARY_CODE_WR_STROBE) | 0x00055400; // //write_val = (SECONDARY_CODE_WR_STROBE) | 0x00055400;
// write_val = (SECONDARY_CODE_WR_STROBE) | 0x00000155; // write_val = (SECONDARY_CODE_WR_STROBE) | 0x00000155;
// d_map_base[reg_addr] = write_val; // d_map_base[reg_addr] = write_val;
// for (unsigned int k=1;k<5;k++) // for (unsigned int k=1;k<5;k++)
// { // {
// write_val = (k*SECONDARY_CODE_ADDR_BITS) | (SECONDARY_CODE_WR_STROBE) | 0x00055555; // write_val = (k*SECONDARY_CODE_ADDR_BITS) | (SECONDARY_CODE_WR_STROBE) | 0x00055555;
// d_map_base[reg_addr] = write_val; // d_map_base[reg_addr] = write_val;
// } // }
// // debug // // debug
// std::cout << "wrote word " << mem_addr << " value is " << write_val << " = "; // std::cout << "wrote word " << mem_addr << " value is " << write_val << " = ";
// while (write_val) { // while (write_val) {
// if (write_val & 1) // if (write_val & 1)
// printf("1"); // printf("1");
// else // else
// printf("0"); // printf("0");
// //
// write_val >>= 1; // write_val >>= 1;
// } // }
// printf("\n"); // printf("\n");
//printf("\n=============================================================================* END OF THIS\n"); //printf("\n=============================================================================* END OF THIS\n");
} }
@ -734,9 +722,9 @@ void Fpga_Multicorrelator_8sc::enable_secondary_codes()
d_secondary_code_enabled = true; d_secondary_code_enabled = true;
//std::cout << "enabling secondary codes d_map_base[DROP_SAMPLES_REG_ADDR] = " << (INIT_SECONDARY_CODE_ADDRESSES | ENABLE_SECONDARY_CODE) << std::endl; //std::cout << "enabling secondary codes d_map_base[DROP_SAMPLES_REG_ADDR] = " << (INIT_SECONDARY_CODE_ADDRESSES | ENABLE_SECONDARY_CODE) << std::endl;
// // debug // // debug
// printf("do not enable secondary code on purpose\n"); // printf("do not enable secondary code on purpose\n");
// d_map_base[DROP_SAMPLES_REG_ADDR] = 0; // d_map_base[DROP_SAMPLES_REG_ADDR] = 0;
} }
void Fpga_Multicorrelator_8sc::disable_secondary_codes() void Fpga_Multicorrelator_8sc::disable_secondary_codes()
@ -745,4 +733,3 @@ void Fpga_Multicorrelator_8sc::disable_secondary_codes()
//printf("xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx disabling secondary codes in fpga\n"); //printf("xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx disabling secondary codes in fpga\n");
d_map_base[DROP_SAMPLES_REG_ADDR] = DROP_SAMPLES; d_map_base[DROP_SAMPLES_REG_ADDR] = DROP_SAMPLES;
} }

View File

@ -105,15 +105,15 @@ public:
uint64_t read_sample_counter(); uint64_t read_sample_counter();
void lock_channel(void); void lock_channel(void);
void unlock_channel(void); void unlock_channel(void);
// void initialize_secondary_codes(bool track_pilot, // void initialize_secondary_codes(bool track_pilot,
// uint32_t secondary_code_length_data, std::string *secondary_code_string_data, // uint32_t secondary_code_length_data, std::string *secondary_code_string_data,
// uint32_t secondary_code_length_pilot, std::string *secondary_code_string_pilot); // uint32_t secondary_code_length_pilot, std::string *secondary_code_string_pilot);
void set_secondary_code_lengths(uint32_t secondary_code_0_length, uint32_t secondary_code_1_length); void set_secondary_code_lengths(uint32_t secondary_code_0_length, uint32_t secondary_code_1_length);
void initialize_secondary_code(uint32_t secondary_code, std::string *secondary_code_string); void initialize_secondary_code(uint32_t secondary_code, std::string *secondary_code_string);
void update_secondary_code_length(uint32_t first_length_secondary_code, uint32_t next_length_secondary_code); void update_secondary_code_length(uint32_t first_length_secondary_code, uint32_t next_length_secondary_code);
void enable_secondary_codes(); void enable_secondary_codes();
void disable_secondary_codes(); void disable_secondary_codes();
// void init_secondary_code_indices(); // void init_secondary_code_indices();
private: private: