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moved the setting of the flags for the writing of the local code to the initialization, to save cpu cycles during tracking.

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This commit is contained in:
Marc Majoral 2019-04-02 20:36:48 +02:00
parent a6110eb334
commit 553946fb65
5 changed files with 39 additions and 10 deletions
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7
src/algorithms/tracking/adapters/galileo_e1_dll_pll_veml_tracking_fpga.cc
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@ -48,6 +48,10 @@
#include <cstring> // for memcpy #include <cstring> // for memcpy
#include <iostream> // for operator<<, #include <iostream> // for operator<<,
// the following flag is FPGA-specific and they are using during the local code initialisation in the SW to save CPU cycles during tracking
#define LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY 0x0C000000 // flag that enables WE (Write Enable) of the local code FPGA
#define LOCAL_CODE_FPGA_CORRELATOR_SELECT_COUNT 0x20000000 // flag that selects the writing of the pilot code in the FPGA (as opposed to the data code)
GalileoE1DllPllVemlTrackingFpga::GalileoE1DllPllVemlTrackingFpga( GalileoE1DllPllVemlTrackingFpga::GalileoE1DllPllVemlTrackingFpga(
ConfigurationInterface* configuration, const std::string& role, ConfigurationInterface* configuration, const std::string& role,
@ -236,12 +240,14 @@ GalileoE1DllPllVemlTrackingFpga::GalileoE1DllPllVemlTrackingFpga(
{ {
tmp_value = 0; tmp_value = 0;
} }
tmp_value = tmp_value | LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY;
d_ca_codes[static_cast<int32_t>(GALILEO_E1_B_CODE_LENGTH_CHIPS) * 2 * (PRN - 1) + s] = tmp_value; d_ca_codes[static_cast<int32_t>(GALILEO_E1_B_CODE_LENGTH_CHIPS) * 2 * (PRN - 1) + s] = tmp_value;
tmp_value = static_cast<int32_t>(data_codes_f[s]); tmp_value = static_cast<int32_t>(data_codes_f[s]);
if (tmp_value < 0) if (tmp_value < 0)
{ {
tmp_value = 0; tmp_value = 0;
} }
tmp_value = tmp_value | LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY | LOCAL_CODE_FPGA_CORRELATOR_SELECT_COUNT;
d_data_codes[static_cast<int32_t>(GALILEO_E1_B_CODE_LENGTH_CHIPS) * 2 * (PRN - 1) + s] = tmp_value; d_data_codes[static_cast<int32_t>(GALILEO_E1_B_CODE_LENGTH_CHIPS) * 2 * (PRN - 1) + s] = tmp_value;
} }
} }
@ -257,6 +263,7 @@ GalileoE1DllPllVemlTrackingFpga::GalileoE1DllPllVemlTrackingFpga(
{ {
tmp_value = 0; tmp_value = 0;
} }
tmp_value = tmp_value | LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY;
d_ca_codes[static_cast<int32_t>(GALILEO_E1_B_CODE_LENGTH_CHIPS) * 2 * (PRN - 1) + s] = tmp_value; d_ca_codes[static_cast<int32_t>(GALILEO_E1_B_CODE_LENGTH_CHIPS) * 2 * (PRN - 1) + s] = tmp_value;
} }
} }

7
src/algorithms/tracking/adapters/galileo_e5a_dll_pll_tracking_fpga.cc
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@ -45,6 +45,10 @@
#include <cstring> // for memcpy #include <cstring> // for memcpy
#include <iostream> #include <iostream>
// the following flag is FPGA-specific and they are using during the local code initialisation in the SW to save CPU cycles during tracking
#define LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY 0x0C000000 // flag that enables WE (Write Enable) of the local code FPGA
#define LOCAL_CODE_FPGA_CORRELATOR_SELECT_COUNT 0x20000000 // flag that selects the writing of the pilot code in the FPGA (as opposed to the data code)
GalileoE5aDllPllTrackingFpga::GalileoE5aDllPllTrackingFpga( GalileoE5aDllPllTrackingFpga::GalileoE5aDllPllTrackingFpga(
ConfigurationInterface *configuration, const std::string &role, ConfigurationInterface *configuration, const std::string &role,
@ -223,6 +227,7 @@ GalileoE5aDllPllTrackingFpga::GalileoE5aDllPllTrackingFpga(
{ {
tmp_value = 0; tmp_value = 0;
} }
tmp_value = tmp_value | LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY;
d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = tmp_value; d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = tmp_value;
tmp_value = static_cast<int32_t>(aux_code[s].real()); tmp_value = static_cast<int32_t>(aux_code[s].real());
@ -230,6 +235,7 @@ GalileoE5aDllPllTrackingFpga::GalileoE5aDllPllTrackingFpga(
{ {
tmp_value = 0; tmp_value = 0;
} }
tmp_value = tmp_value | LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY | LOCAL_CODE_FPGA_CORRELATOR_SELECT_COUNT;
d_data_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = tmp_value; d_data_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = tmp_value;
//d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = static_cast<int32_t>(aux_code[s].imag()); //d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = static_cast<int32_t>(aux_code[s].imag());
//d_data_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = static_cast<int32_t>(aux_code[s].real()); //d_data_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = static_cast<int32_t>(aux_code[s].real());
@ -245,6 +251,7 @@ GalileoE5aDllPllTrackingFpga::GalileoE5aDllPllTrackingFpga(
{ {
tmp_value = 0; tmp_value = 0;
} }
tmp_value = tmp_value | LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY;
d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = tmp_value; d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = tmp_value;
//d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = static_cast<int32_t>(aux_code[s].real()); //d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = static_cast<int32_t>(aux_code[s].real());
} }

11
src/algorithms/tracking/adapters/gps_l1_ca_dll_pll_tracking_fpga.cc
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@ -48,8 +48,10 @@
#include <cstring> // for memcpy #include <cstring> // for memcpy
#include <iostream> #include <iostream>
#define NUM_PRNs 32 #define NUM_PRNs 32 // total number of PRNs
// the following flag is FPGA-specific and they are using during the local code initialisation in the SW to save CPU cycles during tracking
#define LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY 0x0C000000 // flag that enables WE (Write Enable) of the local code FPGA
GpsL1CaDllPllTrackingFpga::GpsL1CaDllPllTrackingFpga( GpsL1CaDllPllTrackingFpga::GpsL1CaDllPllTrackingFpga(
ConfigurationInterface* configuration, const std::string& role, ConfigurationInterface* configuration, const std::string& role,
@ -214,10 +216,13 @@ GpsL1CaDllPllTrackingFpga::GpsL1CaDllPllTrackingFpga(
// The code is generated as a series of 1s and -1s. In order to store the values using only one bit, a -1 is stored as a 0 in the FPGA // The code is generated as a series of 1s and -1s. In order to store the values using only one bit, a -1 is stored as a 0 in the FPGA
for (uint32_t k = 0; k < GPS_L1_CA_CODE_LENGTH_CHIPS; k++) for (uint32_t k = 0; k < GPS_L1_CA_CODE_LENGTH_CHIPS; k++)
{ {
if (d_ca_codes[(int32_t(GPS_L1_CA_CODE_LENGTH_CHIPS)) * (PRN - 1) + k] < 0) int32_t tmp_value = d_ca_codes[(int32_t(GPS_L1_CA_CODE_LENGTH_CHIPS)) * (PRN - 1) + k];
if (tmp_value < 0)
{ {
d_ca_codes[(int32_t(GPS_L1_CA_CODE_LENGTH_CHIPS)) * (PRN - 1) + k] = 0; tmp_value = 0;
} }
tmp_value = tmp_value | LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY;
d_ca_codes[(int32_t(GPS_L1_CA_CODE_LENGTH_CHIPS)) * (PRN - 1) + k] = tmp_value;
} }
} }
trk_param_fpga.ca_codes = d_ca_codes; trk_param_fpga.ca_codes = d_ca_codes;

9
src/algorithms/tracking/adapters/gps_l5_dll_pll_tracking_fpga.cc
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@ -50,7 +50,11 @@
#include <cstring> // for memcpy #include <cstring> // for memcpy
#include <iostream> #include <iostream>
#define NUM_PRNs 32 #define NUM_PRNs 32 // number of PRNS
// the following flag is FPGA-specific and they are using during the local code initialisation in the SW to save CPU cycles during tracking
#define LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY 0x0C000000 // flag that enables WE (Write Enable) of the local code FPGA
#define LOCAL_CODE_FPGA_CORRELATOR_SELECT_COUNT 0x20000000 // flag that selects the writing of the pilot code in the FPGA (as opposed to the data code)
GpsL5DllPllTrackingFpga::GpsL5DllPllTrackingFpga( GpsL5DllPllTrackingFpga::GpsL5DllPllTrackingFpga(
@ -241,6 +245,7 @@ GpsL5DllPllTrackingFpga::GpsL5DllPllTrackingFpga(
{ {
tmp_value = 0; tmp_value = 0;
} }
tmp_value = tmp_value | LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY;
d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = tmp_value; d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = tmp_value;
tmp_value = static_cast<int32_t>(data_code[s]); tmp_value = static_cast<int32_t>(data_code[s]);
@ -248,6 +253,7 @@ GpsL5DllPllTrackingFpga::GpsL5DllPllTrackingFpga(
{ {
tmp_value = 0; tmp_value = 0;
} }
tmp_value = tmp_value | LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY | LOCAL_CODE_FPGA_CORRELATOR_SELECT_COUNT;
d_data_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = tmp_value; d_data_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = tmp_value;
//d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = static_cast<int32_t>(tracking_code[s]); //d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = static_cast<int32_t>(tracking_code[s]);
@ -266,6 +272,7 @@ GpsL5DllPllTrackingFpga::GpsL5DllPllTrackingFpga(
{ {
tmp_value = 0; tmp_value = 0;
} }
tmp_value = tmp_value | LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY;
d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = tmp_value; d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = tmp_value;
//d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = static_cast<int32_t>(tracking_code[s]); //d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = static_cast<int32_t>(tracking_code[s]);
} }

15
src/algorithms/tracking/libs/fpga_multicorrelator.cc
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@ -300,8 +300,8 @@ uint32_t Fpga_Multicorrelator_8sc::fpga_acquisition_test_register(
void Fpga_Multicorrelator_8sc::fpga_configure_tracking_gps_local_code(int32_t PRN) void Fpga_Multicorrelator_8sc::fpga_configure_tracking_gps_local_code(int32_t PRN)
{ {
uint32_t k; uint32_t k;
uint32_t code_chip; //uint32_t code_chip;
uint32_t select_pilot_corelator = LOCAL_CODE_FPGA_CORRELATOR_SELECT_COUNT; //uint32_t select_pilot_corelator = LOCAL_CODE_FPGA_CORRELATOR_SELECT_COUNT;
d_map_base[PROG_MEMS_ADDR] = LOCAL_CODE_FPGA_CLEAR_ADDRESS_COUNTER; d_map_base[PROG_MEMS_ADDR] = LOCAL_CODE_FPGA_CLEAR_ADDRESS_COUNTER;
for (k = 0; k < d_code_length_samples; k++) for (k = 0; k < d_code_length_samples; k++)
@ -314,9 +314,11 @@ void Fpga_Multicorrelator_8sc::fpga_configure_tracking_gps_local_code(int32_t PR
// { // {
// code_chip = 0; // code_chip = 0;
// } // }
code_chip = d_ca_codes[(d_code_length_samples * (PRN - 1)) + k]; //code_chip = d_ca_codes[(d_code_length_samples * (PRN - 1)) + k];
// copy the local code to the FPGA memory one by one // copy the local code to the FPGA memory one by one
d_map_base[PROG_MEMS_ADDR] = LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY | code_chip; // | select_fpga_correlator; //d_map_base[PROG_MEMS_ADDR] = LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY | code_chip; // | select_fpga_correlator;
d_map_base[PROG_MEMS_ADDR] = d_ca_codes[(d_code_length_samples * (PRN - 1)) + k];
; // | select_fpga_correlator;
} }
if (d_track_pilot) if (d_track_pilot)
{ {
@ -331,8 +333,9 @@ void Fpga_Multicorrelator_8sc::fpga_configure_tracking_gps_local_code(int32_t PR
// { // {
// code_chip = 0; // code_chip = 0;
// } // }
code_chip = d_data_codes[(d_code_length_samples * (PRN - 1)) + k]; //code_chip = d_data_codes[(d_code_length_samples * (PRN - 1)) + k];
d_map_base[PROG_MEMS_ADDR] = LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY | code_chip | select_pilot_corelator; //d_map_base[PROG_MEMS_ADDR] = LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY | code_chip | select_pilot_corelator;
d_map_base[PROG_MEMS_ADDR] = d_data_codes[(d_code_length_samples * (PRN - 1)) + k];
} }
} }