mirror of
https://github.com/gnss-sdr/gnss-sdr
synced 2024-07-02 18:03:14 +00:00
b849b20a8c
- Added a pre-compiled custom GN3S firmware. - Added a fully-compliant GNU Radio source block for GN3S USB dongle. It can be used also from GNU Radio companion and from Python applications. - Added a new GN3S_Signal_Source block. It is possible to disable the GN3S signal source compilation. See README. git-svn-id: https://svn.code.sf.net/p/gnss-sdr/code/trunk@217 64b25241-fba3-4117-9849-534c7e92360d
71 lines
2.0 KiB
C
71 lines
2.0 KiB
C
/*
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* USRP - Universal Software Radio Peripheral
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*
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* Copyright (C) 2003 Free Software Foundation, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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/*
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* common defines and prototypes for USRP
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*
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* In comments below "TRM" refers to the EZ-USB FX2 Technical Reference Manual
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*/
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#ifndef _USRPCOMMON_H_
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#define _USRPCOMMON_H_
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#include "gn3s_regs.h"
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#include "fx2regs.h"
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#include "syncdelay.h"
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/*
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* From TRM page 15-105:
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*
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* Under certain conditions, some read and write access to the FX2
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* registers must be separated by a "synchronization delay". The
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* delay is necessary only under the following conditions:
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*
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* - between a write to any register in the 0xE600 - 0xE6FF range
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* and a write to one of the registers listed below.
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*
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* - between a write to one of the registers listed below and a read
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* from any register in the 0xE600 - 0xE6FF range.
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*
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* Registers which require a synchronization delay:
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*
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* FIFORESET FIFOPINPOLAR
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* INPKTEND EPxBCH:L
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* EPxFIFOPFH:L EPxAUTOINLENH:L
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* EPxFIFOCFG EPxGPIFFLGSEL
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* PINFLAGSAB PINFLAGSCD
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* EPxFIFOIE EPxFIFOIRQ
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* GPIFIE GPIFIRQ
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* UDMACRCH:L GPIFADRH:L
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* GPIFTRIG EPxGPIFTRIG
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* OUTPKTEND REVCTL
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* GPIFTCB3 GPIFTCB2
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* GPIFTCB1 GPIFTCB0
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*/
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#define TRUE 1
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#define FALSE 0
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void init_usrp (void);
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void init_gpif (void);
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#endif /* _USRPCOMMON_H_ */
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