mirror of https://github.com/gnss-sdr/gnss-sdr
193 lines
6.0 KiB
Markdown
193 lines
6.0 KiB
Markdown
# cpu_features
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<!-- prettier-ignore-start -->
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[comment]: # (
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SPDX-License-Identifier: Apache-2.0
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)
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[comment]: # (
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SPDX-FileCopyrightText: 2017 Google Inc.
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)
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<!-- prettier-ignore-end -->
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A cross-platform C library to retrieve CPU features (such as available
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instructions) at runtime.
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## Table of Contents
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- [Design Rationale](#rationale)
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- [Code samples](#codesample)
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- [Running sample code](#usagesample)
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- [What's supported](#support)
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- [Android NDK's drop in replacement](#ndk)
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- [License](#license)
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- [Build with cmake](#cmake)
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<a name="rationale"></a>
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## Design Rationale
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- **Simple to use.** See the snippets below for examples.
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- **Extensible.** Easy to add missing features or architectures.
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- **Compatible with old compilers** and available on many architectures so it
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can be used widely. To ensure that cpu_features works on as many platforms as
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possible, we implemented it in a highly portable version of C: C99.
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- **Sandbox-compatible.** The library uses a variety of strategies to cope with
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sandboxed environments or when `cpuid` is unavailable. This is useful when
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running integration tests in hermetic environments.
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- **Thread safe, no memory allocation, and raises no exceptions.** cpu_features
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is suitable for implementing fundamental libc functions like `malloc`,
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`memcpy`, and `memcmp`.
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- **Unit tested.**
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<a name="codesample"></a>
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### Checking features at runtime
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Here's a simple example that executes a codepath if the CPU supports both the
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AES and the SSE4.2 instruction sets:
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```c
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#include "cpuinfo_x86.h"
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static const X86Features features = GetX86Info().features;
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void Compute(void) {
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if (features.aes && features.sse4_2) {
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// Run optimized code.
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} else {
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// Run standard code.
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}
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}
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```
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### Caching for faster evaluation of complex checks
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If you wish, you can read all the features at once into a global variable, and
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then query for the specific features you care about. Below, we store all the ARM
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features and then check whether AES and NEON are supported.
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```c
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#include <stdbool.h>
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#include "cpuinfo_arm.h"
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static const ArmFeatures features = GetArmInfo().features;
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static const bool has_aes_and_neon = features.aes && features.neon;
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// use has_aes_and_neon.
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```
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This is a good approach to take if you're checking for combinations of features
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when using a compiler that is slow to extract individual bits from bit-packed
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structures.
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### Checking compile time flags
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The following code determines whether the compiler was told to use the AVX
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instruction set (e.g., `g++ -mavx`) and sets `has_avx` accordingly.
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```c
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#include <stdbool.h>
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#include "cpuinfo_x86.h"
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static const X86Features features = GetX86Info().features;
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static const bool has_avx = CPU_FEATURES_COMPILED_X86_AVX || features.avx;
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// use has_avx.
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```
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`CPU_FEATURES_COMPILED_X86_AVX` is set to 1 if the compiler was instructed to
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use AVX and 0 otherwise, combining compile time and runtime knowledge.
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### Rejecting poor hardware implementations based on microarchitecture
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On x86, the first incarnation of a feature in a microarchitecture might not be
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the most efficient (e.g. AVX on Sandy Bridge). We provide a function to retrieve
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the underlying microarchitecture so you can decide whether to use it.
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Below, `has_fast_avx` is set to 1 if the CPU supports the AVX instruction
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set—but only if it's not Sandy Bridge.
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```c
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#include <stdbool.h>
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#include "cpuinfo_x86.h"
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static const X86Info info = GetX86Info();
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static const X86Microarchitecture uarch = GetX86Microarchitecture(&info);
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static const bool has_fast_avx = info.features.avx && uarch != INTEL_SNB;
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// use has_fast_avx.
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```
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This feature is currently available only for x86 microarchitectures.
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<a name="usagesample"></a>
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### Running sample code
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Building `cpu_features` brings a small executable to test the library.
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```shell
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% ./build/list_cpu_features
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arch : x86
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brand : Intel(R) Xeon(R) CPU E5-1650 0 @ 3.20GHz
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family : 6 (0x06)
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model : 45 (0x2D)
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stepping : 7 (0x07)
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uarch : INTEL_SNB
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flags : aes,avx,cx16,smx,sse4_1,sse4_2,ssse3
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```
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```shell
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% ./build/list_cpu_features --json
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{"arch":"x86","brand":" Intel(R) Xeon(R) CPU E5-1650 0 @ 3.20GHz","family":6,"model":45,"stepping":7,"uarch":"INTEL_SNB","flags":["aes","avx","cx16","smx","sse4_1","sse4_2","ssse3"]}
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```
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<a name="support"></a>
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## What's supported
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| | x86³ | ARM | AArch64 | MIPS⁴ | POWER |
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| ------- | :--: | :-----: | :-----: | :---: | :---: |
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| Android | yes² | yes¹ | yes¹ | yes¹ | N/A |
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| iOS | N/A | not yet | not yet | N/A | N/A |
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| Linux | yes² | yes¹ | yes¹ | yes¹ | yes¹ |
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| MacOs | yes² | N/A | not yet | N/A | no |
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| Windows | yes² | not yet | not yet | N/A | N/A |
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1. **Features revealed from Linux.** We gather data from several sources
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depending on availability:
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- from glibc's
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[getauxval](https://www.gnu.org/software/libc/manual/html_node/Auxiliary-Vector.html)
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- by parsing `/proc/self/auxv`
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- by parsing `/proc/cpuinfo`
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2. **Features revealed from CPU.** features are retrieved by using the `cpuid`
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instruction.
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3. **Microarchitecture detection.** On x86 some features are not always
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implemented efficiently in hardware (e.g. AVX on Sandybridge). Exposing the
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microarchitecture allows the client to reject particular microarchitectures.
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4. All flavors of Mips are supported, little and big endian as well as 32/64
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bits.
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<a name="ndk"></a>
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## Android NDK's drop in replacement
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[cpu_features](https://github.com/google/cpu_features) is now officially
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supporting Android and offers a drop in replacement of for the NDK's
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[cpu-features.h](https://android.googlesource.com/platform/ndk/+/master/sources/android/cpufeatures/cpu-features.h)
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, see [ndk_compat](ndk_compat) folder for details.
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<a name="license"></a>
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## License
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The cpu_features library is licensed under the terms of the Apache license. See
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[LICENSE](LICENSE) for more information.
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<a name="cmake"></a>
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## Build with CMake
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Please check the [CMake build instructions](cmake/README.md).
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