mirror of
https://github.com/gnss-sdr/gnss-sdr
synced 2024-09-30 16:00:51 +00:00
b849b20a8c
- Added a pre-compiled custom GN3S firmware. - Added a fully-compliant GNU Radio source block for GN3S USB dongle. It can be used also from GNU Radio companion and from Python applications. - Added a new GN3S_Signal_Source block. It is possible to disable the GN3S signal source compilation. See README. git-svn-id: https://svn.code.sf.net/p/gnss-sdr/code/trunk@217 64b25241-fba3-4117-9849-534c7e92360d
345 lines
7.8 KiB
C
345 lines
7.8 KiB
C
/*
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* Code from: USRP - Universal Software Radio Peripheral (GNU Radio)
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*
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* Initial modifications by:
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*
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* Stephan Esterhuizen, Aerospace Engineering Sciences
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* University of Colorado at Boulder
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* Boulder CO, USA
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*
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* Further modifications for use with the SiGe USB module to accompany
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* the textbook: "A Software-Defined GPS and Galileo Receiver: A
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* Single-Frequency Approach" by Kai Borre, Dennis Akos, et.al. by:
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*
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* Marcus Junered, GNSS Research Group
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* Lulea University of Technology
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* Lulea, Sweden
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*
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* http://ccar.colorado.edu/gnss
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*
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* ---------------------------------------------------------------------
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*
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* GN3S - GNSS IF Streamer for Windows
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* Copyright (C) 2006 Marcus Junered
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "gn3s_main.h"
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BYTE DB_Addr; // Dual Byte Address stat
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BYTE I2C_Addr; // I2C address
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volatile WORD guardTick = 0;
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volatile WORD guardCnt = 0;
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// Set the page size to 0, so we know to calculate it on an EEPROM write
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BYTE EE_Page_Size = 0;
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void main(void) {
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init_usrp();
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init_gpif();
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init_se4110();
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TD_Init(); // Init fucntion for A9 vendor commands
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EA = 0; // disable all interrupts
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setup_autovectors();
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usb_install_handlers();
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EIEX4 = 1; // disable INT4 FIXME
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EA = 1; // global interrupt enable
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fx2_renumerate(); // simulates disconnect / reconnect
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// enable_se4110();
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program_3w();
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//Javi: disable capture filesize limitation
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//hook_timer_tick((unsigned int)guardC);
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main_loop();
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}
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static
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void get_ep0_data(void)
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{
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EP0BCL = 0; // arm EP0 for OUT xfer. This sets the
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// busy bit
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// wait for busy to clear
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while (EP0CS & bmEPBUSY);
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}
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/*
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* Handle our "Vendor Extension" commands on endpoint 0.
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* If we handle this one, return non-zero.
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*/
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unsigned char
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app_vendor_cmd(void)
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{
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WORD addr, len, bc;
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WORD i;
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if (bRequestType == VRT_VENDOR_IN) {
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// ///////////////////////////////
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// handle the IN requests
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// ///////////////////////////////
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switch (bRequest) {
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case VRQ_GET_STATUS:
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switch (wIndexL) {
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case GS_RX_OVERRUN:
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EP0BUF[0] = GPIFIDLECS>>7;
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EP0BCH = 0;
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EP0BCL = 1;
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break;
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case GS_TX_UNDERRUN:
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EP0BUF[0] = GPIFIDLECS>>7;
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EP0BCH = 0;
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EP0BCL = 1;
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break;
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default:
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return 0;
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}
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break;
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case VRQ_DB_FX:
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DB_Addr = 0x01; //TPM: need to assert double byte
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I2C_Addr |= 0x01; //TPM: need to assert double byte
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// NOTE: This case falls through !
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case VRQ_RAM:
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case VRQ_EEPROM:
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addr = SETUPDAT[2]; // Get address and length
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addr |= SETUPDAT[3] << 8;
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len = SETUPDAT[6];
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len |= SETUPDAT[7] << 8;
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while(len) // Move requested data through EP0IN
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{ // one packet at a time.
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while(EP0CS & bmEPBUSY);
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if(len < EP0BUFF_SIZE)
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bc = len;
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else
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bc = EP0BUFF_SIZE;
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// Is this a RAM upload ?
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if(SETUPDAT[1] == VRQ_RAM)
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{
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for(i=0; i<bc; i++)
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*(EP0BUF+i) = *((BYTE xdata *)addr+i);
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}
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else
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{
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for(i=0; i<bc; i++)
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*(EP0BUF+i) = 0xcd;
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EEPROMRead(addr,(WORD)bc,(WORD)EP0BUF);
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}
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EP0BCH = 0;
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EP0BCL = (BYTE)bc; // Arm endpoint with # bytes to transfer
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addr += bc;
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len -= bc;
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}
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break;
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default:
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return 0;
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}
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}
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else if (bRequestType == VRT_VENDOR_OUT) {
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// ///////////////////////////////
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// handle the OUT requests
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// ///////////////////////////////
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switch (bRequest) {
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/* Start/Stop transfer */
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case VRQ_XFER:
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/* start transfer */
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if (wValueL) {
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setup_flowstate_common();
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SYNCDELAY;
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GPIFABORT =0xff; SYNCDELAY;
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GPIFTRIG = 0; SYNCDELAY;
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setup_flowstate_read(); SYNCDELAY;
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/* Stop transfer */
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/* Zero out FIFO */
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FIFORESET = bmNAKALL;SYNCDELAY;
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FIFORESET = 2;SYNCDELAY;
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FIFORESET = 6;SYNCDELAY;
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FIFORESET = 0;SYNCDELAY;
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/* Start transfer */
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GPIFTRIG = bmGPIF_EP6_START | bmGPIF_READ; SYNCDELAY;
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guardCnt = GUARD;
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}
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/* stop transfer */
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else {
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GPIFTRIG = 0; SYNCDELAY;
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GPIFABORT =0xff; SYNCDELAY;
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/* Clear fifo */
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FIFORESET = bmNAKALL;SYNCDELAY;
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FIFORESET = 2;SYNCDELAY;
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FIFORESET = 6;SYNCDELAY;
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FIFORESET = 0;SYNCDELAY;
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guardCnt = 0;
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}
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break;
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case VRQ_DB_FX:
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DB_Addr = 0x01; //TPM: need to assert double byte
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I2C_Addr |= 0x01; //TPM: need to assert double byte
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// NOTE: This case falls through !
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case VRQ_RAM:
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case VRQ_EEPROM:
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addr = SETUPDAT[2]; // Get address and length
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addr |= SETUPDAT[3] << 8;
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len = SETUPDAT[6];
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len |= SETUPDAT[7] << 8;
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// calculate the page size if we haven't already.
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// THIS IS A DESTRUCTIVE CALL - WILL ERASE THE EEPROM
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if (!EE_Page_Size)
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EE_Page_Size = EEPROMGetPageSize(); // Initialize EEPROM variables
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while(len) // Move new data through EP0OUT
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{ // one packet at a time.
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// Arm endpoint - do it here to clear (after sud avail)
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EP0BCH = 0;
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EP0BCL = 0; // Clear bytecount to allow new data in; also stops NAKing
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while(EP0CS & bmEPBUSY);
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bc = EP0BCL; // Get the new bytecount
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// Is this a RAM download ?
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if(SETUPDAT[1] == VRQ_RAM)
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{
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for(i=0; i<bc; i++)
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*((BYTE xdata *)addr+i) = *(EP0BUF+i);
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}
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else
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{
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for (i = 0; i < bc; )
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{
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// This write is normally one page long. Two special cases:
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// Starting from a non-page aligned address (addr & (EE_Page_Size - 1)) != 0
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// Less than a page left
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BYTE pageSize = EE_Page_Size;
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if (EE_Page_Size != 1)
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{
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if (((addr+i) & (EE_Page_Size - 1)) != 0)
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pageSize = EE_Page_Size - ((addr+i) & (EE_Page_Size - 1));
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if (bc-i < pageSize)
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pageSize = bc-i;
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}
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EEPROMWritePage(addr+i, EP0BUF+i, pageSize);
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i+= pageSize;
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}
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}
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addr += bc;
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len -= bc;
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}
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break;
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default:
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return 0;
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}
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}
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else
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return 0; // invalid bRequestType
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return 1;
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}
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void guardC(void) interrupt {
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if(guardCnt)
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guardTick = 1;
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clear_timer_irq();
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}
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static void main_loop(void)
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{
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setup_flowstate_common();
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SYNCDELAY;
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while (1) {
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// We don't do much, GPIF is running on autopilot
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if (_usb_got_SUDAV) {
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usb_handle_setup_packet();
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_usb_got_SUDAV = 0;
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}
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//Javi: Disable capture filesize limitation
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/*
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if (guardTick && guardCnt) {
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guardTick = 0;
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if(!(--guardCnt)) {
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GPIFTRIG = 0; SYNCDELAY;
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GPIFABORT =0xff; SYNCDELAY;
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FIFORESET = bmNAKALL;SYNCDELAY;
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FIFORESET = 2;SYNCDELAY;
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FIFORESET = 6;SYNCDELAY;
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FIFORESET = 0;SYNCDELAY;
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}
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}
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*/
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}
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}
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void TD_Init(void) // Called once at startup
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{
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//Rwuen = TRUE; // Enable remote-wakeup
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// Set the page size to 0, so we know to calculate it on an EEPROM write
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EE_Page_Size = 0;
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// Determine I2C boot eeprom device address; addr = 0x0 for 8 bit addr eeproms (24LC00)
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I2C_Addr = SERIAL_ADDR | ((I2CS & 0x10) >> 4); // addr=0x01 for 16 bit addr eeprom (LC65)
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// Indicate if it is a dual byte address part (BOOL)
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DB_Addr = (I2C_Addr & 0x01); // ID1 is 16 bit addr bit - set by rocker sw or jumper
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}
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