Marc Majoral
f333c05305
saving temporary changes before merging with usptream next branch
...
added functions that allow the tests to read the scaling factor used by the FFT and the IFFT during acquisition
2018-09-18 11:36:12 +02:00
Marc Majoral
1b0568e0e9
implemented hybrid observables tests using the FPGA. The hybrid observables test funtions are not tested yet.
2018-09-13 16:36:21 +02:00
Marc Majoral
5b9b63cc77
implemented tracking pull-in tests for the FPGA
...
solved a bug in which the SW was using the doppler shift index reported by the HW acquisition accelerator plus one, instead of using the doppler shift index as such.
2018-09-12 16:02:23 +02:00
Marc Majoral
57c358d1b1
removed unnecessary printed messages
2018-08-29 18:23:34 +02:00
Marc Majoral
2b15343a6a
started tracking pull-in test implementation for the FPGA
2018-08-29 18:20:41 +02:00
Marc Majoral
2f0ef5753e
changed the device name for the interrupt counter in the PL
...
removed the acknowledgement of the interrupt triggered by the interrupt counter IP (edge interrupt).
2018-08-22 10:24:40 +02:00
Marc Majoral
93b5ddc6f9
Merge branch 'next' of https://github.com/gnss-sdr/gnss-sdr into fpga
2018-08-14 14:40:14 +02:00
Carles Fernandez
edf82644f2
Merge branch 'fpga' of https://github.com/mmajoral/gnss-sdr into next
2018-08-14 14:09:10 +02:00
Carles Fernandez
f18f02622c
Minor changes
2018-08-14 14:07:37 +02:00
Marc Majoral
5d968e3ba3
Merge branch 'next' of https://github.com/gnss-sdr/gnss-sdr into fpga
2018-08-14 14:07:22 +02:00
Marc Majoral
ddb7c1fc29
added control of the FPGA PL counter interrupt (using a level interrupt).
2018-08-14 14:04:00 +02:00
Carles Fernandez
e381f75fd3
Fixes for 32 bits architectures
2018-08-14 13:31:37 +02:00
Carles Fernandez
b64850d285
Add more extensive use of cstdint typenames
2018-08-14 01:32:06 +02:00
Carles Fernandez
200648be50
Add more extensive use of cstdint typenames
2018-08-14 01:13:07 +02:00
Carles Fernandez
6cee58bdc1
Add more extensive use of cstdint typenames
2018-08-13 13:03:01 +02:00
Carles Fernandez
65a0804084
Add more extensive use of cstdint typenames
2018-08-13 10:18:05 +02:00
Carles Fernandez
4a2ba1cff0
Improve handling of data types
2018-08-13 00:54:23 +02:00
Carles Fernandez
d29befa7e3
Fix int vs unsigned int comparisons
2018-08-12 11:37:21 +02:00
Carles Fernandez
1087b764cf
Add address sanitized build target
...
Update the Volk build types to include a target that compiles with
-fsanitize=address when using clang or gcc.
Activated with -DCMAKE_BUILD_TYPE=ASAN
2018-08-12 10:59:12 +02:00
Carles Fernandez
ecdd5f4e57
Add more extensive use of cstdint typenames
2018-08-12 00:04:09 +02:00
Carles Fernandez
273ce31029
Add more extensive use of cstdint typenames
2018-08-11 23:03:41 +02:00
Carles Fernandez
0126c26cd2
Fix typo
2018-08-11 20:51:59 +02:00
Carles Fernandez
49c480018c
Fix warning
2018-08-11 20:50:06 +02:00
Carles Fernandez
b2db6abdaa
Add more extensive use of cstdint typenames
2018-08-11 14:31:35 +02:00
Carles Fernandez
201c5ccd79
Add more extensive use of cstdint typenames
2018-08-11 13:56:24 +02:00
Carles Fernandez
d41ed73a00
Add more extensive use of cstdint typenames
2018-08-11 13:12:33 +02:00
Carles Fernandez
05a1806c8f
Merge branch 'fpga' of https://github.com/mmajoral/gnss-sdr into merge-marc
2018-08-11 12:56:52 +02:00
Carles Fernandez
f6af31b81f
Add more extensive use of cstdint typenames
2018-08-11 11:44:23 +02:00
Carles Fernandez
4404516289
Add more extensive use of cstdint typenames
2018-08-11 11:42:07 +02:00
Carles Fernandez
7c763abbbc
Add more extensive use of cstdint typenames
2018-08-11 10:34:25 +02:00
Carles Fernandez
35daf5a5e5
Fixes for 32-bit archs
2018-08-11 09:52:26 +02:00
Carles Fernandez
2b65c1b550
Replace unsigned long int by uint64_t and long int by int64_t in tests
2018-08-10 21:16:10 +02:00
Carles Fernandez
6b1611b3a9
Replace unsigned long int by uint64_t and long int by int64_t. Fixes #199
2018-08-10 20:34:03 +02:00
Marc Majoral
f14ad930d5
declared the 64-bit variables as long long ints instead of long ints in the FPGA related files.
...
Variables declared as long ints are interpreted as 32-bit variables in the ARM architecture and 64-bit variables in the X86-64 architecture.
2018-08-10 16:42:53 +02:00
Marc Majoral
b1524a3afe
implemented 64-bit global sample counter
...
started programming the FPGA tracking unit tests
2018-08-10 13:12:06 +02:00
Javier Arribas
2517e7bb31
Replacing software sample counter with hardware sample counter if FPGA is enabled. Fix a compilation bug when ENABLE_FPGA is selected
2018-08-10 11:53:40 +02:00
Marc Majoral
3b154c57c2
fixed some cmakefiles to allow for the correct compilation of the gnss-sdr with the FPGA option and the unit test extra options at the same time.
2018-08-10 10:04:47 +02:00
Carles Fernandez
66bfbffe89
Add AVX implementation
2018-08-09 22:00:22 +02:00
Carles Fernandez
c5f10cd56c
Add sse4_1 implementation
2018-08-09 21:08:58 +02:00
Carles Fernandez
4f588058d0
Initialize all variables
2018-08-09 20:14:42 +02:00
Carles Fernandez
25ebeb746a
Read number of executed dwells
2018-08-09 12:56:27 +02:00
Carles Fernandez
2cc2e93d10
Fix make_two_steps option
2018-08-09 12:47:20 +02:00
Marc Majoral
557d25d3ea
Merge branch 'next' of https://github.com/gnss-sdr/gnss-sdr into fpga
2018-08-08 18:23:38 +02:00
Carles Fernandez
18173bcbff
Fix warning
2018-08-08 18:20:30 +02:00
Carles Fernandez
727cc115c4
Fix kernel
2018-08-08 18:20:09 +02:00
Carles Fernandez
69803b55da
Remove stream_to_vector in generic acquisition block
2018-08-08 15:02:29 +02:00
Marc Majoral
ee132f445f
Merge branch 'next' of https://github.com/gnss-sdr/gnss-sdr into fpga
2018-08-08 14:25:12 +02:00
Carles Fernandez
0b5c827eda
Add Doppler rate in fast_resampler kernel. Still not used
2018-08-08 12:03:58 +02:00
Carles Fernandez
33215c89ac
Fix building
2018-08-08 09:52:06 +02:00
Carles Fernandez
46ed90eb50
Fix building of unit testing extra tests
2018-08-08 09:35:19 +02:00
