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Code Issues Releases Wiki Activity

cleaned unused code and added some comments.

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This commit is contained in:
Marc Majoral
2019-04-04 19:55:02 +02:00
parent eda3f21fb9
commit ff024e7292
21 changed files with 35 additions and 192 deletions
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7
src/algorithms/acquisition/adapters/galileo_e1_pcps_ambiguous_acquisition_fpga.cc
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@@ -44,7 +44,8 @@
#include <complex> // for complex
#include <cstring> // for memcpy
// the following flags are FPGA-specific and they are using arrange the values of the fft of the local code in the way the FPGA
// expects. This arrangement is done in the initialisation to avoid consuming unnecessary clock cycles during tracking.
#define QUANT_BITS_LOCAL_CODE 16
#define SELECT_LSBits 0x0000FFFF // Select the 10 LSbits out of a 20-bit word
#define SELECT_MSBbits 0xFFFF0000 // Select the 10 MSbits out of a 20-bit word
@@ -110,7 +111,6 @@ GalileoE1PcpsAmbiguousAcquisitionFpga::GalileoE1PcpsAmbiguousAcquisitionFpga(
auto* fft_if = new gr::fft::fft_complex(nsamples_total, true); // Direct FFT
auto* code = new std::complex<float>[nsamples_total]; // buffer for the local code
auto* fft_codes_padded = static_cast<gr_complex*>(volk_gnsssdr_malloc(nsamples_total * sizeof(gr_complex), volk_gnsssdr_get_alignment()));
//d_all_fft_codes_ = new lv_16sc_t[nsamples_total * GALILEO_E1_NUMBER_OF_CODES]; // memory containing all the possible fft codes for PRN 0 to 32
d_all_fft_codes_ = new uint32_t[(nsamples_total * GALILEO_E1_NUMBER_OF_CODES)]; // memory containing all the possible fft codes for PRN 0 to 32
float max; // temporary maxima search
int32_t tmp, tmp2, local_code, fft_data;
@@ -170,9 +170,6 @@ GalileoE1PcpsAmbiguousAcquisitionFpga::GalileoE1PcpsAmbiguousAcquisitionFpga(
local_code = (tmp & SELECT_LSBits) | ((tmp2 * SHL_CODE_BITS) & SELECT_MSBbits); // put together the real part and the imaginary part
fft_data = local_code & SELECT_ALL_CODE_BITS;
d_all_fft_codes_[i + (nsamples_total * (PRN - 1))] = fft_data;
// d_all_fft_codes_[i + nsamples_total * (PRN - 1)] = lv_16sc_t(static_cast<int32_t>(floor(fft_codes_padded[i].real() * (pow(2, QUANT_BITS_LOCAL_CODE - 1) - 1) / max)),
// static_cast<int32_t>(floor(fft_codes_padded[i].imag() * (pow(2, QUANT_BITS_LOCAL_CODE - 1) - 1) / max)));
}
}

1
src/algorithms/acquisition/adapters/galileo_e1_pcps_ambiguous_acquisition_fpga.h
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@@ -165,7 +165,6 @@ private:
unsigned int in_streams_;
unsigned int out_streams_;
//lv_16sc_t* d_all_fft_codes_; // memory that contains all the code ffts
uint32_t* d_all_fft_codes_; // memory that contains all the code ffts
};

6
src/algorithms/acquisition/adapters/galileo_e5a_pcps_acquisition_fpga.cc
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@@ -44,6 +44,8 @@
#include <complex> // for complex
#include <cstring> // for strcpy, memcpy
// the following flags are FPGA-specific and they are using arrange the values of the fft of the local code in the way the FPGA
// expects. This arrangement is done in the initialisation to avoid consuming unnecessary clock cycles during tracking.
#define QUANT_BITS_LOCAL_CODE 16
#define SELECT_LSBits 0x0000FFFF // Select the 10 LSbits out of a 20-bit word
#define SELECT_MSBbits 0xFFFF0000 // Select the 10 MSbits out of a 20-bit word
@@ -110,7 +112,6 @@ GalileoE5aPcpsAcquisitionFpga::GalileoE5aPcpsAcquisitionFpga(ConfigurationInterf
auto* fft_if = new gr::fft::fft_complex(nsamples_total, true); // Direct FFT
auto* code = new std::complex<float>[nsamples_total]; // buffer for the local code
auto* fft_codes_padded = static_cast<gr_complex*>(volk_gnsssdr_malloc(nsamples_total * sizeof(gr_complex), volk_gnsssdr_get_alignment()));
//d_all_fft_codes_ = new lv_16sc_t[nsamples_total * GALILEO_E5A_NUMBER_OF_CODES]; // memory containing all the possible fft codes for PRN 0 to 32
d_all_fft_codes_ = new uint32_t[(nsamples_total * GALILEO_E5A_NUMBER_OF_CODES)]; // memory containing all the possible fft codes for PRN 0 to 32
float max; // temporary maxima search
@@ -171,9 +172,6 @@ GalileoE5aPcpsAcquisitionFpga::GalileoE5aPcpsAcquisitionFpga(ConfigurationInterf
local_code = (tmp & SELECT_LSBits) | ((tmp2 * SHL_CODE_BITS) & SELECT_MSBbits); // put together the real part and the imaginary part
fft_data = local_code & SELECT_ALL_CODE_BITS;
d_all_fft_codes_[i + (nsamples_total * (PRN - 1))] = fft_data;
// d_all_fft_codes_[i + nsamples_total * (PRN - 1)] = lv_16sc_t(static_cast<int32_t>(floor(fft_codes_padded[i].real() * (pow(2, QUANT_BITS_LOCAL_CODE - 1) - 1) / max)),
// static_cast<int32_t>(floor(fft_codes_padded[i].imag() * (pow(2, QUANT_BITS_LOCAL_CODE - 1) - 1) / max)));
}
}

1
src/algorithms/acquisition/adapters/galileo_e5a_pcps_acquisition_fpga.h
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@@ -182,7 +182,6 @@ private:
Gnss_Synchro* gnss_synchro_;
//lv_16sc_t* d_all_fft_codes_; // memory that contains all the code ffts
uint32_t* d_all_fft_codes_; // memory that contains all the code ffts
};

7
src/algorithms/acquisition/adapters/gps_l1_ca_pcps_acquisition_fpga.cc
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@@ -48,6 +48,9 @@
#include <cstring> // for memcpy
#define NUM_PRNs 32
// the following flags are FPGA-specific and they are using arrange the values of the fft of the local code in the way the FPGA
// expects. This arrangement is done in the initialisation to avoid consuming unnecessary clock cycles during tracking.
#define QUANT_BITS_LOCAL_CODE 16
#define SELECT_LSBits 0x0000FFFF // Select the 10 LSbits out of a 20-bit word
#define SELECT_MSBbits 0xFFFF0000 // Select the 10 MSbits out of a 20-bit word
@@ -104,7 +107,6 @@ GpsL1CaPcpsAcquisitionFpga::GpsL1CaPcpsAcquisitionFpga(
// allocate memory to compute all the PRNs and compute all the possible codes
auto* code = new std::complex<float>[nsamples_total]; // buffer for the local code
auto* fft_codes_padded = static_cast<gr_complex*>(volk_gnsssdr_malloc(nsamples_total * sizeof(gr_complex), volk_gnsssdr_get_alignment()));
//d_all_fft_codes_ = new lv_16sc_t[nsamples_total * NUM_PRNs]; // memory containing all the possible fft codes for PRN 0 to 32
d_all_fft_codes_ = new uint32_t[(nsamples_total * NUM_PRNs)]; // memory containing all the possible fft codes for PRN 0 to 32
float max;
int32_t tmp, tmp2, local_code, fft_data;
@@ -149,9 +151,6 @@ GpsL1CaPcpsAcquisitionFpga::GpsL1CaPcpsAcquisitionFpga(
local_code = (tmp & SELECT_LSBits) | ((tmp2 * SHL_CODE_BITS) & SELECT_MSBbits); // put together the real part and the imaginary part
fft_data = local_code & SELECT_ALL_CODE_BITS;
d_all_fft_codes_[i + (nsamples_total * (PRN - 1))] = fft_data;
// d_all_fft_codes_[i + nsamples_total * (PRN - 1)] = lv_16sc_t(static_cast<int32_t>(floor(fft_codes_padded[i].real() * (pow(2, QUANT_BITS_LOCAL_CODE - 1) - 1) / max)),
// static_cast<int32_t>(floor(fft_codes_padded[i].imag() * (pow(2, QUANT_BITS_LOCAL_CODE - 1) - 1) / max)));
}
}

1
src/algorithms/acquisition/adapters/gps_l1_ca_pcps_acquisition_fpga.h
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@@ -166,7 +166,6 @@ private:
std::string role_;
unsigned int in_streams_;
unsigned int out_streams_;
//lv_16sc_t* d_all_fft_codes_; // memory that contains all the code ffts
uint32_t* d_all_fft_codes_; // memory that contains all the code ffts
};

7
src/algorithms/acquisition/adapters/gps_l5i_pcps_acquisition_fpga.cc
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@@ -48,6 +48,9 @@
#include <cstring> // for memcpy
#define NUM_PRNs 32
// the following flags are FPGA-specific and they are using arrange the values of the fft of the local code in the way the FPGA
// expects. This arrangement is done in the initialisation to avoid consuming unnecessary clock cycles during tracking.
#define QUANT_BITS_LOCAL_CODE 16
#define SELECT_LSBits 0x0000FFFF // Select the 10 LSbits out of a 20-bit word
#define SELECT_MSBbits 0xFFFF0000 // Select the 10 MSbits out of a 20-bit word
@@ -108,7 +111,6 @@ GpsL5iPcpsAcquisitionFpga::GpsL5iPcpsAcquisitionFpga(
auto* fft_if = new gr::fft::fft_complex(nsamples_total, true); // Direct FFT
auto* code = new gr_complex[nsamples_total];
auto* fft_codes_padded = static_cast<gr_complex*>(volk_gnsssdr_malloc(nsamples_total * sizeof(gr_complex), volk_gnsssdr_get_alignment()));
//d_all_fft_codes_ = new lv_16sc_t[nsamples_total * NUM_PRNs]; // memory containing all the possible fft codes for PRN 0 to 32
d_all_fft_codes_ = new uint32_t[(nsamples_total * NUM_PRNs)]; // memory containing all the possible fft codes for PRN 0 to 32
float max; // temporary maxima search
@@ -153,9 +155,6 @@ GpsL5iPcpsAcquisitionFpga::GpsL5iPcpsAcquisitionFpga(
local_code = (tmp & SELECT_LSBits) | ((tmp2 * SHL_CODE_BITS) & SELECT_MSBbits); // put together the real part and the imaginary part
fft_data = local_code & SELECT_ALL_CODE_BITS;
d_all_fft_codes_[i + (nsamples_total * (PRN - 1))] = fft_data;
// d_all_fft_codes_[i + nsamples_total * (PRN - 1)] = lv_16sc_t(static_cast<int32_t>(floor(fft_codes_padded[i].real() * (pow(2, QUANT_BITS_LOCAL_CODE - 1) - 1) / max)),
// static_cast<int32_t>(floor(fft_codes_padded[i].imag() * (pow(2, QUANT_BITS_LOCAL_CODE - 1) - 1) / max)));
}
}

1
src/algorithms/acquisition/adapters/gps_l5i_pcps_acquisition_fpga.h
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@@ -167,7 +167,6 @@ private:
unsigned int in_streams_;
unsigned int out_streams_;
//lv_16sc_t* d_all_fft_codes_; // memory that contains all the code ffts
uint32_t* d_all_fft_codes_; // memory that contains all the code ffts
float calculate_threshold(float pfa);

45
src/algorithms/acquisition/gnuradio_blocks/pcps_acquisition_fpga.cc
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@@ -52,7 +52,7 @@ pcps_acquisition_fpga_sptr pcps_make_acquisition_fpga(pcpsconf_fpga_t conf_)
pcps_acquisition_fpga::pcps_acquisition_fpga(pcpsconf_fpga_t conf_)
{
acq_parameters = std::move(conf_);
d_sample_counter = 0ULL; // SAMPLE COUNTER
d_sample_counter = 0ULL; // Sample Counter
d_active = false;
d_state = 0;
d_fft_size = acq_parameters.samples_per_code;
@@ -111,8 +111,6 @@ void pcps_acquisition_fpga::init()
d_input_power = 0.0;
d_num_doppler_bins = static_cast<uint32_t>(std::ceil(static_cast<double>(static_cast<int32_t>(d_doppler_max) - static_cast<int32_t>(-d_doppler_max)) / static_cast<double>(d_doppler_step))) + 1;
// acquisition_fpga->init();
}
@@ -323,41 +321,6 @@ void pcps_acquisition_fpga::set_active(bool active)
d_active = false;
send_negative_acquisition();
}
// if (d_test_statistics > d_threshold)
// {
// d_doppler_center_step_two = static_cast<float>(d_gnss_synchro->Acq_doppler_hz);
// //acquisition_fpga->open_device();
// //boost::chrono::high_resolution_clock::time_point start = boost::chrono::high_resolution_clock::now();
//
// acquisition_core(d_num_doppler_bins_step2, d_doppler_step2, d_doppler_center_step_two - static_cast<float>(floor(d_num_doppler_bins_step2 / 2.0)) * d_doppler_step2);
//
// acquisition_fpga->close_device();
//
// if (d_test_statistics > d_threshold)
// {
// d_active = false;
// send_positive_acquisition();
// d_state = 0; // Positive acquisition
// }
// else
// {
// d_state = 0;
// d_active = false;
// send_negative_acquisition();
// }
// //boost::chrono::nanoseconds ns = boost::chrono::high_resolution_clock::now() - start;
// //auto val = ns.count();
// //std::cout << "Count ns: " << val << std::endl;
// }
// else
// {
// acquisition_fpga->close_device();
// d_state = 0;
// d_active = false;
// send_negative_acquisition();
// }
}
}
@@ -369,9 +332,3 @@ void pcps_acquisition_fpga::reset_acquisition(void)
acquisition_fpga->reset_acquisition();
acquisition_fpga->close_device();
}
//void pcps_acquisition_fpga::read_fpga_total_scale_factor(uint32_t* total_scale_factor, uint32_t* fw_scale_factor)
//{
// acquisition_fpga->read_fpga_total_scale_factor(total_scale_factor, fw_scale_factor);
//}

5
src/algorithms/acquisition/gnuradio_blocks/pcps_acquisition_fpga.h
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@@ -231,11 +231,6 @@ public:
* \brief This funciton triggers a HW reset of the FPGA PL.
*/
void reset_acquisition(void);
/*!
* \brief This funciton is only used for the unit tests
*/
//void read_fpga_total_scale_factor(uint32_t* total_scale_factor, uint32_t* fw_scale_factor);
};
#endif /* GNSS_SDR_PCPS_ACQUISITION_FPGA_H_*/

20
src/algorithms/acquisition/libs/fpga_acquisition.cc
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@@ -106,19 +106,12 @@ Fpga_Acquisition::Fpga_Acquisition(std::string device_name,
Fpga_Acquisition::close_device();
d_PRN = 0;
DLOG(INFO) << "Acquisition FPGA class created";
//printf("d_excludelimit = %d\n", d_excludelimit);
}
Fpga_Acquisition::~Fpga_Acquisition() = default;
//bool Fpga_Acquisition::init()
//{
// return true;
//}
bool Fpga_Acquisition::set_local_code(uint32_t PRN)
{
// select the code with the chosen PRN
@@ -169,8 +162,6 @@ void Fpga_Acquisition::fpga_acquisition_test_register()
uint32_t writeval = TEST_REG_SANITY_CHECK;
uint32_t readval;
//Fpga_Acquisition::open_device();
// write value to test register
d_map_base[15] = writeval;
// read value from test register
@@ -184,8 +175,6 @@ void Fpga_Acquisition::fpga_acquisition_test_register()
{
LOG(INFO) << "Acquisition test register sanity check success!";
}
//Fpga_Acquisition::close_device();
}
@@ -293,9 +282,7 @@ void Fpga_Acquisition::read_acquisition_results(uint32_t *max_index,
readval = d_map_base[7]; // read doppler index -- this read releases the interrupt line
*doppler_index = readval;
readval = d_map_base[15]; // read dummy
//Fpga_Acquisition::close_device();
readval = d_map_base[15]; // read dummy (to be removed)
}
@@ -324,9 +311,7 @@ void Fpga_Acquisition::close_device()
void Fpga_Acquisition::reset_acquisition(void)
{
//Fpga_Acquisition::open_device();
d_map_base[8] = RESET_ACQUISITION; // writing a 2 to d_map_base[8] resets the multicorrelator
//Fpga_Acquisition::close_device();
}
@@ -336,8 +321,7 @@ void Fpga_Acquisition::read_fpga_total_scale_factor(uint32_t *total_scale_factor
uint32_t readval = 0;
readval = d_map_base[8];
*total_scale_factor = readval;
//readval = d_map_base[8];
// only the total scale factor is used for the tests (fw scale factor to be removed)
*fw_scale_factor = 0;
}

7
src/algorithms/acquisition/libs/fpga_acquisition.h
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@@ -53,12 +53,10 @@ public:
int64_t fs_in,
uint32_t sampled_ms,
uint32_t select_queue,
//lv_16sc_t *all_fft_codes,
uint32_t *all_fft_codes,
uint32_t excludelimit);
~Fpga_Acquisition();
//bool init();
bool set_local_code(uint32_t PRN);
bool free();
void set_doppler_sweep(uint32_t num_sweeps, uint32_t doppler_step, int32_t doppler_min);
@@ -111,9 +109,8 @@ private:
// data related to the hardware module and the driver
int32_t d_fd; // driver descriptor
volatile uint32_t *d_map_base; // driver memory map
//lv_16sc_t *d_all_fft_codes; // memory that contains all the code ffts
uint32_t *d_all_fft_codes; // memory that contains all the code ffts
uint32_t d_vector_length; // number of samples incluing padding and number of ms
uint32_t *d_all_fft_codes; // memory that contains all the code ffts
uint32_t d_vector_length; // number of samples incluing padding and number of ms
uint32_t d_excludelimit;
uint32_t d_nsamples_total; // number of samples including padding
uint32_t d_nsamples; // number of samples not including padding