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https://github.com/gnss-sdr/gnss-sdr
synced 2024-12-14 20:20:35 +00:00
solved some bugs related to the extended integration in the FPGA
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2982961e49
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feccc62c04
@ -155,9 +155,9 @@ GpsL1CaDllPllTrackingFpga::GpsL1CaDllPllTrackingFpga(
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symbols_extended_correlator = 1;
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symbols_extended_correlator = 1;
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std::cout << TEXT_RED << "WARNING: GPS L1 C/A. extend_correlation_symbols must be bigger than 1. Coherent integration has been set to 1 symbol (1 ms)" << TEXT_RESET << std::endl;
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std::cout << TEXT_RED << "WARNING: GPS L1 C/A. extend_correlation_symbols must be bigger than 1. Coherent integration has been set to 1 symbol (1 ms)" << TEXT_RESET << std::endl;
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}
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}
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else if (symbols_extended_correlator > 20)
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else if (symbols_extended_correlator > GPS_CA_BIT_DURATION_MS)
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{
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{
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symbols_extended_correlator = 20;
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symbols_extended_correlator = GPS_CA_BIT_DURATION_MS;
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std::cout << TEXT_RED << "WARNING: GPS L1 C/A. extend_correlation_symbols must be lower than 21. Coherent integration has been set to 20 symbols (20 ms)" << TEXT_RESET << std::endl;
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std::cout << TEXT_RED << "WARNING: GPS L1 C/A. extend_correlation_symbols must be lower than 21. Coherent integration has been set to 20 symbols (20 ms)" << TEXT_RESET << std::endl;
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}
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}
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trk_param_fpga.extend_correlation_symbols = symbols_extended_correlator;
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trk_param_fpga.extend_correlation_symbols = symbols_extended_correlator;
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@ -245,17 +245,6 @@ GpsL1CaDllPllTrackingFpga::GpsL1CaDllPllTrackingFpga(
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printf("correlation in fpga true\n");
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printf("correlation in fpga true\n");
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}
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}
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}
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}
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else
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{
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if (symbols_extended_correlator % GPS_CA_BIT_DURATION_MS == 0)
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{
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trk_param_fpga.extended_correlation_in_fpga = true;
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trk_param_fpga.extend_fpga_integration_periods = symbols_extended_correlator/GPS_CA_BIT_DURATION_MS;
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trk_param_fpga.fpga_integration_period = GPS_CA_BIT_DURATION_MS;
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printf("correlation in fpga true\n");
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printf("extend fpga integration periods true\n");
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}
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}
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}
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}
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@ -1296,6 +1296,23 @@ void dll_pll_veml_tracking_fpga::log_data_extended_integration_in_FPGA(bool inte
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// no need to apply a scale factor. The
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// no need to apply a scale factor. The
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// the signal is scaled up by the longer integration time in the FPGA
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// the signal is scaled up by the longer integration time in the FPGA
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//if (integrating)
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if (d_extend_fpga_integration_periods > 1)
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{
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//TODO: Improve this solution!
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// It compensates the amplitude difference while integrating
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if (d_extend_correlation_symbols_count > 0)
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{
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float scale_factor = static_cast<float>(trk_parameters.extend_correlation_symbols) / static_cast<float>(d_extend_correlation_symbols_count);
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tmp_VE *= scale_factor;
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tmp_E *= scale_factor;
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tmp_P *= scale_factor;
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tmp_L *= scale_factor;
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tmp_VL *= scale_factor;
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}
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}
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for (uint32_t k=0;k<d_num_current_syncrho_repetitions;k++)
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for (uint32_t k=0;k<d_num_current_syncrho_repetitions;k++)
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{
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{
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@ -2121,6 +2138,9 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
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{
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{
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//d_P_accu_old = d_P_accu_old*d_fpga_integration_period;
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d_P_accu_old.real(d_P_accu_old.real()*d_fpga_integration_period);
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d_P_accu_old.imag(d_P_accu_old.imag()*d_fpga_integration_period);
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if (d_sc_demodulate_enabled)
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if (d_sc_demodulate_enabled)
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{
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{
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@ -2130,7 +2150,7 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
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if (d_extend_fpga_integration_periods > 1)
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if (d_extend_fpga_integration_periods > 1)
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{
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{
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// correction on already computed parameters
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// correction on already computed parameters
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K_blk_samples = T_prn_samples*(trk_parameters.extend_correlation_symbols/d_extend_fpga_integration_periods) + d_rem_code_phase_samples_prev;
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K_blk_samples = T_prn_samples*(d_fpga_integration_period) + d_rem_code_phase_samples_prev;
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d_next_integration_length_samples = static_cast<int32_t>(std::floor(K_blk_samples));
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d_next_integration_length_samples = static_cast<int32_t>(std::floor(K_blk_samples));
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d_state = 5;
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d_state = 5;
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@ -2331,7 +2351,7 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
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if (d_secondary)
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if (d_secondary)
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{
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{
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d_first_length_secondary_code = d_current_integration_length_samples - (trk_parameters.extend_correlation_symbols - 1)*static_cast<int32_t>(std::floor(T_prn_samples));
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d_first_length_secondary_code = d_current_integration_length_samples - (d_fpga_integration_period - 1)*static_cast<int32_t>(std::floor(T_prn_samples));
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d_next_length_secondary_code = static_cast<int32_t>(std::floor(T_prn_samples));
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d_next_length_secondary_code = static_cast<int32_t>(std::floor(T_prn_samples));
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multicorrelator_fpga->update_secondary_code_length(d_first_length_secondary_code, d_next_length_secondary_code);
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multicorrelator_fpga->update_secondary_code_length(d_first_length_secondary_code, d_next_length_secondary_code);
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@ -2379,10 +2399,10 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
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current_synchro_data.Flag_valid_symbol_output = true;
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current_synchro_data.Flag_valid_symbol_output = true;
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current_synchro_data.correlation_length_ms = d_correlation_length_ms;
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current_synchro_data.correlation_length_ms = d_correlation_length_ms;
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d_num_current_syncrho_repetitions = trk_parameters.extend_correlation_symbols;
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d_num_current_syncrho_repetitions = d_fpga_integration_period;
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d_extend_correlation_symbols_count++;
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d_extend_correlation_symbols_count++;
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if (d_extend_correlation_symbols_count == (trk_parameters.extend_correlation_symbols - 1))
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if (d_extend_correlation_symbols_count == (d_extend_fpga_integration_periods - 1))
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{
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{
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d_extend_correlation_symbols_count = 0;
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d_extend_correlation_symbols_count = 0;
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d_state = 6;
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d_state = 6;
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@ -2396,7 +2416,6 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
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case 6: // narrow tracking IN THE FPGA
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case 6: // narrow tracking IN THE FPGA
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{
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{
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d_sample_counter = d_sample_counter_next;
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d_sample_counter = d_sample_counter_next;
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d_sample_counter_next = d_sample_counter + static_cast<uint64_t>(d_current_integration_length_samples);
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d_sample_counter_next = d_sample_counter + static_cast<uint64_t>(d_current_integration_length_samples);
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@ -2408,8 +2427,7 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
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// this must be computed for the secondary prn code
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// this must be computed for the secondary prn code
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if (d_secondary)
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if (d_secondary)
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{
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{
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d_first_length_secondary_code = d_current_integration_length_samples - (d_fpga_integration_period - 1)*static_cast<int32_t>(std::floor(T_prn_samples));
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d_first_length_secondary_code = d_current_integration_length_samples - (trk_parameters.extend_correlation_symbols - 1)*static_cast<int32_t>(std::floor(T_prn_samples));
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d_next_length_secondary_code = static_cast<int32_t>(std::floor(T_prn_samples));
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d_next_length_secondary_code = static_cast<int32_t>(std::floor(T_prn_samples));
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multicorrelator_fpga->update_secondary_code_length(d_first_length_secondary_code, d_next_length_secondary_code);
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multicorrelator_fpga->update_secondary_code_length(d_first_length_secondary_code, d_next_length_secondary_code);
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@ -2469,7 +2487,7 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
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current_synchro_data.Flag_valid_symbol_output = true;
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current_synchro_data.Flag_valid_symbol_output = true;
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current_synchro_data.correlation_length_ms = d_correlation_length_ms;
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current_synchro_data.correlation_length_ms = d_correlation_length_ms;
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d_num_current_syncrho_repetitions = trk_parameters.extend_correlation_symbols;
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d_num_current_syncrho_repetitions = d_fpga_integration_period;
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d_extend_correlation_symbols_count = 0;
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d_extend_correlation_symbols_count = 0;
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@ -2482,6 +2500,10 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
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d_L_accu = gr_complex(0.0, 0.0);
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d_L_accu = gr_complex(0.0, 0.0);
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d_VL_accu = gr_complex(0.0, 0.0);
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d_VL_accu = gr_complex(0.0, 0.0);
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if (d_extend_fpga_integration_periods > 1)
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{
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d_state = 5;
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}
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}
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}
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@ -2502,7 +2524,7 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
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// debug
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// debug
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d_sc_prompt_changed = false;
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d_sc_prompt_changed = false;
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if (d_state == 3 || d_state == 4 | d_state ==6)
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if (d_state == 3 || d_state == 4 || d_state == 5 || d_state ==6)
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{
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{
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// debug - remodulate secondary code
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// debug - remodulate secondary code
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if (d_sc_remodulate_enabled == true)
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if (d_sc_remodulate_enabled == true)
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@ -2578,7 +2600,7 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
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current_synchro_data.Carrier_phase_rads = d_extended_integration_first_acc_carrier_phase_rad;
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current_synchro_data.Carrier_phase_rads = d_extended_integration_first_acc_carrier_phase_rad;
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d_sc_prompt_changed = false;
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d_sc_prompt_changed = false;
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if (d_state == 3 || d_state == 4 | d_state ==6)
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if (d_state == 3 || d_state == 4 || d_state == 5 || d_state ==6)
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{
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{
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if (d_sc_remodulate_enabled == true)
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if (d_sc_remodulate_enabled == true)
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