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fix FPGA signal source names for consistency

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This commit is contained in:
Marc Majoral
2024-07-24 11:02:44 +02:00
parent 5b06bc34bc
commit f2acb7dc2f
9 changed files with 72 additions and 72 deletions
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12
src/algorithms/signal_source/adapters/CMakeLists.txt
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@@ -37,24 +37,24 @@ if(ENABLE_AD9361)
###############################################
# AD9361 DIRECT TO FPGA Hardware
###############################################
list(APPEND OPT_DRIVER_SOURCES ad9361_fpga_signal_source.cc)
list(APPEND OPT_DRIVER_HEADERS ad9361_fpga_signal_source.h)
list(APPEND OPT_DRIVER_SOURCES ad9361_signal_source_fpga.cc)
list(APPEND OPT_DRIVER_HEADERS ad9361_signal_source_fpga.h)
endif()
if(ENABLE_MAX2771)
###############################################
# MAX2771 EVKIT DIRECT TO FPGA Hardware
###############################################
list(APPEND OPT_DRIVER_SOURCES fpga_max2771_evkit_signal_source.cc)
list(APPEND OPT_DRIVER_HEADERS fpga_max2771_evkit_signal_source.h)
list(APPEND OPT_DRIVER_SOURCES max2771_evkit_signal_source_fpga.cc)
list(APPEND OPT_DRIVER_HEADERS max2771_evkit_signal_source_fpga.h)
endif()
if(ENABLE_DMA_PROXY)
###############################################
# FPGA DMA source
###############################################
list(APPEND OPT_DRIVER_SOURCES fpga_dma_signal_source.cc)
list(APPEND OPT_DRIVER_HEADERS fpga_dma_signal_source.h)
list(APPEND OPT_DRIVER_SOURCES dma_signal_source_fpga.cc)
list(APPEND OPT_DRIVER_HEADERS dma_signal_source_fpga.h)
endif()
if(ENABLE_FLEXIBAND AND TELEORBIT_FOUND)

22
src/algorithms/signal_source/adapters/ad9361_fpga_signal_source.cc → src/algorithms/signal_source/adapters/ad9361_signal_source_fpga.cc
View File

@@ -1,5 +1,5 @@
/*!
* \file ad9361_fpga_signal_source.cc
* \file ad9361_signal_source_fpga.cc
* \brief signal source for Analog Devices front-end AD9361 connected directly
* to FPGA accelerators.
* This source implements only the AD9361 control. It is NOT compatible with
@@ -22,7 +22,7 @@
* -----------------------------------------------------------------------------
*/
#include "ad9361_fpga_signal_source.h"
#include "ad9361_signal_source_fpga.h"
#include "GPS_L1_CA.h"
#include "GPS_L5.h"
#include "ad9361_manager.h"
@@ -44,10 +44,10 @@
using namespace std::string_literals;
Ad9361FpgaSignalSource::Ad9361FpgaSignalSource(const ConfigurationInterface *configuration,
Ad9361SignalSourceFPGA::Ad9361SignalSourceFPGA(const ConfigurationInterface *configuration,
const std::string &role, unsigned int in_stream, unsigned int out_stream,
Concurrent_Queue<pmt::pmt_t> *queue __attribute__((unused)))
: SignalSourceBase(configuration, role, "Ad9361_Fpga_Signal_Source"s),
: SignalSourceBase(configuration, role, "Ad9361_Signal_Source_Fpga"s),
gain_mode_rx1_(configuration->property(role + ".gain_mode_rx1", default_gain_mode)),
gain_mode_rx2_(configuration->property(role + ".gain_mode_rx2", default_gain_mode)),
rf_port_select_(configuration->property(role + ".rf_port_select", default_rf_port_select)),
@@ -276,7 +276,7 @@ Ad9361FpgaSignalSource::Ad9361FpgaSignalSource(const ConfigurationInterface *con
}
Ad9361FpgaSignalSource::~Ad9361FpgaSignalSource()
Ad9361SignalSourceFPGA::~Ad9361SignalSourceFPGA()
{
/* cleanup and exit */
@@ -328,7 +328,7 @@ Ad9361FpgaSignalSource::~Ad9361FpgaSignalSource()
}
void Ad9361FpgaSignalSource::run_dynamic_bit_selection_process()
void Ad9361SignalSourceFPGA::run_dynamic_bit_selection_process()
{
bool dynamic_bit_selection_active = true;
@@ -347,7 +347,7 @@ void Ad9361FpgaSignalSource::run_dynamic_bit_selection_process()
}
void Ad9361FpgaSignalSource::run_buffer_monitor_process()
void Ad9361SignalSourceFPGA::run_buffer_monitor_process()
{
bool enable_ovf_check_buffer_monitor_active = true;
@@ -367,7 +367,7 @@ void Ad9361FpgaSignalSource::run_buffer_monitor_process()
}
void Ad9361FpgaSignalSource::connect(gr::top_block_sptr top_block)
void Ad9361SignalSourceFPGA::connect(gr::top_block_sptr top_block)
{
if (top_block)
{ /* top_block is not null */
@@ -376,7 +376,7 @@ void Ad9361FpgaSignalSource::connect(gr::top_block_sptr top_block)
}
void Ad9361FpgaSignalSource::disconnect(gr::top_block_sptr top_block)
void Ad9361SignalSourceFPGA::disconnect(gr::top_block_sptr top_block)
{
if (top_block)
{ /* top_block is not null */
@@ -385,14 +385,14 @@ void Ad9361FpgaSignalSource::disconnect(gr::top_block_sptr top_block)
}
gr::basic_block_sptr Ad9361FpgaSignalSource::get_left_block()
gr::basic_block_sptr Ad9361SignalSourceFPGA::get_left_block()
{
LOG(WARNING) << "Trying to get signal source left block.";
return {};
}
gr::basic_block_sptr Ad9361FpgaSignalSource::get_right_block()
gr::basic_block_sptr Ad9361SignalSourceFPGA::get_right_block()
{
return {};
}

14
src/algorithms/signal_source/adapters/ad9361_fpga_signal_source.h → src/algorithms/signal_source/adapters/ad9361_signal_source_fpga.h
View File

@@ -1,5 +1,5 @@
/*!
* \file ad9361_fpga_signal_source.h
* \file ad9361_signal_source_fpga.h
* \brief signal source for Analog Devices front-end AD9361 connected directly
* to FPGA accelerators.
* This source implements only the AD9361 control. It is NOT compatible with
@@ -18,8 +18,8 @@
* -----------------------------------------------------------------------------
*/
#ifndef GNSS_SDR_AD9361_FPGA_SIGNAL_SOURCE_H
#define GNSS_SDR_AD9361_FPGA_SIGNAL_SOURCE_H
#ifndef GNSS_SDR_AD9361_SIGNAL_SOURCE_FPGA_H
#define GNSS_SDR_AD9361_SIGNAL_SOURCE_FPGA_H
#include "concurrent_queue.h"
#include "fpga_buffer_monitor.h"
@@ -44,14 +44,14 @@
class ConfigurationInterface;
class Ad9361FpgaSignalSource : public SignalSourceBase
class Ad9361SignalSourceFPGA : public SignalSourceBase
{
public:
Ad9361FpgaSignalSource(const ConfigurationInterface *configuration,
Ad9361SignalSourceFPGA(const ConfigurationInterface *configuration,
const std::string &role, unsigned int in_stream,
unsigned int out_stream, Concurrent_Queue<pmt::pmt_t> *queue);
~Ad9361FpgaSignalSource();
~Ad9361SignalSourceFPGA();
inline size_t item_size() override
{
@@ -139,4 +139,4 @@ private:
/** \} */
/** \} */
#endif // GNSS_SDR_AD9361_FPGA_SIGNAL_SOURCE_H
#endif // GNSS_SDR_AD9361_SIGNAL_SOURCE_FPGA_H

24
src/algorithms/signal_source/adapters/fpga_dma_signal_source.cc → src/algorithms/signal_source/adapters/dma_signal_source_fpga.cc
View File

@@ -1,5 +1,5 @@
/*!
* \file fpga_dma_signal_source.cc
* \file dma_signal_source_fpga.cc
* \brief signal source for a DMA connected directly to FPGA accelerators.
* This source implements only the DMA control. It is NOT compatible with
* conventional SDR acquisition and tracking blocks.
@@ -16,7 +16,7 @@
* -----------------------------------------------------------------------------
*/
#include "fpga_dma_signal_source.h"
#include "dma_signal_source_fpga.h"
#include "command_event.h"
#include "configuration_interface.h"
#include "gnss_sdr_flags.h"
@@ -37,10 +37,10 @@
using namespace std::string_literals;
FPGADMASignalSource::FPGADMASignalSource(const ConfigurationInterface *configuration,
DMASignalSourceFPGA::DMASignalSourceFPGA(const ConfigurationInterface *configuration,
const std::string &role, unsigned int in_stream, unsigned int out_stream,
Concurrent_Queue<pmt::pmt_t> *queue __attribute__((unused)))
: SignalSourceBase(configuration, role, "FPGA_DMA_Signal_Source"s),
: SignalSourceBase(configuration, role, "DMA_Signal_Source_Fpga"s),
queue_(queue),
filename0_(configuration->property(role + ".filename", empty_string)),
sample_rate_(configuration->property(role + ".sampling_frequency", default_bandwidth)),
@@ -223,7 +223,7 @@ FPGADMASignalSource::FPGADMASignalSource(const ConfigurationInterface *configura
}
FPGADMASignalSource::~FPGADMASignalSource()
DMASignalSourceFPGA::~DMASignalSourceFPGA()
{
std::unique_lock<std::mutex> lock_DMA(dma_mutex);
enable_DMA_ = false; // disable the DMA
@@ -251,13 +251,13 @@ FPGADMASignalSource::~FPGADMASignalSource()
}
void FPGADMASignalSource::start()
void DMASignalSourceFPGA::start()
{
thread_file_to_dma = std::thread([&] { run_DMA_process(filename0_, filename1_, samples_to_skip_, item_size_, samples_, repeat_, dma_buff_offset_pos_, queue_); });
}
void FPGADMASignalSource::run_DMA_process(const std::string &filename0_, const std::string &filename1_, uint64_t &samples_to_skip, size_t &item_size, int64_t &samples, bool &repeat, uint32_t &dma_buff_offset_pos, Concurrent_Queue<pmt::pmt_t> *queue)
void DMASignalSourceFPGA::run_DMA_process(const std::string &filename0_, const std::string &filename1_, uint64_t &samples_to_skip, size_t &item_size, int64_t &samples, bool &repeat, uint32_t &dma_buff_offset_pos, Concurrent_Queue<pmt::pmt_t> *queue)
{
std::ifstream infile1;
infile1.exceptions(std::ifstream::failbit | std::ifstream::badbit);
@@ -535,7 +535,7 @@ void FPGADMASignalSource::run_DMA_process(const std::string &filename0_, const s
}
void FPGADMASignalSource::run_dynamic_bit_selection_process()
void DMASignalSourceFPGA::run_dynamic_bit_selection_process()
{
bool dynamic_bit_selection_active = true;
@@ -554,7 +554,7 @@ void FPGADMASignalSource::run_dynamic_bit_selection_process()
}
void FPGADMASignalSource::connect(gr::top_block_sptr top_block)
void DMASignalSourceFPGA::connect(gr::top_block_sptr top_block)
{
if (top_block)
{ /* top_block is not null */
@@ -563,7 +563,7 @@ void FPGADMASignalSource::connect(gr::top_block_sptr top_block)
}
void FPGADMASignalSource::disconnect(gr::top_block_sptr top_block)
void DMASignalSourceFPGA::disconnect(gr::top_block_sptr top_block)
{
if (top_block)
{ /* top_block is not null */
@@ -572,14 +572,14 @@ void FPGADMASignalSource::disconnect(gr::top_block_sptr top_block)
}
gr::basic_block_sptr FPGADMASignalSource::get_left_block()
gr::basic_block_sptr DMASignalSourceFPGA::get_left_block()
{
LOG(WARNING) << "Trying to get signal source left block.";
return {};
}
gr::basic_block_sptr FPGADMASignalSource::get_right_block()
gr::basic_block_sptr DMASignalSourceFPGA::get_right_block()
{
return {};
}

14
src/algorithms/signal_source/adapters/fpga_dma_signal_source.h → src/algorithms/signal_source/adapters/dma_signal_source_fpga.h
View File

@@ -1,5 +1,5 @@
/*!
* \file fpga_dma_signal_source.h
* \file dma_signal_source_fpga.h
* \brief signal source for a DMA connected directly to FPGA accelerators.
* This source implements only the DMA control. It is NOT compatible with
* conventional SDR acquisition and tracking blocks.
@@ -16,8 +16,8 @@
* -----------------------------------------------------------------------------
*/
#ifndef GNSS_SDR_FPGA_DMA_SIGNAL_SOURCE_H
#define GNSS_SDR_FPGA_DMA_SIGNAL_SOURCE_H
#ifndef GNSS_SDR_DMA_SIGNAL_SOURCE_FPGA_H
#define GNSS_SDR_DMA_SIGNAL_SOURCE_FPGA_H
#include "concurrent_queue.h"
#include "fpga_dma-proxy.h"
@@ -41,14 +41,14 @@
class ConfigurationInterface;
class FPGADMASignalSource : public SignalSourceBase
class DMASignalSourceFPGA : public SignalSourceBase
{
public:
FPGADMASignalSource(const ConfigurationInterface *configuration,
DMASignalSourceFPGA(const ConfigurationInterface *configuration,
const std::string &role, unsigned int in_stream,
unsigned int out_stream, Concurrent_Queue<pmt::pmt_t> *queue);
~FPGADMASignalSource();
~DMASignalSourceFPGA();
void start() override;
@@ -115,4 +115,4 @@ private:
/** \} */
/** \} */
#endif // GNSS_SDR_FPGA_DMA_SIGNAL_SOURCE_H
#endif // GNSS_SDR_DMA_SIGNAL_SOURCE_FPGA_H

24
src/algorithms/signal_source/adapters/fpga_max2771_evkit_signal_source.cc → src/algorithms/signal_source/adapters/max2771_evkit_signal_source_fpga.cc
View File

@@ -1,5 +1,5 @@
/*!
* \file fpga_max2771_evkit_signal_source.cc
* \file max2771_evkit_signal_source_fpga.cc
* \brief Signal source for the MAX2771EVKIT evaluation board connected directly
* to FPGA accelerators.
* This source implements only the MAX2771 control. It is NOT compatible with
@@ -16,7 +16,7 @@
* -----------------------------------------------------------------------------
*/
#include "fpga_max2771_evkit_signal_source.h"
#include "max2771_evkit_signal_source_fpga.h"
#include "GPS_L1_CA.h"
#include "GPS_L2C.h"
#include "GPS_L5.h"
@@ -38,10 +38,10 @@
using namespace std::string_literals;
FPGAMAX2771EVKITSignalSource::FPGAMAX2771EVKITSignalSource(const ConfigurationInterface *configuration,
MAX2771EVKITSignalSourceFPGA::MAX2771EVKITSignalSourceFPGA(const ConfigurationInterface *configuration,
const std::string &role, unsigned int in_stream, unsigned int out_stream,
Concurrent_Queue<pmt::pmt_t> *queue __attribute__((unused)))
: SignalSourceBase(configuration, role, "FPGA_MAX2771_EVKIT_Signal_Source"s),
: SignalSourceBase(configuration, role, "MAX2771_EVKIT_Signal_Source_Fpga"s),
freq_(configuration->property(role + ".freq", static_cast<uint64_t>(GPS_L1_FREQ_HZ))),
sample_rate_(configuration->property(role + ".sampling_frequency", default_sampling_rate)),
in_stream_(in_stream),
@@ -141,7 +141,7 @@ FPGAMAX2771EVKITSignalSource::FPGAMAX2771EVKITSignalSource(const ConfigurationIn
}
}
std::vector<uint32_t> FPGAMAX2771EVKITSignalSource::setup_regs(void)
std::vector<uint32_t> MAX2771EVKITSignalSourceFPGA::setup_regs(void)
{
std::vector<uint32_t> register_values = std::vector<uint32_t>(MAX2771_NUM_REGS);
@@ -338,7 +338,7 @@ std::vector<uint32_t> FPGAMAX2771EVKITSignalSource::setup_regs(void)
}
bool FPGAMAX2771EVKITSignalSource::configure(std::vector<uint32_t> register_values)
bool MAX2771EVKITSignalSourceFPGA::configure(std::vector<uint32_t> register_values)
{
// write the registers
std::cerr << "Configuring MAX2771 registers" << std::endl;
@@ -377,7 +377,7 @@ bool FPGAMAX2771EVKITSignalSource::configure(std::vector<uint32_t> register_valu
return 0;
}
FPGAMAX2771EVKITSignalSource::~FPGAMAX2771EVKITSignalSource()
MAX2771EVKITSignalSourceFPGA::~MAX2771EVKITSignalSourceFPGA()
{
/* cleanup and exit */
@@ -417,7 +417,7 @@ FPGAMAX2771EVKITSignalSource::~FPGAMAX2771EVKITSignalSource()
}
void FPGAMAX2771EVKITSignalSource::run_buffer_monitor_process()
void MAX2771EVKITSignalSourceFPGA::run_buffer_monitor_process()
{
bool enable_ovf_check_buffer_monitor_active = true;
@@ -437,7 +437,7 @@ void FPGAMAX2771EVKITSignalSource::run_buffer_monitor_process()
}
void FPGAMAX2771EVKITSignalSource::connect(gr::top_block_sptr top_block)
void MAX2771EVKITSignalSourceFPGA::connect(gr::top_block_sptr top_block)
{
if (top_block)
{ /* top_block is not null */
@@ -446,7 +446,7 @@ void FPGAMAX2771EVKITSignalSource::connect(gr::top_block_sptr top_block)
}
void FPGAMAX2771EVKITSignalSource::disconnect(gr::top_block_sptr top_block)
void MAX2771EVKITSignalSourceFPGA::disconnect(gr::top_block_sptr top_block)
{
if (top_block)
{ /* top_block is not null */
@@ -455,14 +455,14 @@ void FPGAMAX2771EVKITSignalSource::disconnect(gr::top_block_sptr top_block)
}
gr::basic_block_sptr FPGAMAX2771EVKITSignalSource::get_left_block()
gr::basic_block_sptr MAX2771EVKITSignalSourceFPGA::get_left_block()
{
LOG(WARNING) << "Trying to get signal source left block.";
return {};
}
gr::basic_block_sptr FPGAMAX2771EVKITSignalSource::get_right_block()
gr::basic_block_sptr MAX2771EVKITSignalSourceFPGA::get_right_block()
{
return {};
}

14
src/algorithms/signal_source/adapters/fpga_max2771_evkit_signal_source.h → src/algorithms/signal_source/adapters/max2771_evkit_signal_source_fpga.h
View File

@@ -1,5 +1,5 @@
/*!
* \file fpga_max2771_evkit_signal_source.h
* \file max2771_evkit_signal_source_fpga.h
* \brief Signal source for the MAX2771EVKIT evaluation board connected directly
* to FPGA accelerators.
* This source implements only the MAX2771 control. It is NOT compatible with
@@ -16,8 +16,8 @@
* -----------------------------------------------------------------------------
*/
#ifndef GNSS_SDR_FPGA_MAX2771_EVKIT_SIGNAL_SOURCE_H
#define GNSS_SDR_FPGA_MAX2771_EVKIT_SIGNAL_SOURCE_H
#ifndef GNSS_SDR_MAX2771_EVKIT_SIGNAL_SOURCE_FPGA_H
#define GNSS_SDR_MAX2771_EVKIT_SIGNAL_SOURCE_FPGA_H
#include "command_event.h"
#include "concurrent_queue.h"
@@ -41,14 +41,14 @@
class ConfigurationInterface;
class FPGAMAX2771EVKITSignalSource : public SignalSourceBase
class MAX2771EVKITSignalSourceFPGA : public SignalSourceBase
{
public:
FPGAMAX2771EVKITSignalSource(const ConfigurationInterface *configuration,
MAX2771EVKITSignalSourceFPGA(const ConfigurationInterface *configuration,
const std::string &role, unsigned int in_stream,
unsigned int out_stream, Concurrent_Queue<pmt::pmt_t> *queue);
~FPGAMAX2771EVKITSignalSource();
~MAX2771EVKITSignalSourceFPGA();
std::vector<uint32_t> setup_regs(void);
@@ -160,4 +160,4 @@ private:
/** \} */
/** \} */
#endif // GNSS_SDR_FPGA_MAX2771_EVKIT_SIGNAL_SOURCE_H
#endif // GNSS_SDR_MAX2771_EVKIT_SIGNAL_SOURCE_FPGA_H

18
src/core/receiver/gnss_block_factory.cc
View File

@@ -167,15 +167,15 @@
#endif
#if AD9361_DRIVER
#include "ad9361_fpga_signal_source.h"
#include "ad9361_signal_source_fpga.h"
#endif
#if MAX2771_DRIVER
#include "fpga_max2771_evkit_signal_source.h"
#include "max2771_evkit_signal_source_fpga.h"
#endif
#if DMA_PROXY_DRIVER
#include "fpga_dma_signal_source.h"
#include "dma_signal_source_fpga.h"
#endif
#if LIMESDR_DRIVER
@@ -820,27 +820,27 @@ std::unique_ptr<GNSSBlockInterface> GNSSBlockFactory::GetBlock(
#endif
#if ENABLE_FPGA and AD9361_DRIVER
else if (implementation == "Ad9361_Fpga_Signal_Source")
else if (implementation == "Ad9361_Signal_Source_Fpga")
{
std::unique_ptr<GNSSBlockInterface> block_ = std::make_unique<Ad9361FpgaSignalSource>(configuration, role, in_streams,
std::unique_ptr<GNSSBlockInterface> block_ = std::make_unique<Ad9361SignalSourceFPGA>(configuration, role, in_streams,
out_streams, queue);
block = std::move(block_);
}
#endif
#if ENABLE_FPGA and MAX2771_DRIVER
else if (implementation == "FPGA_MAX2771_EVKIT_Signal_Source")
else if (implementation == "MAX2771_EVKIT_Signal_Source_Fpga")
{
std::unique_ptr<GNSSBlockInterface> block_ = std::make_unique<FPGAMAX2771EVKITSignalSource>(configuration, role, in_streams,
std::unique_ptr<GNSSBlockInterface> block_ = std::make_unique<MAX2771EVKITSignalSourceFPGA>(configuration, role, in_streams,
out_streams, queue);
block = std::move(block_);
}
#endif
#if ENABLE_FPGA and DMA_PROXY_DRIVER
else if (implementation == "FPGA_DMA_Signal_Source")
else if (implementation == "DMA_Signal_Source_Fpga")
{
std::unique_ptr<GNSSBlockInterface> block_ = std::make_unique<FPGADMASignalSource>(configuration, role, in_streams,
std::unique_ptr<GNSSBlockInterface> block_ = std::make_unique<DMASignalSourceFPGA>(configuration, role, in_streams,
out_streams, queue);
block = std::move(block_);
}

2
src/core/receiver/gnss_flowgraph.cc
View File

@@ -547,7 +547,7 @@ int GNSSFlowgraph::connect_fpga_flowgraph()
if (src == nullptr)
{
help_hint_ += " * Check implementation name for SignalSource block.\n";
help_hint_ += " Signal Source block implementation for FPGA off-loading should be Ad9361_Fpga_Signal_Source or Fpga_DMA_2Signal_Source\n";
help_hint_ += " Signal Source block implementation for FPGA off-loading should be Ad9361_Signal_Source_Fpga or Fpga_DMA_2Signal_Source\n";
return 1;
}
if (src->item_size() == 0)