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https://github.com/gnss-sdr/gnss-sdr
synced 2025-01-16 04:05:46 +00:00
adapted the FPGA tracking class according to the latest changes in the next branch
This commit is contained in:
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7e246dea29
commit
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@ -208,12 +208,12 @@ GalileoE1PcpsAmbiguousAcquisitionFpga::GalileoE1PcpsAmbiguousAcquisitionFpga(
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// static_cast<int>(floor(4096*fft_codes_padded[i].imag() * (pow(2, 3) - 1) / max)));
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// d_all_fft_codes_[i + nsamples_total * (PRN - 1)] = lv_16sc_t(static_cast<int>(floor(1024*fft_codes_padded[i].real() * (pow(2, 5) - 1) / max)),
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// static_cast<int>(floor(1024*fft_codes_padded[i].imag() * (pow(2, 5) - 1) / max)));
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d_all_fft_codes_[i + nsamples_total * (PRN - 1)] = lv_16sc_t(static_cast<int>(floor(256*fft_codes_padded[i].real() * (pow(2, 7) - 1) / max)),
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static_cast<int>(floor(256*fft_codes_padded[i].imag() * (pow(2, 7) - 1) / max)));
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// d_all_fft_codes_[i + nsamples_total * (PRN - 1)] = lv_16sc_t(static_cast<int>(floor(256*fft_codes_padded[i].real() * (pow(2, 7) - 1) / max)),
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// static_cast<int>(floor(256*fft_codes_padded[i].imag() * (pow(2, 7) - 1) / max)));
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// d_all_fft_codes_[i + nsamples_total * (PRN - 1)] = lv_16sc_t(static_cast<int>(floor(16*fft_codes_padded[i].real() * (pow(2, 11) - 1) / max)),
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// static_cast<int>(floor(16*fft_codes_padded[i].imag() * (pow(2, 11) - 1) / max)));
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// d_all_fft_codes_[i + nsamples_total * (PRN - 1)] = lv_16sc_t(static_cast<int>(floor(fft_codes_padded[i].real() * (pow(2, 15) - 1) / max)),
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// static_cast<int>(floor(fft_codes_padded[i].imag() * (pow(2, 15) - 1) / max)));
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d_all_fft_codes_[i + nsamples_total * (PRN - 1)] = lv_16sc_t(static_cast<int>(floor(fft_codes_padded[i].real() * (pow(2, 15) - 1) / max)),
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static_cast<int>(floor(fft_codes_padded[i].imag() * (pow(2, 15) - 1) / max)));
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// tmp_re = static_cast<int>(floor(fft_codes_padded[i].real() * (pow(2, 7) - 1) / max));
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// tmp_im = static_cast<int>(floor(fft_codes_padded[i].imag() * (pow(2, 7) - 1) / max));
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@ -327,7 +327,7 @@ void pcps_acquisition_fpga::set_active(bool active)
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printf("##### d_test_statistics = %f\n", d_test_statistics);
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printf("##### debug_d_max_absolute =%f\n",debug_d_max_absolute);
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printf("##### debug_d_input_power_absolute =%f\n",debug_d_input_power_absolute);
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printf("##### debug_indext = %d\n",debug_indext);
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printf("##### initial_sample = %d\n",initial_sample);
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printf("##### debug_doppler_index = %d\n",debug_doppler_index);
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send_positive_acquisition();
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d_state = 0; // Positive acquisition
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@ -51,7 +51,7 @@ GalileoE1DllPllVemlTrackingFpga::GalileoE1DllPllVemlTrackingFpga(
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unsigned int in_streams, unsigned int out_streams) : role_(role), in_streams_(in_streams), out_streams_(out_streams)
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{
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//dllpllconf_t trk_param;
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dllpllconf_fpga_t trk_param_fpga;
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Dll_Pll_Conf_Fpga trk_param_fpga = Dll_Pll_Conf_Fpga();
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DLOG(INFO) << "role " << role;
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//################# CONFIGURATION PARAMETERS ########################
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std::string default_item_type = "gr_complex";
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@ -50,7 +50,7 @@ GalileoE5aDllPllTrackingFpga::GalileoE5aDllPllTrackingFpga(
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ConfigurationInterface* configuration, std::string role,
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unsigned int in_streams, unsigned int out_streams) : role_(role), in_streams_(in_streams), out_streams_(out_streams)
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{
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dllpllconf_fpga_t trk_param_fpga;
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Dll_Pll_Conf_Fpga trk_param_fpga = Dll_Pll_Conf_Fpga();
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DLOG(INFO) << "role " << role;
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//################# CONFIGURATION PARAMETERS ########################
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std::string default_item_type = "gr_complex";
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@ -53,7 +53,7 @@ GpsL1CaDllPllTrackingFpga::GpsL1CaDllPllTrackingFpga(
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unsigned int in_streams, unsigned int out_streams) :
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role_(role), in_streams_(in_streams), out_streams_(out_streams)
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{
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dllpllconf_fpga_t trk_param_fpga;
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Dll_Pll_Conf_Fpga trk_param_fpga = Dll_Pll_Conf_Fpga();
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DLOG(INFO) << "role " << role;
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//################# CONFIGURATION PARAMETERS ########################
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@ -52,7 +52,7 @@ GpsL2MDllPllTrackingFpga::GpsL2MDllPllTrackingFpga(
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unsigned int in_streams, unsigned int out_streams) : role_(role), in_streams_(in_streams), out_streams_(out_streams)
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{
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//dllpllconf_t trk_param;
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dllpllconf_fpga_t trk_param_fpga;
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Dll_Pll_Conf_Fpga trk_param_fpga = Dll_Pll_Conf_Fpga();
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DLOG(INFO) << "role " << role;
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//################# CONFIGURATION PARAMETERS ########################
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//std::string default_item_type = "gr_complex";
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@ -52,7 +52,7 @@ GpsL5DllPllTrackingFpga::GpsL5DllPllTrackingFpga(
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unsigned int in_streams, unsigned int out_streams) : role_(role), in_streams_(in_streams), out_streams_(out_streams)
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{
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//dllpllconf_t trk_param;
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dllpllconf_fpga_t trk_param_fpga;
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Dll_Pll_Conf_Fpga trk_param_fpga = Dll_Pll_Conf_Fpga();
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DLOG(INFO) << "role " << role;
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//################# CONFIGURATION PARAMETERS ########################
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//std::string default_item_type = "gr_complex";
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@ -3,6 +3,7 @@
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* \brief Implementation of a code DLL + carrier PLL tracking block using an FPGA
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* \author Marc Majoral, 2018. marc.majoral(at)cttc.es
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* Antonio Ramos, 2018 antonio.ramosdet(at)gmail.com
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* Javier Arribas, 2018. jarribas(at)cttc.es
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*
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* Code DLL + carrier PLL according to the algorithms described in:
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* [1] K.Borre, D.M.Akos, N.Bertelsen, P.Rinder, and S.H.Jensen,
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@ -29,7 +30,7 @@
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with GNSS-SDR. If not, see <http://www.gnu.org/licenses/>.
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* along with GNSS-SDR. If not, see <https://www.gnu.org/licenses/>.
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*
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* -------------------------------------------------------------------------
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*/
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@ -60,13 +61,13 @@
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using google::LogMessage;
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dll_pll_veml_tracking_fpga_sptr dll_pll_veml_make_tracking_fpga(dllpllconf_fpga_t conf_)
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dll_pll_veml_tracking_fpga_sptr dll_pll_veml_make_tracking_fpga(const Dll_Pll_Conf_Fpga &conf_)
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{
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return dll_pll_veml_tracking_fpga_sptr(new dll_pll_veml_tracking_fpga(conf_));
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}
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dll_pll_veml_tracking_fpga::dll_pll_veml_tracking_fpga(dllpllconf_fpga_t conf_) :
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dll_pll_veml_tracking_fpga::dll_pll_veml_tracking_fpga(const Dll_Pll_Conf_Fpga &conf_) :
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gr::block("dll_pll_veml_tracking_fpga", gr::io_signature::make(0, 0, sizeof(lv_16sc_t)),
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gr::io_signature::make(1, 1, sizeof(Gnss_Synchro)))
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{
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@ -75,6 +76,9 @@ dll_pll_veml_tracking_fpga::dll_pll_veml_tracking_fpga(dllpllconf_fpga_t conf_)
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this->message_port_register_out(pmt::mp("events"));
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this->set_relative_rate(1.0 / static_cast<double>(trk_parameters.vector_length));
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// Telemetry bit synchronization message port input (mainly for GPS L1 CA)
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this->message_port_register_in(pmt::mp("preamble_samplestamp"));
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// initialize internal vars
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d_veml = false;
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d_cloop = true;
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@ -114,6 +118,32 @@ dll_pll_veml_tracking_fpga::dll_pll_veml_tracking_fpga(dllpllconf_fpga_t conf_)
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d_secondary = false;
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trk_parameters.track_pilot = false;
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interchange_iq = false;
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// set the preamble
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unsigned short int preambles_bits[GPS_CA_PREAMBLE_LENGTH_BITS] = GPS_PREAMBLE;
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// preamble bits to sampled symbols
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d_gps_l1ca_preambles_symbols = static_cast<int *>(volk_gnsssdr_malloc(GPS_CA_PREAMBLE_LENGTH_SYMBOLS * sizeof(int), volk_gnsssdr_get_alignment()));
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int n = 0;
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for (int i = 0; i < GPS_CA_PREAMBLE_LENGTH_BITS; i++)
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{
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for (unsigned int j = 0; j < GPS_CA_TELEMETRY_SYMBOLS_PER_BIT; j++)
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{
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if (preambles_bits[i] == 1)
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{
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d_gps_l1ca_preambles_symbols[n] = 1;
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}
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else
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{
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d_gps_l1ca_preambles_symbols[n] = -1;
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}
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n++;
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}
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}
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d_symbol_history.resize(GPS_CA_PREAMBLE_LENGTH_SYMBOLS); // Change fixed buffer size
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d_symbol_history.clear(); // Clear all the elements in the buffer
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}
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else if (signal_type.compare("2S") == 0)
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{
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@ -138,21 +168,21 @@ dll_pll_veml_tracking_fpga::dll_pll_veml_tracking_fpga(dllpllconf_fpga_t conf_)
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d_correlation_length_ms = 1;
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//d_code_samples_per_chip = 1;
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//d_code_length_chips = static_cast<unsigned int>(GPS_L5i_CODE_LENGTH_CHIPS);
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// GPS L5 does not have pilot secondary code
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d_secondary = true;
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interchange_iq = false;
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// interchange_iq = false;
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if (trk_parameters.track_pilot)
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{
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d_secondary_code_length = static_cast<unsigned int>(GPS_L5q_NH_CODE_LENGTH);
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d_secondary_code_string = const_cast<std::string *>(&GPS_L5q_NH_CODE_STR);
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signal_pretty_name = signal_pretty_name + "Q";
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//interchange_iq = true;
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interchange_iq = true;
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}
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else
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{
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d_secondary_code_length = static_cast<unsigned int>(GPS_L5i_NH_CODE_LENGTH);
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d_secondary_code_string = const_cast<std::string *>(&GPS_L5i_NH_CODE_STR);
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signal_pretty_name = signal_pretty_name + "I";
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interchange_iq = false;
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}
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}
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else
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@ -206,18 +236,19 @@ dll_pll_veml_tracking_fpga::dll_pll_veml_tracking_fpga(dllpllconf_fpga_t conf_)
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//d_code_samples_per_chip = 1;
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//d_code_length_chips = static_cast<unsigned int>(Galileo_E5a_CODE_LENGTH_CHIPS);
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d_secondary = true;
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interchange_iq = false;
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//interchange_iq = false;
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if (trk_parameters.track_pilot)
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{
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d_secondary_code_length = static_cast<unsigned int>(Galileo_E5a_Q_SECONDARY_CODE_LENGTH);
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signal_pretty_name = signal_pretty_name + "Q";
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// interchange_iq = true;
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interchange_iq = true;
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}
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else
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{
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d_secondary_code_length = static_cast<unsigned int>(Galileo_E5a_I_SECONDARY_CODE_LENGTH);
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d_secondary_code_string = const_cast<std::string *>(&Galileo_E5a_I_SECONDARY_CODE);
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signal_pretty_name = signal_pretty_name + "I";
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interchange_iq = false;
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}
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}
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else
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@ -272,7 +303,7 @@ dll_pll_veml_tracking_fpga::dll_pll_veml_tracking_fpga(dllpllconf_fpga_t conf_)
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d_correlator_outs = static_cast<gr_complex *>(volk_gnsssdr_malloc(d_n_correlator_taps * sizeof(gr_complex), volk_gnsssdr_get_alignment()));
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d_local_code_shift_chips = static_cast<float *>(volk_gnsssdr_malloc(d_n_correlator_taps * sizeof(float), volk_gnsssdr_get_alignment()));
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std::fill_n(d_correlator_outs, d_n_correlator_taps, gr_complex(0.0, 0.0));
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//std::fill_n(d_correlator_outs, d_n_correlator_taps, gr_complex(0.0, 0.0));
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d_code_samples_per_chip = trk_parameters.code_samples_per_chip; // number of samples per chip
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@ -327,12 +358,12 @@ dll_pll_veml_tracking_fpga::dll_pll_veml_tracking_fpga(dllpllconf_fpga_t conf_)
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if (trk_parameters.track_pilot)
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{
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// Extra correlator for the data component
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d_Prompt_Data = static_cast<gr_complex *>(volk_gnsssdr_malloc(sizeof(gr_complex), volk_gnsssdr_get_alignment()));
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d_Prompt_Data[0] = gr_complex(0.0, 0.0);
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//d_Prompt_Data = static_cast<gr_complex *>(volk_gnsssdr_malloc(sizeof(gr_complex), volk_gnsssdr_get_alignment()));
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//d_Prompt_Data[0] = gr_complex(0.0, 0.0);
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}
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else
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{
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d_Prompt_Data = nullptr;
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//d_Prompt_Data = nullptr;
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}
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//--- Initializations ---//
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@ -346,6 +377,7 @@ dll_pll_veml_tracking_fpga::dll_pll_veml_tracking_fpga(dllpllconf_fpga_t conf_)
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// sample synchronization
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d_sample_counter = 0;
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d_acq_sample_stamp = 0;
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d_absolute_samples_offset = 0;
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d_current_prn_length_samples = static_cast<int>(trk_parameters.vector_length);
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d_next_prn_length_samples = d_current_prn_length_samples;
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@ -358,8 +390,9 @@ dll_pll_veml_tracking_fpga::dll_pll_veml_tracking_fpga(dllpllconf_fpga_t conf_)
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d_CN0_SNV_dB_Hz = 0.0;
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d_carrier_lock_fail_counter = 0;
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d_carrier_lock_threshold = trk_parameters.carrier_lock_th;
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d_Prompt_Data = static_cast<gr_complex *>(volk_gnsssdr_malloc(sizeof(gr_complex), volk_gnsssdr_get_alignment()));
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clear_tracking_vars();
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//clear_tracking_vars();
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d_acquisition_gnss_synchro = nullptr;
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d_channel = 0;
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@ -376,6 +409,7 @@ dll_pll_veml_tracking_fpga::dll_pll_veml_tracking_fpga(dllpllconf_fpga_t conf_)
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d_code_phase_samples = 0.0;
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d_last_prompt = gr_complex(0.0, 0.0);
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d_state = 0; // initial state: standby
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clear_tracking_vars();
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//printf("hhhhhhhhhhh d_n_correlator_taps = %d\n", d_n_correlator_taps);
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@ -395,9 +429,7 @@ dll_pll_veml_tracking_fpga::dll_pll_veml_tracking_fpga(dllpllconf_fpga_t conf_)
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void dll_pll_veml_tracking_fpga::start_tracking()
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{
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/*
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* correct the code phase according to the delay between acq and trk
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*/
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// correct the code phase according to the delay between acq and trk
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d_acq_code_phase_samples = d_acquisition_gnss_synchro->Acq_delay_samples;
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d_acq_carrier_doppler_hz = d_acquisition_gnss_synchro->Acq_doppler_hz;
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d_acq_sample_stamp = d_acquisition_gnss_synchro->Acq_samplestamp_samples;
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@ -405,7 +437,7 @@ void dll_pll_veml_tracking_fpga::start_tracking()
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double acq_trk_diff_seconds = 0; // when using the FPGA we don't use the global sample counter
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// Doppler effect Fd = (C / (C + Vr)) * F
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double radial_velocity = (d_signal_carrier_freq + d_acq_carrier_doppler_hz) / d_signal_carrier_freq;
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// new chip and prn sequence periods based on acq Doppler
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// new chip and PRN sequence periods based on acq Doppler
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d_code_freq_chips = radial_velocity * d_code_chip_rate;
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d_code_phase_step_chips = d_code_freq_chips / trk_parameters.fs_in;
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@ -413,7 +445,8 @@ void dll_pll_veml_tracking_fpga::start_tracking()
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double T_prn_mod_seconds = T_chip_mod_seconds * static_cast<double>(d_code_length_chips);
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double T_prn_mod_samples = T_prn_mod_seconds * trk_parameters.fs_in;
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d_current_prn_length_samples = std::round(T_prn_mod_samples);
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//d_current_prn_length_samples = std::round(T_prn_mod_samples);
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d_current_prn_length_samples = std::floor(T_prn_mod_samples);
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d_next_prn_length_samples = d_current_prn_length_samples;
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double T_prn_true_seconds = static_cast<double>(d_code_length_chips) / d_code_chip_rate;
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double T_prn_true_samples = T_prn_true_seconds * trk_parameters.fs_in;
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@ -538,6 +571,11 @@ void dll_pll_veml_tracking_fpga::start_tracking()
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dll_pll_veml_tracking_fpga::~dll_pll_veml_tracking_fpga()
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{
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if (signal_type.compare("1C") == 0)
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{
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volk_gnsssdr_free(d_gps_l1ca_preambles_symbols);
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}
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if (d_dump_file.is_open())
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{
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try
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@ -565,10 +603,11 @@ dll_pll_veml_tracking_fpga::~dll_pll_veml_tracking_fpga()
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{
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volk_gnsssdr_free(d_local_code_shift_chips);
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volk_gnsssdr_free(d_correlator_outs);
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if (trk_parameters.track_pilot)
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{
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volk_gnsssdr_free(d_Prompt_Data);
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}
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volk_gnsssdr_free(d_Prompt_Data);
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// if (trk_parameters.track_pilot)
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// {
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// volk_gnsssdr_free(d_Prompt_Data);
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// }
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delete[] d_Prompt_buffer;
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multicorrelator_fpga->free();
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}
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@ -609,7 +648,9 @@ bool dll_pll_veml_tracking_fpga::acquire_secondary()
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}
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}
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if (abs(corr_value) == d_secondary_code_length)
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// if (abs(corr_value) == d_secondary_code_length)
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if (abs(corr_value) == static_cast<int>(d_secondary_code_length))
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{
|
||||
return true;
|
||||
}
|
||||
@ -705,7 +746,8 @@ void dll_pll_veml_tracking_fpga::run_dll_pll()
|
||||
void dll_pll_veml_tracking_fpga::clear_tracking_vars()
|
||||
{
|
||||
std::fill_n(d_correlator_outs, d_n_correlator_taps, gr_complex(0.0, 0.0));
|
||||
if (trk_parameters.track_pilot) *d_Prompt_Data = gr_complex(0.0, 0.0);
|
||||
//if (trk_parameters.track_pilot) *d_Prompt_Data = gr_complex(0.0, 0.0);
|
||||
if (trk_parameters.track_pilot) d_Prompt_Data[0] = gr_complex(0.0, 0.0);
|
||||
d_carr_error_hz = 0.0;
|
||||
d_carr_error_filt_hz = 0.0;
|
||||
d_code_error_chips = 0.0;
|
||||
@ -727,7 +769,9 @@ void dll_pll_veml_tracking_fpga::update_tracking_vars()
|
||||
// Compute the next buffer length based in the new period of the PRN sequence and the code phase error estimation
|
||||
T_prn_samples = T_prn_seconds * trk_parameters.fs_in;
|
||||
K_blk_samples = T_prn_samples + d_rem_code_phase_samples + code_error_filt_secs * trk_parameters.fs_in;
|
||||
d_next_prn_length_samples = round(K_blk_samples);
|
||||
//d_next_prn_length_samples = round(K_blk_samples);
|
||||
d_next_prn_length_samples = static_cast<int>(std::floor(K_blk_samples)); // round to a discrete number of samples
|
||||
|
||||
//################### PLL COMMANDS #################################################
|
||||
// carrier phase step (NCO phase increment per sample) [rads/sample]
|
||||
d_carrier_phase_step_rad = PI_2 * d_carrier_doppler_hz / trk_parameters.fs_in;
|
||||
@ -812,6 +856,7 @@ void dll_pll_veml_tracking_fpga::log_data(bool integrating)
|
||||
float tmp_VE, tmp_E, tmp_P, tmp_L, tmp_VL;
|
||||
float tmp_float;
|
||||
double tmp_double;
|
||||
unsigned long int tmp_long_int;
|
||||
if (trk_parameters.track_pilot)
|
||||
{
|
||||
if (interchange_iq)
|
||||
@ -878,7 +923,9 @@ void dll_pll_veml_tracking_fpga::log_data(bool integrating)
|
||||
d_dump_file.write(reinterpret_cast<char *>(&prompt_I), sizeof(float));
|
||||
d_dump_file.write(reinterpret_cast<char *>(&prompt_Q), sizeof(float));
|
||||
// PRN start sample stamp
|
||||
d_dump_file.write(reinterpret_cast<char *>(&d_sample_counter), sizeof(unsigned long int));
|
||||
//d_dump_file.write(reinterpret_cast<char *>(&d_sample_counter), sizeof(unsigned long int));
|
||||
tmp_long_int = d_sample_counter + d_current_prn_length_samples;
|
||||
d_dump_file.write(reinterpret_cast<char *>(&tmp_long_int), sizeof(unsigned long int));
|
||||
// accumulated carrier phase
|
||||
tmp_float = d_acc_carrier_phase_rad;
|
||||
d_dump_file.write(reinterpret_cast<char *>(&tmp_float), sizeof(float));
|
||||
@ -1194,7 +1241,7 @@ int dll_pll_veml_tracking_fpga::general_work (int noutput_items __attribute__((u
|
||||
d_correlator_outs[n] = gr_complex(0,0);
|
||||
}
|
||||
|
||||
current_synchro_data.Tracking_sample_counter =d_sample_counter + d_current_prn_length_samples;
|
||||
current_synchro_data.Tracking_sample_counter = 0; // in order to reduce computational workload do not read the sample counter until we start tracking d_sample_counter + d_current_prn_length_samples;
|
||||
current_synchro_data.System = {'G'};
|
||||
current_synchro_data.correlation_length_ms = 1;
|
||||
break;
|
||||
@ -1214,6 +1261,7 @@ int dll_pll_veml_tracking_fpga::general_work (int noutput_items __attribute__((u
|
||||
unsigned absolute_samples_offset = current_synchro_data.Acq_delay_samples + current_synchro_data.Acq_samplestamp_samples + num_frames*d_correlation_length_samples;
|
||||
//printf("333333 absolute_samples_offset = %d\n", absolute_samples_offset);
|
||||
multicorrelator_fpga->set_initial_sample(absolute_samples_offset);
|
||||
d_absolute_samples_offset = absolute_samples_offset;
|
||||
d_sample_counter = absolute_samples_offset;
|
||||
current_synchro_data.Tracking_sample_counter = absolute_samples_offset;
|
||||
d_sample_counter_next = d_sample_counter;
|
||||
@ -1276,40 +1324,116 @@ int dll_pll_veml_tracking_fpga::general_work (int noutput_items __attribute__((u
|
||||
}
|
||||
else if (d_symbols_per_bit > 1) //Signal does not have secondary code. Search a bit transition by sign change
|
||||
{
|
||||
if (d_synchonizing)
|
||||
{
|
||||
if (d_Prompt->real() * d_last_prompt.real() > 0.0)
|
||||
{
|
||||
d_current_symbol++;
|
||||
}
|
||||
else if (d_current_symbol > d_symbols_per_bit)
|
||||
{
|
||||
d_synchonizing = false;
|
||||
d_current_symbol = 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
d_current_symbol = 1;
|
||||
d_last_prompt = *d_Prompt;
|
||||
}
|
||||
}
|
||||
else if (d_last_prompt.real() != 0.0)
|
||||
{
|
||||
d_current_symbol++;
|
||||
if (d_current_symbol == d_symbols_per_bit) next_state = true;
|
||||
}
|
||||
else
|
||||
{
|
||||
d_last_prompt = *d_Prompt;
|
||||
d_synchonizing = true;
|
||||
d_current_symbol = 1;
|
||||
}
|
||||
// if (d_synchonizing)
|
||||
// {
|
||||
// if (d_Prompt->real() * d_last_prompt.real() > 0.0)
|
||||
// {
|
||||
// d_current_symbol++;
|
||||
// }
|
||||
// else if (d_current_symbol > d_symbols_per_bit)
|
||||
// {
|
||||
// d_synchonizing = false;
|
||||
// d_current_symbol = 1;
|
||||
// }
|
||||
// else
|
||||
// {
|
||||
// d_current_symbol = 1;
|
||||
// d_last_prompt = *d_Prompt;
|
||||
// }
|
||||
// }
|
||||
// else if (d_last_prompt.real() != 0.0)
|
||||
// {
|
||||
// d_current_symbol++;
|
||||
// if (d_current_symbol == d_symbols_per_bit) next_state = true;
|
||||
// }
|
||||
// else
|
||||
// {
|
||||
// d_last_prompt = *d_Prompt;
|
||||
// d_synchonizing = true;
|
||||
// d_current_symbol = 1;
|
||||
// }
|
||||
// }
|
||||
//===========================================================================================================
|
||||
//float current_tracking_time_s = static_cast<float>(d_sample_counter - d_acq_sample_stamp) / trk_parameters.fs_in;
|
||||
float current_tracking_time_s = static_cast<float>(d_sample_counter - d_absolute_samples_offset) / trk_parameters.fs_in;
|
||||
if (current_tracking_time_s > 10)
|
||||
{
|
||||
d_symbol_history.push_back(d_Prompt->real());
|
||||
//******* preamble correlation ********
|
||||
int corr_value = 0;
|
||||
if ((d_symbol_history.size() == GPS_CA_PREAMBLE_LENGTH_SYMBOLS)) // and (d_make_correlation or !d_flag_frame_sync))
|
||||
{
|
||||
for (unsigned int i = 0; i < GPS_CA_PREAMBLE_LENGTH_SYMBOLS; i++)
|
||||
{
|
||||
if (d_symbol_history.at(i) < 0) // symbols clipping
|
||||
{
|
||||
corr_value -= d_gps_l1ca_preambles_symbols[i];
|
||||
}
|
||||
else
|
||||
{
|
||||
corr_value += d_gps_l1ca_preambles_symbols[i];
|
||||
}
|
||||
}
|
||||
}
|
||||
if (corr_value == GPS_CA_PREAMBLE_LENGTH_SYMBOLS)
|
||||
{
|
||||
//std::cout << "Preamble detected at tracking!" << std::endl;
|
||||
next_state = true;
|
||||
}
|
||||
else
|
||||
{
|
||||
next_state = false;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
next_state = false;
|
||||
}
|
||||
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
next_state = true;
|
||||
}
|
||||
|
||||
// ########### Output the tracking results to Telemetry block ##########
|
||||
if (interchange_iq)
|
||||
{
|
||||
if (trk_parameters.track_pilot)
|
||||
{
|
||||
// Note that data and pilot components are in quadrature. I and Q are interchanged
|
||||
current_synchro_data.Prompt_I = static_cast<double>((*d_Prompt_Data).imag());
|
||||
current_synchro_data.Prompt_Q = static_cast<double>((*d_Prompt_Data).real());
|
||||
}
|
||||
else
|
||||
{
|
||||
current_synchro_data.Prompt_I = static_cast<double>((*d_Prompt).imag());
|
||||
current_synchro_data.Prompt_Q = static_cast<double>((*d_Prompt).real());
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if (trk_parameters.track_pilot)
|
||||
{
|
||||
// Note that data and pilot components are in quadrature. I and Q are interchanged
|
||||
current_synchro_data.Prompt_I = static_cast<double>((*d_Prompt_Data).real());
|
||||
current_synchro_data.Prompt_Q = static_cast<double>((*d_Prompt_Data).imag());
|
||||
}
|
||||
else
|
||||
{
|
||||
current_synchro_data.Prompt_I = static_cast<double>((*d_Prompt).real());
|
||||
current_synchro_data.Prompt_Q = static_cast<double>((*d_Prompt).imag());
|
||||
}
|
||||
}
|
||||
current_synchro_data.Code_phase_samples = d_rem_code_phase_samples;
|
||||
current_synchro_data.Carrier_phase_rads = d_acc_carrier_phase_rad;
|
||||
current_synchro_data.Carrier_Doppler_hz = d_carrier_doppler_hz;
|
||||
current_synchro_data.CN0_dB_hz = d_CN0_SNV_dB_Hz;
|
||||
current_synchro_data.Flag_valid_symbol_output = true;
|
||||
current_synchro_data.correlation_length_ms = d_correlation_length_ms;
|
||||
|
||||
|
||||
if (next_state)
|
||||
{ // reset extended correlator
|
||||
d_VE_accu = gr_complex(0.0, 0.0);
|
||||
|
@ -39,6 +39,7 @@
|
||||
#ifndef GNSS_SDR_DLL_PLL_VEML_TRACKING_FPGA_H
|
||||
#define GNSS_SDR_DLL_PLL_VEML_TRACKING_FPGA_H
|
||||
|
||||
#include "dll_pll_conf_fpga.h"
|
||||
#include "gnss_synchro.h"
|
||||
#include "tracking_2nd_DLL_filter.h"
|
||||
#include "tracking_2nd_PLL_filter.h"
|
||||
@ -47,46 +48,49 @@
|
||||
#include <fstream>
|
||||
#include <string>
|
||||
#include <map>
|
||||
#include <queue>
|
||||
#include <boost/circular_buffer.hpp>
|
||||
#include "fpga_multicorrelator.h"
|
||||
|
||||
typedef struct
|
||||
{
|
||||
/* DLL/PLL tracking configuration */
|
||||
double fs_in;
|
||||
unsigned int vector_length;
|
||||
bool dump;
|
||||
std::string dump_filename;
|
||||
float pll_bw_hz;
|
||||
float dll_bw_hz;
|
||||
float pll_bw_narrow_hz;
|
||||
float dll_bw_narrow_hz;
|
||||
float early_late_space_chips;
|
||||
float very_early_late_space_chips;
|
||||
float early_late_space_narrow_chips;
|
||||
float very_early_late_space_narrow_chips;
|
||||
int extend_correlation_symbols;
|
||||
int cn0_samples;
|
||||
int cn0_min;
|
||||
int max_lock_fail;
|
||||
double carrier_lock_th;
|
||||
bool track_pilot;
|
||||
char system;
|
||||
char signal[3];
|
||||
std::string device_name;
|
||||
unsigned int device_base;
|
||||
unsigned int multicorr_type;
|
||||
unsigned int code_length_chips;
|
||||
unsigned int code_samples_per_chip;
|
||||
int* ca_codes;
|
||||
int* data_codes;
|
||||
} dllpllconf_fpga_t;
|
||||
//typedef struct
|
||||
//{
|
||||
// /* DLL/PLL tracking configuration */
|
||||
// double fs_in;
|
||||
// unsigned int vector_length;
|
||||
// bool dump;
|
||||
// std::string dump_filename;
|
||||
// float pll_bw_hz;
|
||||
// float dll_bw_hz;
|
||||
// float pll_bw_narrow_hz;
|
||||
// float dll_bw_narrow_hz;
|
||||
// float early_late_space_chips;
|
||||
// float very_early_late_space_chips;
|
||||
// float early_late_space_narrow_chips;
|
||||
// float very_early_late_space_narrow_chips;
|
||||
// int extend_correlation_symbols;
|
||||
// int cn0_samples;
|
||||
// int cn0_min;
|
||||
// int max_lock_fail;
|
||||
// double carrier_lock_th;
|
||||
// bool track_pilot;
|
||||
// char system;
|
||||
// char signal[3];
|
||||
// std::string device_name;
|
||||
// unsigned int device_base;
|
||||
// unsigned int multicorr_type;
|
||||
// unsigned int code_length_chips;
|
||||
// unsigned int code_samples_per_chip;
|
||||
// int* ca_codes;
|
||||
// int* data_codes;
|
||||
//} dllpllconf_fpga_t;
|
||||
|
||||
class dll_pll_veml_tracking_fpga;
|
||||
|
||||
typedef boost::shared_ptr<dll_pll_veml_tracking_fpga>
|
||||
dll_pll_veml_tracking_fpga_sptr;
|
||||
|
||||
dll_pll_veml_tracking_fpga_sptr dll_pll_veml_make_tracking_fpga(dllpllconf_fpga_t conf_);
|
||||
//dll_pll_veml_tracking_fpga_sptr dll_pll_veml_make_tracking_fpga(const dllpllconf_fpga_t &conf_);
|
||||
dll_pll_veml_tracking_fpga_sptr dll_pll_veml_make_tracking_fpga(const Dll_Pll_Conf_Fpga &conf_);
|
||||
|
||||
|
||||
/*!
|
||||
@ -107,9 +111,10 @@ public:
|
||||
void reset(void);
|
||||
|
||||
private:
|
||||
friend dll_pll_veml_tracking_fpga_sptr dll_pll_veml_make_tracking_fpga(dllpllconf_fpga_t conf_);
|
||||
friend dll_pll_veml_tracking_fpga_sptr dll_pll_veml_make_tracking_fpga(const Dll_Pll_Conf_Fpga &conf_);
|
||||
|
||||
dll_pll_veml_tracking_fpga(dllpllconf_fpga_t conf_);
|
||||
dll_pll_veml_tracking_fpga(const Dll_Pll_Conf_Fpga &conf_);
|
||||
void msg_handler_preamble_index(pmt::pmt_t msg);
|
||||
|
||||
bool cn0_and_tracking_lock_status(double coh_integration_time_s);
|
||||
bool acquire_secondary();
|
||||
@ -121,7 +126,8 @@ private:
|
||||
int save_matfile();
|
||||
|
||||
// tracking configuration vars
|
||||
dllpllconf_fpga_t trk_parameters;
|
||||
Dll_Pll_Conf_Fpga trk_parameters;
|
||||
//dllpllconf_fpga_t trk_parameters;
|
||||
bool d_veml;
|
||||
bool d_cloop;
|
||||
unsigned int d_channel;
|
||||
@ -142,6 +148,9 @@ private:
|
||||
std::string *d_secondary_code_string;
|
||||
std::string signal_pretty_name;
|
||||
|
||||
int *d_gps_l1ca_preambles_symbols;
|
||||
boost::circular_buffer<float> d_symbol_history;
|
||||
|
||||
//tracking state machine
|
||||
int d_state;
|
||||
bool d_synchonizing;
|
||||
@ -206,6 +215,7 @@ private:
|
||||
// processing samples counters
|
||||
unsigned long int d_sample_counter;
|
||||
unsigned long int d_acq_sample_stamp;
|
||||
unsigned long int d_absolute_samples_offset;
|
||||
|
||||
// CN0 estimation and lock detector
|
||||
int d_cn0_estimation_counter;
|
||||
|
@ -47,7 +47,7 @@ set(TRACKING_LIB_SOURCES
|
||||
)
|
||||
|
||||
if(ENABLE_FPGA)
|
||||
SET(TRACKING_LIB_SOURCES ${TRACKING_LIB_SOURCES} fpga_multicorrelator.cc)
|
||||
SET(TRACKING_LIB_SOURCES ${TRACKING_LIB_SOURCES} fpga_multicorrelator.cc dll_pll_conf_fpga.cc)
|
||||
endif(ENABLE_FPGA)
|
||||
|
||||
include_directories(
|
||||
|
91
src/algorithms/tracking/libs/dll_pll_conf_fpga.cc
Normal file
91
src/algorithms/tracking/libs/dll_pll_conf_fpga.cc
Normal file
@ -0,0 +1,91 @@
|
||||
/*!
|
||||
* \file dll_pll_conf.cc
|
||||
* \brief Class that contains all the configuration parameters for generic
|
||||
* tracking block based on a DLL and a PLL.
|
||||
* \author Javier Arribas, 2018. jarribas(at)cttc.es
|
||||
*
|
||||
* -------------------------------------------------------------------------
|
||||
*
|
||||
* Copyright (C) 2010-2018 (see AUTHORS file for a list of contributors)
|
||||
*
|
||||
* GNSS-SDR is a software defined Global Navigation
|
||||
* Satellite Systems receiver
|
||||
*
|
||||
* This file is part of GNSS-SDR.
|
||||
*
|
||||
* GNSS-SDR is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* GNSS-SDR is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with GNSS-SDR. If not, see <https://www.gnu.org/licenses/>.
|
||||
*
|
||||
* -------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
|
||||
#include "dll_pll_conf_fpga.h"
|
||||
#include <cstring>
|
||||
|
||||
Dll_Pll_Conf_Fpga::Dll_Pll_Conf_Fpga()
|
||||
{
|
||||
// /* DLL/PLL tracking configuration */
|
||||
// fs_in = 0.0;
|
||||
// vector_length = 0;
|
||||
// dump = false;
|
||||
// dump_filename = "./dll_pll_dump.dat";
|
||||
// pll_bw_hz = 40.0;
|
||||
// dll_bw_hz = 2.0;
|
||||
// pll_bw_narrow_hz = 5.0;
|
||||
// dll_bw_narrow_hz = 0.75;
|
||||
// early_late_space_chips = 0.5;
|
||||
// very_early_late_space_chips = 0.5;
|
||||
// early_late_space_narrow_chips = 0.1;
|
||||
// very_early_late_space_narrow_chips = 0.1;
|
||||
// extend_correlation_symbols = 5;
|
||||
// cn0_samples = 20;
|
||||
// carrier_lock_det_mav_samples = 20;
|
||||
// cn0_min = 25;
|
||||
// max_lock_fail = 50;
|
||||
// carrier_lock_th = 0.85;
|
||||
// track_pilot = false;
|
||||
// system = 'G';
|
||||
// char sig_[3] = "1C";
|
||||
// std::memcpy(signal, sig_, 3);
|
||||
|
||||
/* DLL/PLL tracking configuration */
|
||||
fs_in = 0.0;
|
||||
vector_length = 0;
|
||||
dump = false;
|
||||
dump_filename = "./dll_pll_dump.dat";
|
||||
pll_bw_hz = 40.0;
|
||||
dll_bw_hz = 2.0;
|
||||
pll_bw_narrow_hz = 5.0;
|
||||
dll_bw_narrow_hz = 0.75;
|
||||
early_late_space_chips = 0.5;
|
||||
very_early_late_space_chips = 0.5;
|
||||
early_late_space_narrow_chips = 0.1;
|
||||
very_early_late_space_narrow_chips = 0.1;
|
||||
extend_correlation_symbols = 5;
|
||||
cn0_samples = 20;
|
||||
cn0_min = 25;
|
||||
max_lock_fail = 50;
|
||||
carrier_lock_th = 0.85;
|
||||
track_pilot = false;
|
||||
system = 'G';
|
||||
char sig_[3] = "1C";
|
||||
std::memcpy(signal, sig_, 3);
|
||||
device_name = "/dev/uio";
|
||||
device_base = 1;
|
||||
multicorr_type = 0;
|
||||
code_length_chips = 0;
|
||||
code_samples_per_chip = 0;
|
||||
//int* ca_codes;
|
||||
//int* data_codes;
|
||||
}
|
97
src/algorithms/tracking/libs/dll_pll_conf_fpga.h
Normal file
97
src/algorithms/tracking/libs/dll_pll_conf_fpga.h
Normal file
@ -0,0 +1,97 @@
|
||||
/*!
|
||||
* \file dll_pll_conf.h
|
||||
* \brief Class that contains all the configuration parameters for generic tracking block based on a DLL and a PLL.
|
||||
* \author Javier Arribas, 2018. jarribas(at)cttc.es
|
||||
*
|
||||
* Class that contains all the configuration parameters for generic tracking block based on a DLL and a PLL.
|
||||
*
|
||||
* -------------------------------------------------------------------------
|
||||
*
|
||||
* Copyright (C) 2010-2018 (see AUTHORS file for a list of contributors)
|
||||
*
|
||||
* GNSS-SDR is a software defined Global Navigation
|
||||
* Satellite Systems receiver
|
||||
*
|
||||
* This file is part of GNSS-SDR.
|
||||
*
|
||||
* GNSS-SDR is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* GNSS-SDR is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with GNSS-SDR. If not, see <https://www.gnu.org/licenses/>.
|
||||
*
|
||||
* -------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
#ifndef GNSS_SDR_DLL_PLL_CONF_FPGA_H_
|
||||
#define GNSS_SDR_DLL_PLL_CONF_FPGA_H_
|
||||
|
||||
#include <string>
|
||||
|
||||
class Dll_Pll_Conf_Fpga
|
||||
{
|
||||
private:
|
||||
public:
|
||||
// /* DLL/PLL tracking configuration */
|
||||
// double fs_in;
|
||||
// unsigned int vector_length;
|
||||
// bool dump;
|
||||
// std::string dump_filename;
|
||||
// float pll_bw_hz;
|
||||
// float dll_bw_hz;
|
||||
// float pll_bw_narrow_hz;
|
||||
// float dll_bw_narrow_hz;
|
||||
// float early_late_space_chips;
|
||||
// float very_early_late_space_chips;
|
||||
// float early_late_space_narrow_chips;
|
||||
// float very_early_late_space_narrow_chips;
|
||||
// int extend_correlation_symbols;
|
||||
// int cn0_samples;
|
||||
// int carrier_lock_det_mav_samples;
|
||||
// int cn0_min;
|
||||
// int max_lock_fail;
|
||||
// double carrier_lock_th;
|
||||
// bool track_pilot;
|
||||
// char system;
|
||||
// char signal[3];
|
||||
|
||||
/* DLL/PLL tracking configuration */
|
||||
double fs_in;
|
||||
unsigned int vector_length;
|
||||
bool dump;
|
||||
std::string dump_filename;
|
||||
float pll_bw_hz;
|
||||
float dll_bw_hz;
|
||||
float pll_bw_narrow_hz;
|
||||
float dll_bw_narrow_hz;
|
||||
float early_late_space_chips;
|
||||
float very_early_late_space_chips;
|
||||
float early_late_space_narrow_chips;
|
||||
float very_early_late_space_narrow_chips;
|
||||
int extend_correlation_symbols;
|
||||
int cn0_samples;
|
||||
int cn0_min;
|
||||
int max_lock_fail;
|
||||
double carrier_lock_th;
|
||||
bool track_pilot;
|
||||
char system;
|
||||
char signal[3];
|
||||
std::string device_name;
|
||||
unsigned int device_base;
|
||||
unsigned int multicorr_type;
|
||||
unsigned int code_length_chips;
|
||||
unsigned int code_samples_per_chip;
|
||||
int* ca_codes;
|
||||
int* data_codes;
|
||||
|
||||
Dll_Pll_Conf_Fpga();
|
||||
};
|
||||
|
||||
#endif
|
Loading…
Reference in New Issue
Block a user