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mirror of https://github.com/gnss-sdr/gnss-sdr synced 2025-10-28 14:07:38 +00:00

coding style + removed some unnecessary memory arrays in the FPGA E5A tracking adapter class.

This commit is contained in:
Marc Majoral
2019-02-27 17:27:31 +01:00
parent 484b0f4b02
commit c32e0b427a
25 changed files with 1388 additions and 1535 deletions

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@@ -68,7 +68,7 @@ GalileoE1PcpsAmbiguousAcquisitionFpga::GalileoE1PcpsAmbiguousAcquisitionFpga(
float downsampling_factor = configuration_->property(role + ".downsampling_factor", 4.0); float downsampling_factor = configuration_->property(role + ".downsampling_factor", 4.0);
acq_parameters.downsampling_factor = downsampling_factor; acq_parameters.downsampling_factor = downsampling_factor;
fs_in = fs_in/downsampling_factor; fs_in = fs_in / downsampling_factor;
acq_parameters.fs_in = fs_in; acq_parameters.fs_in = fs_in;
@@ -85,7 +85,7 @@ GalileoE1PcpsAmbiguousAcquisitionFpga::GalileoE1PcpsAmbiguousAcquisitionFpga(
acq_parameters.code_length = code_length; acq_parameters.code_length = code_length;
// The FPGA can only use FFT lengths that are a power of two. // The FPGA can only use FFT lengths that are a power of two.
float nbits = ceilf(log2f((float)code_length*2)); float nbits = ceilf(log2f((float)code_length * 2));
uint32_t nsamples_total = pow(2, nbits); uint32_t nsamples_total = pow(2, nbits);
uint32_t select_queue_Fpga = configuration_->property(role + ".select_queue_Fpga", 0); uint32_t select_queue_Fpga = configuration_->property(role + ".select_queue_Fpga", 0);
@@ -107,7 +107,6 @@ GalileoE1PcpsAmbiguousAcquisitionFpga::GalileoE1PcpsAmbiguousAcquisitionFpga(
for (uint32_t PRN = 1; PRN <= GALILEO_E1_NUMBER_OF_CODES; PRN++) for (uint32_t PRN = 1; PRN <= GALILEO_E1_NUMBER_OF_CODES; PRN++)
{ {
bool cboc = false; // cboc is set to 0 when using the FPGA bool cboc = false; // cboc is set to 0 when using the FPGA
if (acquire_pilot_ == true) if (acquire_pilot_ == true)
@@ -124,16 +123,16 @@ GalileoE1PcpsAmbiguousAcquisitionFpga::GalileoE1PcpsAmbiguousAcquisitionFpga(
cboc, PRN, fs_in, 0, false); cboc, PRN, fs_in, 0, false);
} }
for (uint32_t s = code_length; s < 2*code_length; s++) for (uint32_t s = code_length; s < 2 * code_length; s++)
{ {
code[s] = code[s - code_length]; code[s] = code[s - code_length];
} }
// fill in zero padding // fill in zero padding
for (uint32_t s = 2*code_length; s < nsamples_total; s++) for (uint32_t s = 2 * code_length; s < nsamples_total; s++)
{ {
code[s] = std::complex<float>(static_cast<float>(0,0)); code[s] = std::complex<float>(static_cast<float>(0, 0));
} }
memcpy(fft_if->get_inbuf(), code, sizeof(gr_complex) * nsamples_total); // copy to FFT buffer memcpy(fft_if->get_inbuf(), code, sizeof(gr_complex) * nsamples_total); // copy to FFT buffer
@@ -158,7 +157,6 @@ GalileoE1PcpsAmbiguousAcquisitionFpga::GalileoE1PcpsAmbiguousAcquisitionFpga(
d_all_fft_codes_[i + nsamples_total * (PRN - 1)] = lv_16sc_t(static_cast<int32_t>(floor(fft_codes_padded[i].real() * (pow(2, 9) - 1) / max)), d_all_fft_codes_[i + nsamples_total * (PRN - 1)] = lv_16sc_t(static_cast<int32_t>(floor(fft_codes_padded[i].real() * (pow(2, 9) - 1) / max)),
static_cast<int32_t>(floor(fft_codes_padded[i].imag() * (pow(2, 9) - 1) / max))); static_cast<int32_t>(floor(fft_codes_padded[i].imag() * (pow(2, 9) - 1) / max)));
} }
} }
acq_parameters.all_fft_codes = d_all_fft_codes_; acq_parameters.all_fft_codes = d_all_fft_codes_;

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@@ -60,7 +60,7 @@ GalileoE5aPcpsAcquisitionFpga::GalileoE5aPcpsAcquisitionFpga(ConfigurationInterf
float downsampling_factor = configuration_->property(role + ".downsampling_factor", 1.0); float downsampling_factor = configuration_->property(role + ".downsampling_factor", 1.0);
acq_parameters.downsampling_factor = downsampling_factor; acq_parameters.downsampling_factor = downsampling_factor;
fs_in = fs_in/downsampling_factor; fs_in = fs_in / downsampling_factor;
acq_parameters.fs_in = fs_in; acq_parameters.fs_in = fs_in;
@@ -82,7 +82,7 @@ GalileoE5aPcpsAcquisitionFpga::GalileoE5aPcpsAcquisitionFpga(ConfigurationInterf
acq_parameters.code_length = code_length; acq_parameters.code_length = code_length;
// The FPGA can only use FFT lengths that are a power of two. // The FPGA can only use FFT lengths that are a power of two.
float nbits = ceilf(log2f((float)code_length*2)); float nbits = ceilf(log2f((float)code_length * 2));
uint32_t nsamples_total = pow(2, nbits); uint32_t nsamples_total = pow(2, nbits);
uint32_t select_queue_Fpga = configuration_->property(role + ".select_queue_Fpga", 1); uint32_t select_queue_Fpga = configuration_->property(role + ".select_queue_Fpga", 1);
acq_parameters.select_queue_Fpga = select_queue_Fpga; acq_parameters.select_queue_Fpga = select_queue_Fpga;
@@ -122,13 +122,13 @@ GalileoE5aPcpsAcquisitionFpga::GalileoE5aPcpsAcquisitionFpga(ConfigurationInterf
galileo_e5_a_code_gen_complex_sampled(code, signal_, PRN, fs_in, 0); galileo_e5_a_code_gen_complex_sampled(code, signal_, PRN, fs_in, 0);
for (uint32_t s = code_length; s < 2*code_length; s++) for (uint32_t s = code_length; s < 2 * code_length; s++)
{ {
code[s] = code[s - code_length]; code[s] = code[s - code_length];
} }
// fill in zero padding // fill in zero padding
for (uint32_t s = 2*code_length; s < nsamples_total; s++) for (uint32_t s = 2 * code_length; s < nsamples_total; s++)
{ {
code[s] = std::complex<float>(0.0, 0.0); code[s] = std::complex<float>(0.0, 0.0);
} }
@@ -173,7 +173,6 @@ GalileoE5aPcpsAcquisitionFpga::GalileoE5aPcpsAcquisitionFpga(ConfigurationInterf
delete[] code; delete[] code;
delete fft_if; delete fft_if;
delete[] fft_codes_padded; delete[] fft_codes_padded;
} }

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@@ -145,7 +145,6 @@ public:
void set_resampler_latency(uint32_t latency_samples __attribute__((unused))) override{}; void set_resampler_latency(uint32_t latency_samples __attribute__((unused))) override{};
private: private:
ConfigurationInterface* configuration_; ConfigurationInterface* configuration_;
pcps_acquisition_fpga_sptr acquisition_fpga_; pcps_acquisition_fpga_sptr acquisition_fpga_;

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@@ -69,7 +69,7 @@ GpsL1CaPcpsAcquisitionFpga::GpsL1CaPcpsAcquisitionFpga(
float downsampling_factor = configuration_->property(role + ".downsampling_factor", 4.0); float downsampling_factor = configuration_->property(role + ".downsampling_factor", 4.0);
acq_parameters.downsampling_factor = downsampling_factor; acq_parameters.downsampling_factor = downsampling_factor;
fs_in = fs_in/downsampling_factor; fs_in = fs_in / downsampling_factor;
acq_parameters.fs_in = fs_in; acq_parameters.fs_in = fs_in;
doppler_max_ = configuration_->property(role + ".doppler_max", 5000); doppler_max_ = configuration_->property(role + ".doppler_max", 5000);
@@ -80,7 +80,7 @@ GpsL1CaPcpsAcquisitionFpga::GpsL1CaPcpsAcquisitionFpga(
auto code_length = static_cast<uint32_t>(std::round(static_cast<double>(fs_in) / (GPS_L1_CA_CODE_RATE_HZ / GPS_L1_CA_CODE_LENGTH_CHIPS))); auto code_length = static_cast<uint32_t>(std::round(static_cast<double>(fs_in) / (GPS_L1_CA_CODE_RATE_HZ / GPS_L1_CA_CODE_LENGTH_CHIPS)));
acq_parameters.code_length = code_length; acq_parameters.code_length = code_length;
// The FPGA can only use FFT lengths that are a power of two. // The FPGA can only use FFT lengths that are a power of two.
float nbits = ceilf(log2f((float)code_length*2)); float nbits = ceilf(log2f((float)code_length * 2));
uint32_t nsamples_total = pow(2, nbits); uint32_t nsamples_total = pow(2, nbits);
uint32_t select_queue_Fpga = configuration_->property(role + ".select_queue_Fpga", 0); uint32_t select_queue_Fpga = configuration_->property(role + ".select_queue_Fpga", 0);
acq_parameters.select_queue_Fpga = select_queue_Fpga; acq_parameters.select_queue_Fpga = select_queue_Fpga;
@@ -103,13 +103,13 @@ GpsL1CaPcpsAcquisitionFpga::GpsL1CaPcpsAcquisitionFpga(
{ {
gps_l1_ca_code_gen_complex_sampled(code, PRN, fs_in, 0); // generate PRN code gps_l1_ca_code_gen_complex_sampled(code, PRN, fs_in, 0); // generate PRN code
for (uint32_t s = code_length; s < 2*code_length; s++) for (uint32_t s = code_length; s < 2 * code_length; s++)
{ {
code[s] = code[s - code_length]; code[s] = code[s - code_length];
} }
// fill in zero padding // fill in zero padding
for (uint32_t s = 2*code_length; s < nsamples_total; s++) for (uint32_t s = 2 * code_length; s < nsamples_total; s++)
{ {
code[s] = std::complex<float>(0.0, 0.0); code[s] = std::complex<float>(0.0, 0.0);
} }
@@ -135,7 +135,6 @@ GpsL1CaPcpsAcquisitionFpga::GpsL1CaPcpsAcquisitionFpga(
d_all_fft_codes_[i + nsamples_total * (PRN - 1)] = lv_16sc_t(static_cast<int32_t>(floor(fft_codes_padded[i].real() * (pow(2, 9) - 1) / max)), d_all_fft_codes_[i + nsamples_total * (PRN - 1)] = lv_16sc_t(static_cast<int32_t>(floor(fft_codes_padded[i].real() * (pow(2, 9) - 1) / max)),
static_cast<int32_t>(floor(fft_codes_padded[i].imag() * (pow(2, 9) - 1) / max))); static_cast<int32_t>(floor(fft_codes_padded[i].imag() * (pow(2, 9) - 1) / max)));
} }
} }
//acq_parameters //acq_parameters
@@ -155,7 +154,6 @@ GpsL1CaPcpsAcquisitionFpga::GpsL1CaPcpsAcquisitionFpga(
delete[] code; delete[] code;
delete fft_if; delete fft_if;
delete[] fft_codes_padded; delete[] fft_codes_padded;
} }

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@@ -65,7 +65,7 @@ GpsL5iPcpsAcquisitionFpga::GpsL5iPcpsAcquisitionFpga(
float downsampling_factor = configuration_->property(role + ".downsampling_factor", 1.0); float downsampling_factor = configuration_->property(role + ".downsampling_factor", 1.0);
acq_parameters.downsampling_factor = downsampling_factor; acq_parameters.downsampling_factor = downsampling_factor;
fs_in = fs_in/downsampling_factor; fs_in = fs_in / downsampling_factor;
acq_parameters.fs_in = fs_in; acq_parameters.fs_in = fs_in;
@@ -79,14 +79,14 @@ GpsL5iPcpsAcquisitionFpga::GpsL5iPcpsAcquisitionFpga(
auto code_length = static_cast<uint32_t>(std::round(static_cast<double>(fs_in) / (GPS_L5I_CODE_RATE_HZ / static_cast<double>(GPS_L5I_CODE_LENGTH_CHIPS)))); auto code_length = static_cast<uint32_t>(std::round(static_cast<double>(fs_in) / (GPS_L5I_CODE_RATE_HZ / static_cast<double>(GPS_L5I_CODE_LENGTH_CHIPS))));
acq_parameters.code_length = code_length; acq_parameters.code_length = code_length;
// The FPGA can only use FFT lengths that are a power of two. // The FPGA can only use FFT lengths that are a power of two.
float nbits = ceilf(log2f((float)code_length*2)); float nbits = ceilf(log2f((float)code_length * 2));
uint32_t nsamples_total = pow(2, nbits); uint32_t nsamples_total = pow(2, nbits);
uint32_t select_queue_Fpga = configuration_->property(role + ".select_queue_Fpga", 1); uint32_t select_queue_Fpga = configuration_->property(role + ".select_queue_Fpga", 1);
acq_parameters.select_queue_Fpga = select_queue_Fpga; acq_parameters.select_queue_Fpga = select_queue_Fpga;
std::string default_device_name = "/dev/uio0"; std::string default_device_name = "/dev/uio0";
std::string device_name = configuration_->property(role + ".devicename", default_device_name); std::string device_name = configuration_->property(role + ".devicename", default_device_name);
acq_parameters.device_name = device_name; acq_parameters.device_name = device_name;
acq_parameters.samples_per_ms = nsamples_total/sampled_ms; acq_parameters.samples_per_ms = nsamples_total / sampled_ms;
acq_parameters.samples_per_code = nsamples_total; acq_parameters.samples_per_code = nsamples_total;
acq_parameters.excludelimit = static_cast<uint32_t>(ceil((1.0 / GPS_L5I_CODE_RATE_HZ) * static_cast<float>(acq_parameters.fs_in))); acq_parameters.excludelimit = static_cast<uint32_t>(ceil((1.0 / GPS_L5I_CODE_RATE_HZ) * static_cast<float>(acq_parameters.fs_in)));
@@ -103,15 +103,15 @@ GpsL5iPcpsAcquisitionFpga::GpsL5iPcpsAcquisitionFpga(
{ {
gps_l5i_code_gen_complex_sampled(code, PRN, fs_in); gps_l5i_code_gen_complex_sampled(code, PRN, fs_in);
for (uint32_t s = code_length; s < 2*code_length; s++) for (uint32_t s = code_length; s < 2 * code_length; s++)
{ {
code[s] = code[s - code_length]; code[s] = code[s - code_length];
} }
for (uint32_t s = 2*code_length; s < nsamples_total; s++) for (uint32_t s = 2 * code_length; s < nsamples_total; s++)
{ {
// fill in zero padding // fill in zero padding
code[s] = std::complex<float>(static_cast<float>(0,0)); code[s] = std::complex<float>(static_cast<float>(0, 0));
} }
memcpy(fft_if->get_inbuf(), code, sizeof(gr_complex) * nsamples_total); // copy to FFT buffer memcpy(fft_if->get_inbuf(), code, sizeof(gr_complex) * nsamples_total); // copy to FFT buffer
fft_if->execute(); // Run the FFT of local code fft_if->execute(); // Run the FFT of local code
@@ -153,7 +153,6 @@ GpsL5iPcpsAcquisitionFpga::GpsL5iPcpsAcquisitionFpga(
delete[] code; delete[] code;
delete fft_if; delete fft_if;
delete[] fft_codes_padded; delete[] fft_codes_padded;
} }

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@@ -77,7 +77,6 @@ pcps_acquisition_fpga::pcps_acquisition_fpga(pcpsconf_fpga_t conf_) : gr::block(
acquisition_fpga = std::make_shared<fpga_acquisition>(acq_parameters.device_name, acq_parameters.code_length, acq_parameters.doppler_max, d_fft_size, acquisition_fpga = std::make_shared<fpga_acquisition>(acq_parameters.device_name, acq_parameters.code_length, acq_parameters.doppler_max, d_fft_size,
acq_parameters.fs_in, acq_parameters.sampled_ms, acq_parameters.select_queue_Fpga, acq_parameters.all_fft_codes, acq_parameters.excludelimit); acq_parameters.fs_in, acq_parameters.sampled_ms, acq_parameters.select_queue_Fpga, acq_parameters.all_fft_codes, acq_parameters.excludelimit);
} }
@@ -171,7 +170,6 @@ void pcps_acquisition_fpga::send_negative_acquisition()
void pcps_acquisition_fpga::set_active(bool active) void pcps_acquisition_fpga::set_active(bool active)
{ {
d_active = active; d_active = active;
// initialize acquisition algorithm // initialize acquisition algorithm
@@ -207,14 +205,13 @@ void pcps_acquisition_fpga::set_active(bool active)
// if the attenuation factor of the FPGA FFT-IFFT is smaller than the reference attenuation factor then we need to update the reference attenuation factor // if the attenuation factor of the FPGA FFT-IFFT is smaller than the reference attenuation factor then we need to update the reference attenuation factor
std::cout << "changing blk exp..... d_total_block_exp = " << d_total_block_exp << " total_block_exp = " << total_block_exp << " chan = " << d_channel << std::endl; std::cout << "changing blk exp..... d_total_block_exp = " << d_total_block_exp << " total_block_exp = " << total_block_exp << " chan = " << d_channel << std::endl;
d_total_block_exp = total_block_exp; d_total_block_exp = total_block_exp;
} }
doppler = -static_cast<int32_t>(acq_parameters.doppler_max) + d_doppler_step * (d_doppler_index - 1); doppler = -static_cast<int32_t>(acq_parameters.doppler_max) + d_doppler_step * (d_doppler_index - 1);
if (secondpeak > 0) if (secondpeak > 0)
{ {
d_test_statistics = firstpeak/secondpeak; d_test_statistics = firstpeak / secondpeak;
} }
else else
{ {
@@ -228,10 +225,8 @@ void pcps_acquisition_fpga::set_active(bool active)
{ {
if (d_downsampling_factor > 1) if (d_downsampling_factor > 1)
{ {
d_gnss_synchro->Acq_delay_samples = static_cast<double>(d_downsampling_factor * (indext));
d_gnss_synchro->Acq_delay_samples = static_cast<double>(d_downsampling_factor*(indext)); d_gnss_synchro->Acq_samplestamp_samples = d_downsampling_factor * d_sample_counter - 44; //33; //41; //+ 81*0.5; // delay due to the downsampling filter in the acquisition
d_gnss_synchro->Acq_samplestamp_samples = d_downsampling_factor*d_sample_counter - 44; //33; //41; //+ 81*0.5; // delay due to the downsampling filter in the acquisition
} }
else else
{ {
@@ -274,10 +269,7 @@ void pcps_acquisition_fpga::reset_acquisition(void)
acquisition_fpga->reset_acquisition(); acquisition_fpga->reset_acquisition();
} }
void pcps_acquisition_fpga::read_fpga_total_scale_factor(uint32_t *total_scale_factor, uint32_t *fw_scale_factor) void pcps_acquisition_fpga::read_fpga_total_scale_factor(uint32_t* total_scale_factor, uint32_t* fw_scale_factor)
{ {
acquisition_fpga->read_fpga_total_scale_factor(total_scale_factor, fw_scale_factor); acquisition_fpga->read_fpga_total_scale_factor(total_scale_factor, fw_scale_factor);
} }

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@@ -216,7 +216,7 @@ public:
/*! /*!
* \brief This funciton is only used for the unit tests * \brief This funciton is only used for the unit tests
*/ */
void read_fpga_total_scale_factor(uint32_t *total_scale_factor, uint32_t *fw_scale_factor); void read_fpga_total_scale_factor(uint32_t* total_scale_factor, uint32_t* fw_scale_factor);
}; };
#endif /* GNSS_SDR_PCPS_ACQUISITION_FPGA_H_*/ #endif /* GNSS_SDR_PCPS_ACQUISITION_FPGA_H_*/

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@@ -43,7 +43,6 @@
#include <utility> #include <utility>
// FPGA register parameters // FPGA register parameters
#define PAGE_SIZE 0x10000 // default page size for the multicorrelator memory map #define PAGE_SIZE 0x10000 // default page size for the multicorrelator memory map
#define MAX_PHASE_STEP_RAD 0.999999999534339 // 1 - pow(2,-31); #define MAX_PHASE_STEP_RAD 0.999999999534339 // 1 - pow(2,-31);
@@ -82,7 +81,6 @@ void fpga_acquisition::write_local_code()
{ {
fpga_acquisition::fpga_configure_acquisition_local_code( fpga_acquisition::fpga_configure_acquisition_local_code(
&d_all_fft_codes[d_nsamples_total * (d_PRN - 1)]); &d_all_fft_codes[d_nsamples_total * (d_PRN - 1)]);
} }
fpga_acquisition::fpga_acquisition(std::string device_name, fpga_acquisition::fpga_acquisition(std::string device_name,
@@ -116,7 +114,6 @@ fpga_acquisition::fpga_acquisition(std::string device_name,
d_PRN = 0; d_PRN = 0;
DLOG(INFO) << "Acquisition FPGA class created"; DLOG(INFO) << "Acquisition FPGA class created";
} }
void fpga_acquisition::open_device() void fpga_acquisition::open_device()
@@ -135,12 +132,10 @@ void fpga_acquisition::open_device()
LOG(WARNING) << "Cannot map the FPGA acquisition module into user memory"; LOG(WARNING) << "Cannot map the FPGA acquisition module into user memory";
std::cout << "Acq: cannot map deviceio" << d_device_name << std::endl; std::cout << "Acq: cannot map deviceio" << d_device_name << std::endl;
} }
} }
fpga_acquisition::~fpga_acquisition() fpga_acquisition::~fpga_acquisition()
{ {
} }
@@ -152,7 +147,6 @@ bool fpga_acquisition::free()
void fpga_acquisition::fpga_acquisition_test_register() void fpga_acquisition::fpga_acquisition_test_register()
{ {
// sanity check : check test register // sanity check : check test register
uint32_t writeval = TEST_REG_SANITY_CHECK; uint32_t writeval = TEST_REG_SANITY_CHECK;
uint32_t readval; uint32_t readval;
@@ -190,14 +184,12 @@ void fpga_acquisition::fpga_configure_acquisition_local_code(lv_16sc_t fft_local
local_code = (tmp & SELECT_LSBits) | ((tmp2 * SHL_CODE_BITS) & SELECT_MSBbits); // put together the real part and the imaginary part local_code = (tmp & SELECT_LSBits) | ((tmp2 * SHL_CODE_BITS) & SELECT_MSBbits); // put together the real part and the imaginary part
fft_data = local_code & SELECT_ALL_CODE_BITS; fft_data = local_code & SELECT_ALL_CODE_BITS;
d_map_base[6] = fft_data; d_map_base[6] = fft_data;
} }
} }
void fpga_acquisition::run_acquisition(void) void fpga_acquisition::run_acquisition(void)
{ {
// enable interrupts // enable interrupts
int32_t reenable = 1; int32_t reenable = 1;
int32_t disable_int = 0; int32_t disable_int = 0;
@@ -217,7 +209,6 @@ void fpga_acquisition::run_acquisition(void)
} }
write(d_fd, reinterpret_cast<void *>(&disable_int), sizeof(int32_t)); write(d_fd, reinterpret_cast<void *>(&disable_int), sizeof(int32_t));
} }
void fpga_acquisition::set_block_exp(uint32_t total_block_exp) void fpga_acquisition::set_block_exp(uint32_t total_block_exp)
@@ -227,7 +218,6 @@ void fpga_acquisition::set_block_exp(uint32_t total_block_exp)
void fpga_acquisition::set_doppler_sweep(uint32_t num_sweeps) void fpga_acquisition::set_doppler_sweep(uint32_t num_sweeps)
{ {
float phase_step_rad_real; float phase_step_rad_real;
float phase_step_rad_int_temp; float phase_step_rad_int_temp;
int32_t phase_step_rad_int; int32_t phase_step_rad_int;
@@ -260,7 +250,6 @@ void fpga_acquisition::set_doppler_sweep(uint32_t num_sweeps)
phase_step_rad_int = static_cast<int32_t>(phase_step_rad_int_temp * (POW_2_29)); // * 2^29 (in total it makes x2^31 in two steps to avoid the warnings phase_step_rad_int = static_cast<int32_t>(phase_step_rad_int_temp * (POW_2_29)); // * 2^29 (in total it makes x2^31 in two steps to avoid the warnings
d_map_base[4] = phase_step_rad_int; d_map_base[4] = phase_step_rad_int;
d_map_base[5] = num_sweeps; d_map_base[5] = num_sweeps;
} }
void fpga_acquisition::configure_acquisition() void fpga_acquisition::configure_acquisition()
@@ -272,7 +261,6 @@ void fpga_acquisition::configure_acquisition()
d_map_base[2] = d_nsamples; d_map_base[2] = d_nsamples;
d_map_base[7] = static_cast<int32_t>(log2(static_cast<float>(d_vector_length))); // log2 FFTlength d_map_base[7] = static_cast<int32_t>(log2(static_cast<float>(d_vector_length))); // log2 FFTlength
d_map_base[12] = d_excludelimit; d_map_base[12] = d_excludelimit;
} }
@@ -303,7 +291,6 @@ void fpga_acquisition::set_phase_step(uint32_t doppler_index)
void fpga_acquisition::read_acquisition_results(uint32_t *max_index, void fpga_acquisition::read_acquisition_results(uint32_t *max_index,
float *firstpeak, float *secondpeak, uint64_t *initial_sample, float *power_sum, uint32_t *doppler_index, uint32_t *total_blk_exp) float *firstpeak, float *secondpeak, uint64_t *initial_sample, float *power_sum, uint32_t *doppler_index, uint32_t *total_blk_exp)
{ {
uint64_t initial_sample_tmp = 0; uint64_t initial_sample_tmp = 0;
uint32_t readval = 0; uint32_t readval = 0;
uint64_t readval_long = 0; uint64_t readval_long = 0;
@@ -338,7 +325,6 @@ void fpga_acquisition::read_acquisition_results(uint32_t *max_index,
readval = d_map_base[15]; // read dummy readval = d_map_base[15]; // read dummy
fpga_acquisition::close_device(); fpga_acquisition::close_device();
} }
@@ -376,14 +362,12 @@ void fpga_acquisition::reset_acquisition(void)
// this function is only used for the unit tests // this function is only used for the unit tests
void fpga_acquisition::read_fpga_total_scale_factor(uint32_t *total_scale_factor, uint32_t *fw_scale_factor) void fpga_acquisition::read_fpga_total_scale_factor(uint32_t *total_scale_factor, uint32_t *fw_scale_factor)
{ {
uint32_t readval = 0; uint32_t readval = 0;
readval = d_map_base[8]; readval = d_map_base[8];
*total_scale_factor = readval; *total_scale_factor = readval;
//readval = d_map_base[8]; //readval = d_map_base[8];
*fw_scale_factor = 0; *fw_scale_factor = 0;
} }
void fpga_acquisition::read_result_valid(uint32_t *result_valid) void fpga_acquisition::read_result_valid(uint32_t *result_valid)

View File

@@ -124,7 +124,6 @@ private:
void fpga_acquisition_test_register(void); void fpga_acquisition_test_register(void);
void fpga_configure_acquisition_local_code(lv_16sc_t fft_local_code[]); void fpga_configure_acquisition_local_code(lv_16sc_t fft_local_code[]);
void read_result_valid(uint32_t *result_valid); void read_result_valid(uint32_t *result_valid);
}; };
#endif /* GNSS_SDR_FPGA_ACQUISITION_H_ */ #endif /* GNSS_SDR_FPGA_ACQUISITION_H_ */

View File

@@ -55,7 +55,6 @@ GalileoE5aDllPllTrackingFpga::GalileoE5aDllPllTrackingFpga(
ConfigurationInterface *configuration, const std::string &role, ConfigurationInterface *configuration, const std::string &role,
unsigned int in_streams, unsigned int out_streams) : role_(role), in_streams_(in_streams), out_streams_(out_streams) unsigned int in_streams, unsigned int out_streams) : role_(role), in_streams_(in_streams), out_streams_(out_streams)
{ {
Dll_Pll_Conf_Fpga trk_param_fpga = Dll_Pll_Conf_Fpga(); Dll_Pll_Conf_Fpga trk_param_fpga = Dll_Pll_Conf_Fpga();
DLOG(INFO) << "role " << role; DLOG(INFO) << "role " << role;
//################# CONFIGURATION PARAMETERS ######################## //################# CONFIGURATION PARAMETERS ########################
@@ -138,15 +137,6 @@ GalileoE5aDllPllTrackingFpga::GalileoE5aDllPllTrackingFpga(
auto *aux_code = static_cast<gr_complex *>(volk_gnsssdr_malloc(sizeof(gr_complex) * code_length_chips * code_samples_per_chip, volk_gnsssdr_get_alignment())); auto *aux_code = static_cast<gr_complex *>(volk_gnsssdr_malloc(sizeof(gr_complex) * code_length_chips * code_samples_per_chip, volk_gnsssdr_get_alignment()));
float *tracking_code;
float *data_code;
if (trk_param_fpga.track_pilot)
{
data_code = static_cast<float *>(volk_gnsssdr_malloc(code_samples_per_chip * code_length_chips * sizeof(float), volk_gnsssdr_get_alignment()));
}
tracking_code = static_cast<float *>(volk_gnsssdr_malloc(code_samples_per_chip * code_length_chips * sizeof(float), volk_gnsssdr_get_alignment()));
d_ca_codes = static_cast<int32_t *>(volk_gnsssdr_malloc(static_cast<int32_t>(code_length_chips) * code_samples_per_chip * GALILEO_E5A_NUMBER_OF_CODES * sizeof(int32_t), volk_gnsssdr_get_alignment())); d_ca_codes = static_cast<int32_t *>(volk_gnsssdr_malloc(static_cast<int32_t>(code_length_chips) * code_samples_per_chip * GALILEO_E5A_NUMBER_OF_CODES * sizeof(int32_t), volk_gnsssdr_get_alignment()));
if (trk_param_fpga.track_pilot) if (trk_param_fpga.track_pilot)
@@ -160,37 +150,22 @@ GalileoE5aDllPllTrackingFpga::GalileoE5aDllPllTrackingFpga(
galileo_e5_a_code_gen_complex_primary(aux_code, PRN, const_cast<char *>(sig_)); galileo_e5_a_code_gen_complex_primary(aux_code, PRN, const_cast<char *>(sig_));
if (trk_param_fpga.track_pilot) if (trk_param_fpga.track_pilot)
{ {
for (uint32_t i = 0; i < code_length_chips; i++)
{
tracking_code[i] = aux_code[i].imag();
data_code[i] = aux_code[i].real();
}
for (uint32_t s = 0; s < code_length_chips; s++) for (uint32_t s = 0; s < code_length_chips; s++)
{ {
d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = static_cast<int32_t>(tracking_code[s]); d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = static_cast<int32_t>(aux_code[s].imag());
d_data_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = static_cast<int32_t>(data_code[s]); d_data_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = static_cast<int32_t>(aux_code[s].real());
} }
} }
else else
{ {
for (uint32_t i = 0; i < code_length_chips; i++)
{
tracking_code[i] = aux_code[i].real();
}
for (uint32_t s = 0; s < code_length_chips; s++) for (uint32_t s = 0; s < code_length_chips; s++)
{ {
d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = static_cast<int32_t>(tracking_code[s]); d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = static_cast<int32_t>(aux_code[s].real());
} }
} }
} }
volk_gnsssdr_free(aux_code); volk_gnsssdr_free(aux_code);
volk_gnsssdr_free(tracking_code);
if (trk_param_fpga.track_pilot)
{
volk_gnsssdr_free(data_code);
}
trk_param_fpga.ca_codes = d_ca_codes; trk_param_fpga.ca_codes = d_ca_codes;
trk_param_fpga.data_codes = d_data_codes; trk_param_fpga.data_codes = d_data_codes;
trk_param_fpga.code_length_chips = code_length_chips; trk_param_fpga.code_length_chips = code_length_chips;

View File

@@ -153,7 +153,7 @@ GpsL5DllPllTrackingFpga::GpsL5DllPllTrackingFpga(
for (uint32_t PRN = 1; PRN <= NUM_PRNs; PRN++) for (uint32_t PRN = 1; PRN <= NUM_PRNs; PRN++)
{ {
if (track_pilot) if (trk_param_fpga.track_pilot)
{ {
gps_l5q_code_gen_float(tracking_code, PRN); gps_l5q_code_gen_float(tracking_code, PRN);
gps_l5i_code_gen_float(data_code, PRN); gps_l5i_code_gen_float(data_code, PRN);

View File

@@ -36,21 +36,21 @@
*/ */
#include "dll_pll_veml_tracking_fpga.h" #include "dll_pll_veml_tracking_fpga.h"
#include "tracking_discriminators.h"
#include "lock_detectors.h"
#include "control_message_factory.h"
#include "MATH_CONSTANTS.h"
#include "Galileo_E1.h"
#include "galileo_e1_signal_processing.h"
#include "Galileo_E5a.h"
#include "galileo_e5_signal_processing.h"
#include "GPS_L1_CA.h" #include "GPS_L1_CA.h"
#include "gps_sdr_signal_processing.h"
#include "GPS_L2C.h" #include "GPS_L2C.h"
#include "gps_l2c_signal.h"
#include "GPS_L5.h" #include "GPS_L5.h"
#include "gps_l5_signal.h" #include "Galileo_E1.h"
#include "Galileo_E5a.h"
#include "MATH_CONSTANTS.h"
#include "control_message_factory.h"
#include "galileo_e1_signal_processing.h"
#include "galileo_e5_signal_processing.h"
#include "gnss_sdr_create_directory.h" #include "gnss_sdr_create_directory.h"
#include "gps_l2c_signal.h"
#include "gps_l5_signal.h"
#include "gps_sdr_signal_processing.h"
#include "lock_detectors.h"
#include "tracking_discriminators.h"
#include <boost/filesystem/path.hpp> #include <boost/filesystem/path.hpp>
#include <glog/logging.h> #include <glog/logging.h>
#include <gnuradio/io_signature.h> #include <gnuradio/io_signature.h>
@@ -60,8 +60,8 @@
#include <cmath> #include <cmath>
#include <exception> #include <exception>
#include <iostream> #include <iostream>
#include <sstream>
#include <numeric> #include <numeric>
#include <sstream>
using google::LogMessage; using google::LogMessage;
@@ -423,14 +423,11 @@ dll_pll_veml_tracking_fpga::dll_pll_veml_tracking_fpga(const Dll_Pll_Conf_Fpga &
uint32_t multicorr_type = trk_parameters.multicorr_type; uint32_t multicorr_type = trk_parameters.multicorr_type;
multicorrelator_fpga = std::make_shared<fpga_multicorrelator_8sc>(d_n_correlator_taps, device_name, device_base, ca_codes, data_codes, d_code_length_chips, trk_parameters.track_pilot, multicorr_type, d_code_samples_per_chip); multicorrelator_fpga = std::make_shared<fpga_multicorrelator_8sc>(d_n_correlator_taps, device_name, device_base, ca_codes, data_codes, d_code_length_chips, trk_parameters.track_pilot, multicorr_type, d_code_samples_per_chip);
multicorrelator_fpga->set_output_vectors(d_correlator_outs, d_Prompt_Data); multicorrelator_fpga->set_output_vectors(d_correlator_outs, d_Prompt_Data);
} }
void dll_pll_veml_tracking_fpga::start_tracking() void dll_pll_veml_tracking_fpga::start_tracking()
{ {
// correct the code phase according to the delay between acq and trk // correct the code phase according to the delay between acq and trk
d_acq_code_phase_samples = d_acquisition_gnss_synchro->Acq_delay_samples; d_acq_code_phase_samples = d_acquisition_gnss_synchro->Acq_delay_samples;
d_acq_carrier_doppler_hz = d_acquisition_gnss_synchro->Acq_doppler_hz; d_acq_carrier_doppler_hz = d_acquisition_gnss_synchro->Acq_doppler_hz;
@@ -508,7 +505,6 @@ void dll_pll_veml_tracking_fpga::start_tracking()
d_cloop = true; d_cloop = true;
d_Prompt_buffer_deque.clear(); d_Prompt_buffer_deque.clear();
d_last_prompt = gr_complex(0.0, 0.0); d_last_prompt = gr_complex(0.0, 0.0);
} }
@@ -553,13 +549,11 @@ dll_pll_veml_tracking_fpga::~dll_pll_veml_tracking_fpga()
{ {
LOG(WARNING) << "Exception in destructor " << ex.what(); LOG(WARNING) << "Exception in destructor " << ex.what();
} }
} }
bool dll_pll_veml_tracking_fpga::acquire_secondary() bool dll_pll_veml_tracking_fpga::acquire_secondary()
{ {
// ******* preamble correlation ******** // ******* preamble correlation ********
int32_t corr_value = 0; int32_t corr_value = 0;
for (uint32_t i = 0; i < d_secondary_code_length; i++) for (uint32_t i = 0; i < d_secondary_code_length; i++)
@@ -596,13 +590,11 @@ bool dll_pll_veml_tracking_fpga::acquire_secondary()
{ {
return false; return false;
} }
} }
bool dll_pll_veml_tracking_fpga::cn0_and_tracking_lock_status(double coh_integration_time_s) bool dll_pll_veml_tracking_fpga::cn0_and_tracking_lock_status(double coh_integration_time_s)
{ {
// ####### CN0 ESTIMATION AND LOCK DETECTORS ###### // ####### CN0 ESTIMATION AND LOCK DETECTORS ######
if (d_cn0_estimation_counter < trk_parameters.cn0_samples) if (d_cn0_estimation_counter < trk_parameters.cn0_samples)
@@ -642,7 +634,6 @@ bool dll_pll_veml_tracking_fpga::cn0_and_tracking_lock_status(double coh_integra
return true; return true;
} }
} }
} }
@@ -654,8 +645,7 @@ bool dll_pll_veml_tracking_fpga::cn0_and_tracking_lock_status(double coh_integra
//void dll_pll_veml_tracking_fpga::do_correlation_step(const gr_complex *input_samples) //void dll_pll_veml_tracking_fpga::do_correlation_step(const gr_complex *input_samples)
void dll_pll_veml_tracking_fpga::do_correlation_step(void) void dll_pll_veml_tracking_fpga::do_correlation_step(void)
{ {
// // ################# CARRIER WIPEOFF AND CORRELATORS ##############################
// // ################# CARRIER WIPEOFF AND CORRELATORS ##############################
multicorrelator_fpga->Carrier_wipeoff_multicorrelator_resampler( multicorrelator_fpga->Carrier_wipeoff_multicorrelator_resampler(
d_rem_carr_phase_rad, d_rem_carr_phase_rad,
@@ -664,15 +654,11 @@ void dll_pll_veml_tracking_fpga::do_correlation_step(void)
static_cast<float>(d_code_phase_step_chips) * static_cast<float>(d_code_samples_per_chip), static_cast<float>(d_code_phase_step_chips) * static_cast<float>(d_code_samples_per_chip),
static_cast<float>(d_code_phase_rate_step_chips) * static_cast<float>(d_code_samples_per_chip), static_cast<float>(d_code_phase_rate_step_chips) * static_cast<float>(d_code_samples_per_chip),
d_current_prn_length_samples); d_current_prn_length_samples);
} }
void dll_pll_veml_tracking_fpga::run_dll_pll() void dll_pll_veml_tracking_fpga::run_dll_pll()
{ {
// ################## PLL ########################################################## // ################## PLL ##########################################################
// PLL discriminator // PLL discriminator
if (d_cloop) if (d_cloop)
@@ -707,13 +693,11 @@ void dll_pll_veml_tracking_fpga::run_dll_pll()
// New code Doppler frequency estimation // New code Doppler frequency estimation
d_code_freq_chips = (1.0 + (d_carrier_doppler_hz / d_signal_carrier_freq)) * d_code_chip_rate - d_code_error_filt_chips; d_code_freq_chips = (1.0 + (d_carrier_doppler_hz / d_signal_carrier_freq)) * d_code_chip_rate - d_code_error_filt_chips;
} }
void dll_pll_veml_tracking_fpga::clear_tracking_vars() void dll_pll_veml_tracking_fpga::clear_tracking_vars()
{ {
std::fill_n(d_correlator_outs, d_n_correlator_taps, gr_complex(0.0, 0.0)); std::fill_n(d_correlator_outs, d_n_correlator_taps, gr_complex(0.0, 0.0));
if (trk_parameters.track_pilot) d_Prompt_Data[0] = gr_complex(0.0, 0.0); if (trk_parameters.track_pilot) d_Prompt_Data[0] = gr_complex(0.0, 0.0);
d_carr_error_hz = 0.0; d_carr_error_hz = 0.0;
@@ -727,13 +711,11 @@ void dll_pll_veml_tracking_fpga::clear_tracking_vars()
d_code_phase_rate_step_chips = 0.0; d_code_phase_rate_step_chips = 0.0;
d_carr_ph_history.clear(); d_carr_ph_history.clear();
d_code_ph_history.clear(); d_code_ph_history.clear();
} }
void dll_pll_veml_tracking_fpga::update_tracking_vars() void dll_pll_veml_tracking_fpga::update_tracking_vars()
{ {
T_chip_seconds = 1.0 / d_code_freq_chips; T_chip_seconds = 1.0 / d_code_freq_chips;
T_prn_seconds = T_chip_seconds * static_cast<double>(d_code_length_chips); T_prn_seconds = T_chip_seconds * static_cast<double>(d_code_length_chips);
@@ -800,13 +782,11 @@ void dll_pll_veml_tracking_fpga::update_tracking_vars()
// remnant code phase [chips] // remnant code phase [chips]
d_rem_code_phase_samples = K_blk_samples - static_cast<double>(d_current_prn_length_samples); // rounding error < 1 sample d_rem_code_phase_samples = K_blk_samples - static_cast<double>(d_current_prn_length_samples); // rounding error < 1 sample
d_rem_code_phase_chips = d_code_freq_chips * d_rem_code_phase_samples / trk_parameters.fs_in; d_rem_code_phase_chips = d_code_freq_chips * d_rem_code_phase_samples / trk_parameters.fs_in;
} }
void dll_pll_veml_tracking_fpga::save_correlation_results() void dll_pll_veml_tracking_fpga::save_correlation_results()
{ {
if (d_secondary) if (d_secondary)
{ {
if (d_secondary_code_string->at(d_current_symbol) == '0') if (d_secondary_code_string->at(d_current_symbol) == '0')
@@ -853,13 +833,11 @@ void dll_pll_veml_tracking_fpga::save_correlation_results()
d_cloop = false; d_cloop = false;
else else
d_cloop = true; d_cloop = true;
} }
void dll_pll_veml_tracking_fpga::log_data(bool integrating) void dll_pll_veml_tracking_fpga::log_data(bool integrating)
{ {
if (d_dump) if (d_dump)
{ {
// Dump results to file // Dump results to file
@@ -980,13 +958,11 @@ void dll_pll_veml_tracking_fpga::log_data(bool integrating)
LOG(WARNING) << "Exception writing trk dump file " << e.what(); LOG(WARNING) << "Exception writing trk dump file " << e.what();
} }
} }
} }
int32_t dll_pll_veml_tracking_fpga::save_matfile() int32_t dll_pll_veml_tracking_fpga::save_matfile()
{ {
// READ DUMP FILE // READ DUMP FILE
std::ifstream::pos_type size; std::ifstream::pos_type size;
int32_t number_of_double_vars = 1; int32_t number_of_double_vars = 1;
@@ -1228,13 +1204,11 @@ int32_t dll_pll_veml_tracking_fpga::save_matfile()
delete[] aux2; delete[] aux2;
delete[] PRN; delete[] PRN;
return 0; return 0;
} }
void dll_pll_veml_tracking_fpga::set_channel(uint32_t channel) void dll_pll_veml_tracking_fpga::set_channel(uint32_t channel)
{ {
d_channel = channel; d_channel = channel;
multicorrelator_fpga->set_channel(d_channel); multicorrelator_fpga->set_channel(d_channel);
LOG(INFO) << "Tracking Channel set to " << d_channel; LOG(INFO) << "Tracking Channel set to " << d_channel;
@@ -1261,7 +1235,6 @@ void dll_pll_veml_tracking_fpga::set_channel(uint32_t channel)
} }
} }
} }
} }
@@ -1279,8 +1252,6 @@ void dll_pll_veml_tracking_fpga::stop_tracking()
int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((unused)), gr_vector_int &ninput_items, int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((unused)), gr_vector_int &ninput_items,
gr_vector_const_void_star &input_items, gr_vector_void_star &output_items) gr_vector_const_void_star &input_items, gr_vector_void_star &output_items)
{ {
Gnss_Synchro **out = reinterpret_cast<Gnss_Synchro **>(&output_items[0]); Gnss_Synchro **out = reinterpret_cast<Gnss_Synchro **>(&output_items[0]);
Gnss_Synchro current_synchro_data = Gnss_Synchro(); Gnss_Synchro current_synchro_data = Gnss_Synchro();
@@ -1317,7 +1288,7 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
{ {
// test mode // test mode
acq_trk_diff_samples = - static_cast<int64_t>(counter_value) + static_cast<int64_t>(d_acq_sample_stamp); acq_trk_diff_samples = -static_cast<int64_t>(counter_value) + static_cast<int64_t>(d_acq_sample_stamp);
acq_trk_diff_seconds = static_cast<double>(acq_trk_diff_samples) / trk_parameters.fs_in; acq_trk_diff_seconds = static_cast<double>(acq_trk_diff_samples) / trk_parameters.fs_in;
delta_trk_to_acq_prn_start_samples = static_cast<double>(acq_trk_diff_samples) + d_acq_code_phase_samples; delta_trk_to_acq_prn_start_samples = static_cast<double>(acq_trk_diff_samples) + d_acq_code_phase_samples;
@@ -1359,7 +1330,6 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
// start the first tracking process // start the first tracking process
run_state_2(current_synchro_data); run_state_2(current_synchro_data);
break; break;
} }
case 2: // Wide tracking and symbol synchronization case 2: // Wide tracking and symbol synchronization
{ {
@@ -1678,7 +1648,6 @@ void dll_pll_veml_tracking_fpga::run_state_2(Gnss_Synchro &current_synchro_data)
} }
} }
} }
} }

View File

@@ -44,7 +44,6 @@
#include <map> #include <map>
#include <queue> #include <queue>
#include <utility> #include <utility>
#include <boost/circular_buffer.hpp>
//#include <string> //#include <string>
class dll_pll_veml_tracking_fpga; class dll_pll_veml_tracking_fpga;

View File

@@ -35,21 +35,20 @@
*/ */
#include "fpga_multicorrelator.h" #include "fpga_multicorrelator.h"
#include <cmath> #include <glog/logging.h>
#include <new>
#include <cerrno>
#include <cstdio>
#include <fcntl.h>
#include <unistd.h>
#include <cassert> #include <cassert>
#include <cerrno>
#include <cmath>
#include <csignal>
#include <cstdint> #include <cstdint>
#include <cstdio>
#include <cstdlib>
#include <fcntl.h>
#include <new>
#include <string>
#include <sys/mman.h>
#include <sys/stat.h> #include <sys/stat.h>
#include <unistd.h> #include <unistd.h>
#include <csignal>
#include <cstdlib>
#include <sys/mman.h>
#include <glog/logging.h>
#include <string>
#include <utility> #include <utility>
// FPGA register access constants // FPGA register access constants
@@ -68,9 +67,6 @@
#define TEST_REGISTER_TRACK_WRITEVAL 0x55AA #define TEST_REGISTER_TRACK_WRITEVAL 0x55AA
uint64_t fpga_multicorrelator_8sc::read_sample_counter() uint64_t fpga_multicorrelator_8sc::read_sample_counter()
{ {
uint64_t sample_counter_tmp, sample_counter_msw_tmp; uint64_t sample_counter_tmp, sample_counter_msw_tmp;
@@ -294,7 +290,6 @@ void fpga_multicorrelator_8sc::fpga_configure_tracking_gps_local_code(int32_t PR
} }
if (d_track_pilot) if (d_track_pilot)
{ {
d_map_base[PROG_MEMS_ADDR] = LOCAL_CODE_FPGA_CLEAR_ADDRESS_COUNTER; d_map_base[PROG_MEMS_ADDR] = LOCAL_CODE_FPGA_CLEAR_ADDRESS_COUNTER;
for (k = 0; k < d_code_length_chips * d_code_samples_per_chip; k++) for (k = 0; k < d_code_length_chips * d_code_samples_per_chip; k++)
{ {
@@ -410,7 +405,6 @@ void fpga_multicorrelator_8sc::fpga_compute_signal_parameters_in_fpga(void)
{ {
d_phase_step_rad_int = -d_phase_step_rad_int; d_phase_step_rad_int = -d_phase_step_rad_int;
} }
} }
@@ -481,4 +475,3 @@ void fpga_multicorrelator_8sc::lock_channel(void)
// lock the channel for processing // lock the channel for processing
d_map_base[DROP_SAMPLES_REG_ADDR] = 0; // lock the channel d_map_base[DROP_SAMPLES_REG_ADDR] = 0; // lock the channel
} }

View File

@@ -66,7 +66,6 @@
#define SAMPLE_COUNTER_REG_ADDR_MSW 14 #define SAMPLE_COUNTER_REG_ADDR_MSW 14
/*! /*!
* \brief Class that implements carrier wipe-off and correlators. * \brief Class that implements carrier wipe-off and correlators.
*/ */
@@ -144,7 +143,6 @@ private:
void fpga_launch_multicorrelator_fpga(void); void fpga_launch_multicorrelator_fpga(void);
void read_tracking_gps_results(void); void read_tracking_gps_results(void);
void close_device(void); void close_device(void);
}; };
#endif /* GNSS_SDR_FPGA_MULTICORRELATOR_H_ */ #endif /* GNSS_SDR_FPGA_MULTICORRELATOR_H_ */

View File

@@ -275,7 +275,7 @@ int ControlThread::run()
#ifdef ENABLE_FPGA #ifdef ENABLE_FPGA
// Create a task for the acquisition such that id doesn't block the flow of the control thread // Create a task for the acquisition such that id doesn't block the flow of the control thread
fpga_helper_thread_=boost::thread(&GNSSFlowgraph::start_acquisition_helper, fpga_helper_thread_ = boost::thread(&GNSSFlowgraph::start_acquisition_helper,
flowgraph_); flowgraph_);
#endif #endif
// Main loop to read and process the control messages // Main loop to read and process the control messages

View File

@@ -168,16 +168,16 @@ private:
bool delete_configuration_; bool delete_configuration_;
unsigned int processed_control_messages_; unsigned int processed_control_messages_;
unsigned int applied_actions_; unsigned int applied_actions_;
//<<<<<<< HEAD //<<<<<<< HEAD
// boost::thread keyboard_thread_; // boost::thread keyboard_thread_;
// boost::thread sysv_queue_thread_; // boost::thread sysv_queue_thread_;
// boost::thread gps_acq_assist_data_collector_thread_; // boost::thread gps_acq_assist_data_collector_thread_;
boost::thread fpga_helper_thread_; boost::thread fpga_helper_thread_;
//======= //=======
std::thread keyboard_thread_; std::thread keyboard_thread_;
std::thread sysv_queue_thread_; std::thread sysv_queue_thread_;
std::thread gps_acq_assist_data_collector_thread_; std::thread gps_acq_assist_data_collector_thread_;
//>>>>>>> 4fe976ba016fa9c1c64ece88b26a9a93d93a84f4 //>>>>>>> 4fe976ba016fa9c1c64ece88b26a9a93d93a84f4
void keyboard_listener(); void keyboard_listener();
void sysv_queue_listener(); void sysv_queue_listener();

View File

@@ -306,7 +306,6 @@ void GNSSFlowgraph::connect()
} }
else else
{ {
//create a hardware-defined gnss_synchro pulse for the observables block //create a hardware-defined gnss_synchro pulse for the observables block
try try
{ {
@@ -362,7 +361,6 @@ void GNSSFlowgraph::connect()
uint32_t fs = configuration_->property("GNSS-SDR.internal_fs_sps", 0); uint32_t fs = configuration_->property("GNSS-SDR.internal_fs_sps", 0);
for (unsigned int i = 0; i < channels_count_; i++) for (unsigned int i = 0; i < channels_count_; i++)
{ {
#ifndef ENABLE_FPGA #ifndef ENABLE_FPGA
if (configuration_->property(sig_source_.at(0)->role() + ".enable_FPGA", false) == false) if (configuration_->property(sig_source_.at(0)->role() + ".enable_FPGA", false) == false)
{ {
@@ -1133,7 +1131,7 @@ void GNSSFlowgraph::apply_action(unsigned int who, unsigned int what)
channels_[ch_index]->start_acquisition(); channels_[ch_index]->start_acquisition();
#else #else
// create a task for the FPGA such that it doesn't stop the flow // create a task for the FPGA such that it doesn't stop the flow
std::thread tmp_thread(&ChannelInterface::start_acquisition,channels_[ch_index]); std::thread tmp_thread(&ChannelInterface::start_acquisition, channels_[ch_index]);
tmp_thread.detach(); tmp_thread.detach();
#endif #endif
} }
@@ -1210,7 +1208,7 @@ void GNSSFlowgraph::apply_action(unsigned int who, unsigned int what)
channels_[i]->start_acquisition(); channels_[i]->start_acquisition();
#else #else
// create a task for the FPGA such that it doesn't stop the flow // create a task for the FPGA such that it doesn't stop the flow
std::thread tmp_thread(&ChannelInterface::start_acquisition,channels_[i]); std::thread tmp_thread(&ChannelInterface::start_acquisition, channels_[i]);
tmp_thread.detach(); tmp_thread.detach();
#endif #endif
} }
@@ -1231,7 +1229,7 @@ void GNSSFlowgraph::apply_action(unsigned int who, unsigned int what)
channels_[who]->start_acquisition(); channels_[who]->start_acquisition();
#else #else
// create a task for the FPGA such that it doesn't stop the flow // create a task for the FPGA such that it doesn't stop the flow
std::thread tmp_thread(&ChannelInterface::start_acquisition,channels_[who]); std::thread tmp_thread(&ChannelInterface::start_acquisition, channels_[who]);
tmp_thread.detach(); tmp_thread.detach();
#endif #endif
} }
@@ -1366,7 +1364,7 @@ void GNSSFlowgraph::apply_action(unsigned int who, unsigned int what)
channels_[ch_index]->start_acquisition(); channels_[ch_index]->start_acquisition();
#else #else
// create a task for the FPGA such that it doesn't stop the flow // create a task for the FPGA such that it doesn't stop the flow
std::thread tmp_thread(&ChannelInterface::start_acquisition,channels_[ch_index]); std::thread tmp_thread(&ChannelInterface::start_acquisition, channels_[ch_index]);
tmp_thread.detach(); tmp_thread.detach();
#endif #endif
} }
@@ -1400,7 +1398,7 @@ void GNSSFlowgraph::apply_action(unsigned int who, unsigned int what)
channels_[ch_index]->start_acquisition(); channels_[ch_index]->start_acquisition();
#else #else
// create a task for the FPGA such that it doesn't stop the flow // create a task for the FPGA such that it doesn't stop the flow
std::thread tmp_thread(&ChannelInterface::start_acquisition,channels_[ch_index]); std::thread tmp_thread(&ChannelInterface::start_acquisition, channels_[ch_index]);
tmp_thread.detach(); tmp_thread.detach();
#endif #endif
} }
@@ -1435,7 +1433,7 @@ void GNSSFlowgraph::apply_action(unsigned int who, unsigned int what)
channels_[ch_index]->start_acquisition(); channels_[ch_index]->start_acquisition();
#else #else
// create a task for the FPGA such that it doesn't stop the flow // create a task for the FPGA such that it doesn't stop the flow
std::thread tmp_thread(&ChannelInterface::start_acquisition,channels_[ch_index]); std::thread tmp_thread(&ChannelInterface::start_acquisition, channels_[ch_index]);
tmp_thread.detach(); tmp_thread.detach();
#endif #endif
} }
@@ -1531,15 +1529,12 @@ void GNSSFlowgraph::start_acquisition_helper()
} }
void GNSSFlowgraph::perform_hw_reset() void GNSSFlowgraph::perform_hw_reset()
{ {
// a stop acquisition command causes the SW to reset the HW // a stop acquisition command causes the SW to reset the HW
std::shared_ptr<Channel> channel_ptr; std::shared_ptr<Channel> channel_ptr;
channel_ptr = std::dynamic_pointer_cast<Channel>(channels_.at(0)); channel_ptr = std::dynamic_pointer_cast<Channel>(channels_.at(0));
channel_ptr->acquisition()->stop_acquisition(); channel_ptr->acquisition()->stop_acquisition();
} }
#endif #endif

View File

@@ -30,49 +30,49 @@
* ------------------------------------------------------------------------- * -------------------------------------------------------------------------
*/ */
#include <unistd.h> #include "GPS_L1_CA.h"
#include <chrono> #include "gnss_block_factory.h"
#include <exception> #include "gnss_block_interface.h"
#include "gnss_satellite.h"
#include "gnss_sdr_fpga_sample_counter.h"
#include "gnss_synchro.h"
#include "gnuplot_i.h"
#include "gps_l1_ca_dll_pll_tracking.h"
#include "gps_l1_ca_dll_pll_tracking_fpga.h"
#include "gps_l1_ca_telemetry_decoder.h"
#include "hybrid_observables.h"
#include "in_memory_configuration.h"
#include "observable_tests_flags.h"
#include "observables_dump_reader.h"
#include "signal_generator_flags.h"
#include "telemetry_decoder_interface.h"
#include "test_flags.h"
#include "tlm_dump_reader.h"
#include "tracking_dump_reader.h"
#include "tracking_interface.h"
#include "tracking_tests_flags.h"
#include "tracking_true_obs_reader.h"
#include "true_observables_reader.h"
#include <armadillo> #include <armadillo>
#include <gnuradio/top_block.h>
#include <gnuradio/blocks/file_source.h> #include <gnuradio/blocks/file_source.h>
#include <gnuradio/blocks/interleaved_char_to_complex.h> #include <gnuradio/blocks/interleaved_char_to_complex.h>
#include <gnuradio/blocks/null_sink.h> #include <gnuradio/blocks/null_sink.h>
#include <gtest/gtest.h> #include <gnuradio/top_block.h>
#include <gpstk/RinexUtilities.hpp>
#include <gpstk/Rinex3ObsBase.hpp> #include <gpstk/Rinex3ObsBase.hpp>
#include <gpstk/Rinex3ObsData.hpp> #include <gpstk/Rinex3ObsData.hpp>
#include <gpstk/Rinex3ObsHeader.hpp> #include <gpstk/Rinex3ObsHeader.hpp>
#include <gpstk/Rinex3ObsStream.hpp> #include <gpstk/Rinex3ObsStream.hpp>
#include <gpstk/RinexUtilities.hpp>
#include <gtest/gtest.h>
#include <matio.h> #include <matio.h>
#include "GPS_L1_CA.h" #include <chrono>
#include "gnss_satellite.h" #include <exception>
#include "gnss_block_factory.h" #include <unistd.h>
#include "gnss_block_interface.h"
#include "tracking_interface.h"
#include "telemetry_decoder_interface.h"
#include "in_memory_configuration.h"
#include "gnss_synchro.h"
#include "gps_l1_ca_telemetry_decoder.h"
#include "tracking_true_obs_reader.h"
#include "true_observables_reader.h"
#include "tracking_dump_reader.h"
#include "observables_dump_reader.h"
#include "tlm_dump_reader.h"
#include "gps_l1_ca_dll_pll_tracking.h"
#include "gps_l1_ca_dll_pll_tracking_fpga.h"
#include "hybrid_observables.h"
#include "signal_generator_flags.h"
#include "gnss_sdr_fpga_sample_counter.h"
#include "test_flags.h"
#include "tracking_tests_flags.h"
#include "observable_tests_flags.h"
#include "gnuplot_i.h"
// threads // threads
#include <pthread.h> // for pthread stuff
#include <fcntl.h> // for open, O_RDWR, O_SYNC #include <fcntl.h> // for open, O_RDWR, O_SYNC
#include <iostream> // for cout, endl #include <iostream> // for cout, endl
#include <pthread.h> // for pthread stuff
#include <sys/mman.h> // for mmap #include <sys/mman.h> // for mmap
#define TEST_OBS_MAX_INPUT_COMPLEX_SAMPLES_TOTAL 8192 // maximum DMA sample block size in complex samples #define TEST_OBS_MAX_INPUT_COMPLEX_SAMPLES_TOTAL 8192 // maximum DMA sample block size in complex samples
@@ -316,16 +316,17 @@ const unsigned int TEST_OBS_TEST_REGISTER_TRACK_WRITEVAL = 0x55AA;
void setup_fpga_switch_obs_test(void) void setup_fpga_switch_obs_test(void)
{ {
int switch_device_descriptor; // driver descriptor int switch_device_descriptor; // driver descriptor
volatile unsigned *switch_map_base; // driver memory map volatile unsigned* switch_map_base; // driver memory map
if ((switch_device_descriptor = open("/dev/uio1", O_RDWR | O_SYNC)) == -1) if ((switch_device_descriptor = open("/dev/uio1", O_RDWR | O_SYNC)) == -1)
{ {
LOG(WARNING) << "Cannot open deviceio" << "/dev/uio1"; LOG(WARNING) << "Cannot open deviceio"
<< "/dev/uio1";
} }
switch_map_base = reinterpret_cast<volatile unsigned *>(mmap(nullptr, TEST_OBS_PAGE_SIZE, switch_map_base = reinterpret_cast<volatile unsigned*>(mmap(nullptr, TEST_OBS_PAGE_SIZE,
PROT_READ | PROT_WRITE, MAP_SHARED, switch_device_descriptor, 0)); PROT_READ | PROT_WRITE, MAP_SHARED, switch_device_descriptor, 0));
if (switch_map_base == reinterpret_cast<void *>(-1)) if (switch_map_base == reinterpret_cast<void*>(-1))
{ {
LOG(WARNING) << "Cannot map the FPGA switch module into tracking memory"; LOG(WARNING) << "Cannot map the FPGA switch module into tracking memory";
std::cout << "Could not map switch memory." << std::endl; std::cout << "Could not map switch memory." << std::endl;
@@ -356,22 +357,22 @@ static pthread_mutex_t mutex_obs_test = PTHREAD_MUTEX_INITIALIZER;
volatile unsigned int send_samples_start_obs_test = 0; volatile unsigned int send_samples_start_obs_test = 0;
int8_t input_samples_obs_test[TEST_OBS_MAX_INPUT_COMPLEX_SAMPLES_TOTAL*TEST_OBS_COMPLEX_SAMPLE_SIZE]; // re - im int8_t input_samples_obs_test[TEST_OBS_MAX_INPUT_COMPLEX_SAMPLES_TOTAL * TEST_OBS_COMPLEX_SAMPLE_SIZE]; // re - im
int8_t input_samples_dma_obs_test[TEST_OBS_MAX_INPUT_COMPLEX_SAMPLES_TOTAL*TEST_OBS_COMPLEX_SAMPLE_SIZE*TEST_OBS_NUM_QUEUES]; int8_t input_samples_dma_obs_test[TEST_OBS_MAX_INPUT_COMPLEX_SAMPLES_TOTAL * TEST_OBS_COMPLEX_SAMPLE_SIZE * TEST_OBS_NUM_QUEUES];
struct DMA_handler_args_obs_test { struct DMA_handler_args_obs_test
{
std::string file; std::string file;
unsigned int nsamples_tx; unsigned int nsamples_tx;
unsigned int skip_used_samples; unsigned int skip_used_samples;
unsigned int freq_band; // 0 for GPS L1/ Galileo E1, 1 for GPS L5/Galileo E5 unsigned int freq_band; // 0 for GPS L1/ Galileo E1, 1 for GPS L5/Galileo E5
}; };
void *handler_DMA_obs_test(void *arguments) void* handler_DMA_obs_test(void* arguments)
{ {
// DMA process that configures the DMA to send the samples to the acquisition engine // DMA process that configures the DMA to send the samples to the acquisition engine
int tx_fd; // DMA descriptor int tx_fd; // DMA descriptor
FILE *rx_signal_file_id; // Input file descriptor FILE* rx_signal_file_id; // Input file descriptor
bool file_completed = false; // flag to indicate if the file is completed bool file_completed = false; // flag to indicate if the file is completed
unsigned int nsamples_block; // number of samples to send in the next DMA block of samples unsigned int nsamples_block; // number of samples to send in the next DMA block of samples
unsigned int nread_elements; // number of elements effectively read from the input file unsigned int nread_elements; // number of elements effectively read from the input file
@@ -380,7 +381,7 @@ void *handler_DMA_obs_test(void *arguments)
unsigned int nsamples_transmitted; unsigned int nsamples_transmitted;
struct DMA_handler_args *args = (struct DMA_handler_args *) arguments; struct DMA_handler_args* args = (struct DMA_handler_args*)arguments;
unsigned int nsamples_tx = args->nsamples_tx; unsigned int nsamples_tx = args->nsamples_tx;
std::string file = args->file; // input filename std::string file = args->file; // input filename
@@ -388,7 +389,7 @@ void *handler_DMA_obs_test(void *arguments)
// open DMA device // open DMA device
tx_fd = open("/dev/loop_tx", O_WRONLY); tx_fd = open("/dev/loop_tx", O_WRONLY);
if ( tx_fd < 0 ) if (tx_fd < 0)
{ {
std::cout << "DMA can't open loop device" << std::endl; std::cout << "DMA can't open loop device" << std::endl;
exit(1); exit(1);
@@ -402,11 +403,12 @@ void *handler_DMA_obs_test(void *arguments)
std::cout << "DMA can't open input file" << std::endl; std::cout << "DMA can't open input file" << std::endl;
exit(1); exit(1);
} }
while(send_samples_start_obs_test == 0); // wait until acquisition starts while (send_samples_start_obs_test == 0)
; // wait until acquisition starts
// skip initial samples // skip initial samples
int skip_samples = (int) FLAGS_skip_samples; int skip_samples = (int)FLAGS_skip_samples;
fseek( rx_signal_file_id, (skip_samples + skip_used_samples)*2, SEEK_SET ); fseek(rx_signal_file_id, (skip_samples + skip_used_samples) * 2, SEEK_SET);
usleep(50000); // wait some time to give time to the main thread to start the acquisition module usleep(50000); // wait some time to give time to the main thread to start the acquisition module
@@ -422,7 +424,7 @@ void *handler_DMA_obs_test(void *arguments)
file_completed = true; file_completed = true;
} }
nread_elements = fread(input_samples_obs_test, sizeof(int8_t), nsamples_block*TEST_OBS_COMPLEX_SAMPLE_SIZE, rx_signal_file_id); nread_elements = fread(input_samples_obs_test, sizeof(int8_t), nsamples_block * TEST_OBS_COMPLEX_SAMPLE_SIZE, rx_signal_file_id);
if (nread_elements != nsamples_block * TEST_OBS_COMPLEX_SAMPLE_SIZE) if (nread_elements != nsamples_block * TEST_OBS_COMPLEX_SAMPLE_SIZE)
{ {
@@ -430,36 +432,36 @@ void *handler_DMA_obs_test(void *arguments)
file_completed = true; file_completed = true;
} }
nsamples+=(nread_elements/TEST_OBS_COMPLEX_SAMPLE_SIZE); nsamples += (nread_elements / TEST_OBS_COMPLEX_SAMPLE_SIZE);
if (nread_elements > 0) if (nread_elements > 0)
{ {
// for the 32-BIT DMA // for the 32-BIT DMA
dma_index = 0; dma_index = 0;
for (index0 = 0;index0 < (nread_elements);index0+=TEST_OBS_COMPLEX_SAMPLE_SIZE) for (index0 = 0; index0 < (nread_elements); index0 += TEST_OBS_COMPLEX_SAMPLE_SIZE)
{ {
if (args->freq_band == 0) if (args->freq_band == 0)
{ {
// channel 1 (queue 1) -> E5/L5 // channel 1 (queue 1) -> E5/L5
input_samples_dma_obs_test[dma_index] = 0; input_samples_dma_obs_test[dma_index] = 0;
input_samples_dma_obs_test[dma_index+1] = 0; input_samples_dma_obs_test[dma_index + 1] = 0;
// channel 0 (queue 0) -> E1/L1 // channel 0 (queue 0) -> E1/L1
input_samples_dma_obs_test[dma_index+2] = input_samples_obs_test[index0]; input_samples_dma_obs_test[dma_index + 2] = input_samples_obs_test[index0];
input_samples_dma_obs_test[dma_index+3] = input_samples_obs_test[index0+1]; input_samples_dma_obs_test[dma_index + 3] = input_samples_obs_test[index0 + 1];
} }
else else
{ {
// channel 1 (queue 1) -> E5/L5 // channel 1 (queue 1) -> E5/L5
input_samples_dma_obs_test[dma_index] = input_samples_obs_test[index0]; input_samples_dma_obs_test[dma_index] = input_samples_obs_test[index0];
input_samples_dma_obs_test[dma_index+1] = input_samples_obs_test[index0+1]; input_samples_dma_obs_test[dma_index + 1] = input_samples_obs_test[index0 + 1];
// channel 0 (queue 0) -> E1/L1 // channel 0 (queue 0) -> E1/L1
input_samples_dma_obs_test[dma_index+2] = 0; input_samples_dma_obs_test[dma_index + 2] = 0;
input_samples_dma_obs_test[dma_index+3] = 0; input_samples_dma_obs_test[dma_index + 3] = 0;
} }
dma_index += 4; dma_index += 4;
} }
nsamples_transmitted = write(tx_fd, &input_samples_dma_obs_test[0], nread_elements*TEST_OBS_NUM_QUEUES); nsamples_transmitted = write(tx_fd, &input_samples_dma_obs_test[0], nread_elements * TEST_OBS_NUM_QUEUES);
if (nsamples_transmitted != nread_elements*TEST_OBS_NUM_QUEUES) if (nsamples_transmitted != nread_elements * TEST_OBS_NUM_QUEUES)
{ {
std::cout << "Error : DMA could not send all the requested samples" << std::endl; std::cout << "Error : DMA could not send all the requested samples" << std::endl;
} }
@@ -470,13 +472,11 @@ void *handler_DMA_obs_test(void *arguments)
close(tx_fd); close(tx_fd);
fclose(rx_signal_file_id); fclose(rx_signal_file_id);
return NULL; return NULL;
} }
bool HybridObservablesTestFpga::acquire_signal() bool HybridObservablesTestFpga::acquire_signal()
{ {
pthread_t thread_DMA; pthread_t thread_DMA;
// 1. Setup GNU Radio flowgraph (file_source -> Acquisition_10m) // 1. Setup GNU Radio flowgraph (file_source -> Acquisition_10m)
@@ -508,7 +508,6 @@ bool HybridObservablesTestFpga::acquire_signal()
args.freq_band = 0; args.freq_band = 0;
acquisition = std::make_shared<GpsL1CaPcpsAcquisitionFpga>(config.get(), "Acquisition", 0, 0); acquisition = std::make_shared<GpsL1CaPcpsAcquisitionFpga>(config.get(), "Acquisition", 0, 0);
} }
else if (implementation.compare("Galileo_E1_DLL_PLL_VEML_Tracking_Fpga") == 0) else if (implementation.compare("Galileo_E1_DLL_PLL_VEML_Tracking_Fpga") == 0)
{ {
@@ -521,7 +520,6 @@ bool HybridObservablesTestFpga::acquire_signal()
args.freq_band = 0; args.freq_band = 0;
acquisition = std::make_shared<GalileoE1PcpsAmbiguousAcquisitionFpga>(config.get(), "Acquisition", 0, 0); acquisition = std::make_shared<GalileoE1PcpsAmbiguousAcquisitionFpga>(config.get(), "Acquisition", 0, 0);
} }
else if (implementation.compare("Galileo_E5a_DLL_PLL_Tracking_Fpga") == 0) else if (implementation.compare("Galileo_E5a_DLL_PLL_Tracking_Fpga") == 0)
@@ -535,7 +533,6 @@ bool HybridObservablesTestFpga::acquire_signal()
args.freq_band = 1; args.freq_band = 1;
acquisition = std::make_shared<GalileoE5aPcpsAcquisitionFpga>(config.get(), "Acquisition", 0, 0); acquisition = std::make_shared<GalileoE5aPcpsAcquisitionFpga>(config.get(), "Acquisition", 0, 0);
} }
else if (implementation.compare("GPS_L5_DLL_PLL_Tracking_Fpga") == 0) else if (implementation.compare("GPS_L5_DLL_PLL_Tracking_Fpga") == 0)
{ {
@@ -548,7 +545,6 @@ bool HybridObservablesTestFpga::acquire_signal()
args.freq_band = 1; args.freq_band = 1;
acquisition = std::make_shared<GpsL5iPcpsAcquisitionFpga>(config.get(), "Acquisition", 0, 0); acquisition = std::make_shared<GpsL5iPcpsAcquisitionFpga>(config.get(), "Acquisition", 0, 0);
} }
else else
{ {
@@ -625,10 +621,8 @@ bool HybridObservablesTestFpga::acquire_signal()
int acq_doppler_step = config->property("Acquisition.doppler_step", FLAGS_external_signal_acquisition_doppler_step_hz); int acq_doppler_step = config->property("Acquisition.doppler_step", FLAGS_external_signal_acquisition_doppler_step_hz);
for (unsigned int PRN = 1; PRN < MAX_PRN_IDX; PRN++) for (unsigned int PRN = 1; PRN < MAX_PRN_IDX; PRN++)
{ {
tmp_gnss_synchro.PRN = PRN; tmp_gnss_synchro.PRN = PRN;
acquisition->stop_acquisition(); // reset the whole system including the sample counters acquisition->stop_acquisition(); // reset the whole system including the sample counters
@@ -645,12 +639,11 @@ bool HybridObservablesTestFpga::acquire_signal()
if ((implementation.compare("GPS_L1_CA_DLL_PLL_Tracking_Fpga") == 0) or (implementation.compare("Galileo_E1_DLL_PLL_VEML_Tracking_Fpga") == 0)) if ((implementation.compare("GPS_L1_CA_DLL_PLL_Tracking_Fpga") == 0) or (implementation.compare("Galileo_E1_DLL_PLL_VEML_Tracking_Fpga") == 0))
{ {
args.skip_used_samples = -TEST_OBS_DOWNAMPLING_FILTER_INIT_SAMPLES;
args.skip_used_samples = - TEST_OBS_DOWNAMPLING_FILTER_INIT_SAMPLES;
args.nsamples_tx = TEST_OBS_DOWNAMPLING_FILTER_INIT_SAMPLES + TEST_OBS_DOWNSAMPLING_FILTER_DELAY; args.nsamples_tx = TEST_OBS_DOWNAMPLING_FILTER_INIT_SAMPLES + TEST_OBS_DOWNSAMPLING_FILTER_DELAY;
if (pthread_create(&thread_DMA, NULL, handler_DMA_obs_test, (void *)&args) < 0) if (pthread_create(&thread_DMA, NULL, handler_DMA_obs_test, (void*)&args) < 0)
{ {
std::cout << "ERROR cannot create DMA Process" << std::endl; std::cout << "ERROR cannot create DMA Process" << std::endl;
} }
@@ -663,11 +656,9 @@ bool HybridObservablesTestFpga::acquire_signal()
args.nsamples_tx = nsamples_to_transfer; args.nsamples_tx = nsamples_to_transfer;
args.skip_used_samples = TEST_OBS_DOWNSAMPLING_FILTER_DELAY; args.skip_used_samples = TEST_OBS_DOWNSAMPLING_FILTER_DELAY;
} }
else else
{ {
args.nsamples_tx = nsamples_to_transfer; args.nsamples_tx = nsamples_to_transfer;
args.skip_used_samples = 0; args.skip_used_samples = 0;
@@ -675,7 +666,7 @@ bool HybridObservablesTestFpga::acquire_signal()
// create DMA child process // create DMA child process
if (pthread_create(&thread_DMA, NULL, handler_DMA_obs_test, (void *)&args) < 0) if (pthread_create(&thread_DMA, NULL, handler_DMA_obs_test, (void*)&args) < 0)
{ {
std::cout << "ERROR cannot create DMA Process" << std::endl; std::cout << "ERROR cannot create DMA Process" << std::endl;
} }
@@ -708,9 +699,11 @@ bool HybridObservablesTestFpga::acquire_signal()
// however because of the LPF in the GPS L1/Gal E1 acquisition, this calculation is approximate // however because of the LPF in the GPS L1/Gal E1 acquisition, this calculation is approximate
// and some extra samples might be sent. Wait at least once to give time the HW to consume any extra // and some extra samples might be sent. Wait at least once to give time the HW to consume any extra
// sample the DMA might have sent. // sample the DMA might have sent.
do { do
{
usleep(100000); usleep(100000);
} while (msg_rx->rx_message == 0); }
while (msg_rx->rx_message == 0);
if (msg_rx->rx_message == 1) if (msg_rx->rx_message == 1)
{ {
@@ -723,8 +716,6 @@ bool HybridObservablesTestFpga::acquire_signal()
gnss_synchro_vec.push_back(tmp_gnss_synchro); gnss_synchro_vec.push_back(tmp_gnss_synchro);
} }
else else
{ {
@@ -735,10 +726,7 @@ bool HybridObservablesTestFpga::acquire_signal()
top_block->stop(); top_block->stop();
std::cout.flush(); std::cout.flush();
} }
std::cout << "]" << std::endl; std::cout << "]" << std::endl;
std::cout << "-------------------------------------------\n"; std::cout << "-------------------------------------------\n";
@@ -1478,7 +1466,6 @@ bool HybridObservablesTestFpga::ReadRinexObs(std::vector<arma::mat>* obs_vec, Gn
} }
TEST_F(HybridObservablesTestFpga, ValidationOfResults) TEST_F(HybridObservablesTestFpga, ValidationOfResults)
{ {
// pointer to the DMA thread that sends the samples to the acquisition engine // pointer to the DMA thread that sends the samples to the acquisition engine
pthread_t thread_DMA; pthread_t thread_DMA;
@@ -1593,7 +1580,6 @@ TEST_F(HybridObservablesTestFpga, ValidationOfResults)
{ {
acquisition = std::make_shared<GpsL1CaPcpsAcquisitionFpga>(config.get(), "Acquisition", 0, 0); acquisition = std::make_shared<GpsL1CaPcpsAcquisitionFpga>(config.get(), "Acquisition", 0, 0);
args.freq_band = 0; args.freq_band = 0;
} }
else if (implementation.compare("Galileo_E1_DLL_PLL_VEML_Tracking_Fpga") == 0) else if (implementation.compare("Galileo_E1_DLL_PLL_VEML_Tracking_Fpga") == 0)
{ {
@@ -1693,7 +1679,6 @@ TEST_F(HybridObservablesTestFpga, ValidationOfResults)
ch_out_fpga_sample_counter = gnss_sdr_make_fpga_sample_counter(fs, observable_interval_ms); ch_out_fpga_sample_counter = gnss_sdr_make_fpga_sample_counter(fs, observable_interval_ms);
for (unsigned int n = 0; n < tracking_ch_vec.size(); n++) for (unsigned int n = 0; n < tracking_ch_vec.size(); n++)
{ {
//top_block->connect(gr_interleaved_char_to_complex, 0, tracking_ch_vec.at(n)->get_left_block(), 0); //top_block->connect(gr_interleaved_char_to_complex, 0, tracking_ch_vec.at(n)->get_left_block(), 0);
@@ -1705,16 +1690,16 @@ TEST_F(HybridObservablesTestFpga, ValidationOfResults)
//connect sample counter and timmer to the last channel in observables block (extra channel) //connect sample counter and timmer to the last channel in observables block (extra channel)
//top_block->connect(samp_counter, 0, observables->get_left_block(), tracking_ch_vec.size()); //top_block->connect(samp_counter, 0, observables->get_left_block(), tracking_ch_vec.size());
top_block->connect(ch_out_fpga_sample_counter, 0, observables->get_left_block(), tracking_ch_vec.size()); //extra port for the sample counter pulse top_block->connect(ch_out_fpga_sample_counter, 0, observables->get_left_block(), tracking_ch_vec.size()); //extra port for the sample counter pulse
}) << "Failure connecting the blocks."; }) << "Failure connecting the blocks.";
args.file = file; args.file = file;
args.nsamples_tx = baseband_sampling_freq*FLAGS_duration;; args.nsamples_tx = baseband_sampling_freq * FLAGS_duration;
;
args.skip_used_samples = 0; args.skip_used_samples = 0;
if (pthread_create(&thread_DMA, NULL, handler_DMA_obs_test, (void *)&args) < 0) if (pthread_create(&thread_DMA, NULL, handler_DMA_obs_test, (void*)&args) < 0)
{ {
std::cout << "ERROR cannot create DMA Process" << std::endl; std::cout << "ERROR cannot create DMA Process" << std::endl;
} }
@@ -1733,7 +1718,6 @@ TEST_F(HybridObservablesTestFpga, ValidationOfResults)
top_block->start(); top_block->start();
EXPECT_NO_THROW({ EXPECT_NO_THROW({
start = std::chrono::system_clock::now(); start = std::chrono::system_clock::now();
//top_block->run(); // Start threads and wait //top_block->run(); // Start threads and wait
@@ -1758,7 +1742,6 @@ TEST_F(HybridObservablesTestFpga, ValidationOfResults)
// pthread_mutex_unlock(&mutex_obs_test); // pthread_mutex_unlock(&mutex_obs_test);
//check results //check results
// Matrices for storing columnwise true GPS time, Range, Doppler and Carrier phase // Matrices for storing columnwise true GPS time, Range, Doppler and Carrier phase
std::vector<arma::mat> true_obs_vec; std::vector<arma::mat> true_obs_vec;

View File

@@ -32,13 +32,12 @@
#include "GPS_L1_CA.h" #include "GPS_L1_CA.h"
#include "acquisition_msg_rx.h" #include "acquisition_msg_rx.h"
#include "galileo_e1_pcps_ambiguous_acquisition_fpga.h"
#include "galileo_e5a_noncoherent_iq_acquisition_caf.h" #include "galileo_e5a_noncoherent_iq_acquisition_caf.h"
#include "galileo_e5a_pcps_acquisition.h" #include "galileo_e5a_pcps_acquisition.h"
#include "gnss_block_factory.h"
#include "tracking_interface.h"
#include "gps_l1_ca_pcps_acquisition_fpga.h"
#include "galileo_e1_pcps_ambiguous_acquisition_fpga.h"
#include "galileo_e5a_pcps_acquisition_fpga.h" #include "galileo_e5a_pcps_acquisition_fpga.h"
#include "gnss_block_factory.h"
#include "gps_l1_ca_pcps_acquisition_fpga.h"
#include "gps_l5i_pcps_acquisition_fpga.h" #include "gps_l5i_pcps_acquisition_fpga.h"
#include "in_memory_configuration.h" #include "in_memory_configuration.h"
#include "signal_generator_flags.h" #include "signal_generator_flags.h"
@@ -61,9 +60,9 @@
#include <vector> #include <vector>
// threads // threads
#include <pthread.h> // for pthread stuff
#include <fcntl.h> // for open, O_RDWR, O_SYNC #include <fcntl.h> // for open, O_RDWR, O_SYNC
#include <iostream> // for cout, endl #include <iostream> // for cout, endl
#include <pthread.h> // for pthread stuff
#include <sys/mman.h> // for mmap #include <sys/mman.h> // for mmap
#define MAX_INPUT_COMPLEX_SAMPLES_TOTAL 8192 // maximum DMA sample block size in complex samples #define MAX_INPUT_COMPLEX_SAMPLES_TOTAL 8192 // maximum DMA sample block size in complex samples
@@ -316,8 +315,6 @@ void TrackingPullInTestFpga::configure_receiver(
config->set_property("Tracking.early_late_space_chips", "0.5"); config->set_property("Tracking.early_late_space_chips", "0.5");
config->set_property("Tracking.if", "0"); config->set_property("Tracking.if", "0");
config->set_property("Tracking.order", "3"); config->set_property("Tracking.order", "3");
} }
else if (implementation.compare("Galileo_E1_DLL_PLL_VEML_Tracking_Fpga") == 0) else if (implementation.compare("Galileo_E1_DLL_PLL_VEML_Tracking_Fpga") == 0)
{ {
@@ -381,16 +378,17 @@ const unsigned int TEST_REGISTER_TRACK_WRITEVAL = 0x55AA;
void setup_fpga_switch(void) void setup_fpga_switch(void)
{ {
int switch_device_descriptor; // driver descriptor int switch_device_descriptor; // driver descriptor
volatile unsigned *switch_map_base; // driver memory map volatile unsigned* switch_map_base; // driver memory map
if ((switch_device_descriptor = open("/dev/uio1", O_RDWR | O_SYNC)) == -1) if ((switch_device_descriptor = open("/dev/uio1", O_RDWR | O_SYNC)) == -1)
{ {
LOG(WARNING) << "Cannot open deviceio" << "/dev/uio1"; LOG(WARNING) << "Cannot open deviceio"
<< "/dev/uio1";
} }
switch_map_base = reinterpret_cast<volatile unsigned *>(mmap(nullptr, PAGE_SIZE, switch_map_base = reinterpret_cast<volatile unsigned*>(mmap(nullptr, PAGE_SIZE,
PROT_READ | PROT_WRITE, MAP_SHARED, switch_device_descriptor, 0)); PROT_READ | PROT_WRITE, MAP_SHARED, switch_device_descriptor, 0));
if (switch_map_base == reinterpret_cast<void *>(-1)) if (switch_map_base == reinterpret_cast<void*>(-1))
{ {
LOG(WARNING) << "Cannot map the FPGA switch module into tracking memory"; LOG(WARNING) << "Cannot map the FPGA switch module into tracking memory";
std::cout << "Could not map switch memory." << std::endl; std::cout << "Could not map switch memory." << std::endl;
@@ -421,22 +419,22 @@ static pthread_mutex_t mutex = PTHREAD_MUTEX_INITIALIZER;
volatile unsigned int send_samples_start = 0; volatile unsigned int send_samples_start = 0;
int8_t input_samples[MAX_INPUT_COMPLEX_SAMPLES_TOTAL*COMPLEX_SAMPLE_SIZE]; // re - im int8_t input_samples[MAX_INPUT_COMPLEX_SAMPLES_TOTAL * COMPLEX_SAMPLE_SIZE]; // re - im
int8_t input_samples_dma[MAX_INPUT_COMPLEX_SAMPLES_TOTAL*COMPLEX_SAMPLE_SIZE*NUM_QUEUES]; int8_t input_samples_dma[MAX_INPUT_COMPLEX_SAMPLES_TOTAL * COMPLEX_SAMPLE_SIZE * NUM_QUEUES];
struct DMA_handler_args { struct DMA_handler_args
{
std::string file; std::string file;
unsigned int nsamples_tx; unsigned int nsamples_tx;
unsigned int skip_used_samples; unsigned int skip_used_samples;
unsigned int freq_band; // 0 for GPS L1/ Galileo E1, 1 for GPS L5/Galileo E5 unsigned int freq_band; // 0 for GPS L1/ Galileo E1, 1 for GPS L5/Galileo E5
}; };
void *handler_DMA(void *arguments) void* handler_DMA(void* arguments)
{ {
// DMA process that configures the DMA to send the samples to the acquisition engine // DMA process that configures the DMA to send the samples to the acquisition engine
int tx_fd; // DMA descriptor int tx_fd; // DMA descriptor
FILE *rx_signal_file_id; // Input file descriptor FILE* rx_signal_file_id; // Input file descriptor
bool file_completed = false; // flag to indicate if the file is completed bool file_completed = false; // flag to indicate if the file is completed
unsigned int nsamples_block; // number of samples to send in the next DMA block of samples unsigned int nsamples_block; // number of samples to send in the next DMA block of samples
unsigned int nread_elements; // number of elements effectively read from the input file unsigned int nread_elements; // number of elements effectively read from the input file
@@ -445,7 +443,7 @@ void *handler_DMA(void *arguments)
unsigned int nsamples_transmitted; unsigned int nsamples_transmitted;
struct DMA_handler_args *args = (struct DMA_handler_args *) arguments; struct DMA_handler_args* args = (struct DMA_handler_args*)arguments;
unsigned int nsamples_tx = args->nsamples_tx; unsigned int nsamples_tx = args->nsamples_tx;
std::string file = args->file; // input filename std::string file = args->file; // input filename
@@ -453,7 +451,7 @@ void *handler_DMA(void *arguments)
// open DMA device // open DMA device
tx_fd = open("/dev/loop_tx", O_WRONLY); tx_fd = open("/dev/loop_tx", O_WRONLY);
if ( tx_fd < 0 ) if (tx_fd < 0)
{ {
std::cout << "DMA can't open loop device" << std::endl; std::cout << "DMA can't open loop device" << std::endl;
exit(1); exit(1);
@@ -467,12 +465,13 @@ void *handler_DMA(void *arguments)
std::cout << "DMA can't open input file" << std::endl; std::cout << "DMA can't open input file" << std::endl;
exit(1); exit(1);
} }
while(send_samples_start == 0); // wait until main thread tells the DMA to start while (send_samples_start == 0)
; // wait until main thread tells the DMA to start
// skip initial samples // skip initial samples
int skip_samples = (int) FLAGS_skip_samples; int skip_samples = (int)FLAGS_skip_samples;
fseek( rx_signal_file_id, (skip_samples + skip_used_samples)*2, SEEK_SET ); fseek(rx_signal_file_id, (skip_samples + skip_used_samples) * 2, SEEK_SET);
usleep(50000); // wait some time to give time to the main thread to start the acquisition module usleep(50000); // wait some time to give time to the main thread to start the acquisition module
@@ -488,7 +487,7 @@ void *handler_DMA(void *arguments)
file_completed = true; file_completed = true;
} }
nread_elements = fread(input_samples, sizeof(int8_t), nsamples_block*COMPLEX_SAMPLE_SIZE, rx_signal_file_id); nread_elements = fread(input_samples, sizeof(int8_t), nsamples_block * COMPLEX_SAMPLE_SIZE, rx_signal_file_id);
if (nread_elements != nsamples_block * COMPLEX_SAMPLE_SIZE) if (nread_elements != nsamples_block * COMPLEX_SAMPLE_SIZE)
{ {
@@ -496,36 +495,36 @@ void *handler_DMA(void *arguments)
file_completed = true; file_completed = true;
} }
nsamples+=(nread_elements/COMPLEX_SAMPLE_SIZE); nsamples += (nread_elements / COMPLEX_SAMPLE_SIZE);
if (nread_elements > 0) if (nread_elements > 0)
{ {
// for the 32-BIT DMA // for the 32-BIT DMA
dma_index = 0; dma_index = 0;
for (index0 = 0;index0 < (nread_elements);index0+=COMPLEX_SAMPLE_SIZE) for (index0 = 0; index0 < (nread_elements); index0 += COMPLEX_SAMPLE_SIZE)
{ {
if (args->freq_band == 0) if (args->freq_band == 0)
{ {
// channel 1 (queue 1) -> E5/L5 // channel 1 (queue 1) -> E5/L5
input_samples_dma[dma_index] = 0; input_samples_dma[dma_index] = 0;
input_samples_dma[dma_index+1] = 0; input_samples_dma[dma_index + 1] = 0;
// channel 0 (queue 0) -> E1/L1 // channel 0 (queue 0) -> E1/L1
input_samples_dma[dma_index+2] = input_samples[index0]; input_samples_dma[dma_index + 2] = input_samples[index0];
input_samples_dma[dma_index+3] = input_samples[index0+1]; input_samples_dma[dma_index + 3] = input_samples[index0 + 1];
} }
else else
{ {
// channel 1 (queue 1) -> E5/L5 // channel 1 (queue 1) -> E5/L5
input_samples_dma[dma_index] = input_samples[index0]; input_samples_dma[dma_index] = input_samples[index0];
input_samples_dma[dma_index+1] = input_samples[index0+1]; input_samples_dma[dma_index + 1] = input_samples[index0 + 1];
// channel 0 (queue 0) -> E1/L1 // channel 0 (queue 0) -> E1/L1
input_samples_dma[dma_index+2] = 0; input_samples_dma[dma_index + 2] = 0;
input_samples_dma[dma_index+3] = 0; input_samples_dma[dma_index + 3] = 0;
} }
dma_index += 4; dma_index += 4;
} }
nsamples_transmitted = write(tx_fd, &input_samples_dma[0], nread_elements*NUM_QUEUES); nsamples_transmitted = write(tx_fd, &input_samples_dma[0], nread_elements * NUM_QUEUES);
if (nsamples_transmitted != nread_elements*NUM_QUEUES) if (nsamples_transmitted != nread_elements * NUM_QUEUES)
{ {
std::cout << "Error : DMA could not send all the requested samples" << std::endl; std::cout << "Error : DMA could not send all the requested samples" << std::endl;
} }
@@ -539,10 +538,6 @@ void *handler_DMA(void *arguments)
} }
bool TrackingPullInTestFpga::acquire_signal(int SV_ID) bool TrackingPullInTestFpga::acquire_signal(int SV_ID)
{ {
pthread_t thread_DMA; pthread_t thread_DMA;
@@ -566,7 +561,6 @@ bool TrackingPullInTestFpga::acquire_signal(int SV_ID)
if (implementation.compare("GPS_L1_CA_DLL_PLL_Tracking_Fpga") == 0) if (implementation.compare("GPS_L1_CA_DLL_PLL_Tracking_Fpga") == 0)
{ {
tmp_gnss_synchro.System = 'G'; tmp_gnss_synchro.System = 'G';
std::string signal = "1C"; std::string signal = "1C";
const char* str = signal.c_str(); // get a C style null terminated string const char* str = signal.c_str(); // get a C style null terminated string
@@ -577,13 +571,11 @@ bool TrackingPullInTestFpga::acquire_signal(int SV_ID)
args.freq_band = 0; args.freq_band = 0;
acquisition = std::make_shared<GpsL1CaPcpsAcquisitionFpga>(config.get(), "Acquisition", 0, 0); acquisition = std::make_shared<GpsL1CaPcpsAcquisitionFpga>(config.get(), "Acquisition", 0, 0);
} }
else if (implementation.compare("Galileo_E1_DLL_PLL_VEML_Tracking_Fpga") == 0) else if (implementation.compare("Galileo_E1_DLL_PLL_VEML_Tracking_Fpga") == 0)
{ {
tmp_gnss_synchro.System = 'E'; tmp_gnss_synchro.System = 'E';
std::string signal = "1B"; std::string signal = "1B";
const char* str = signal.c_str(); // get a C style null terminated string const char* str = signal.c_str(); // get a C style null terminated string
@@ -594,7 +586,6 @@ bool TrackingPullInTestFpga::acquire_signal(int SV_ID)
args.freq_band = 0; args.freq_band = 0;
acquisition = std::make_shared<GalileoE1PcpsAmbiguousAcquisitionFpga>(config.get(), "Acquisition", 0, 0); acquisition = std::make_shared<GalileoE1PcpsAmbiguousAcquisitionFpga>(config.get(), "Acquisition", 0, 0);
} }
else if (implementation.compare("Galileo_E5a_DLL_PLL_Tracking_Fpga") == 0) else if (implementation.compare("Galileo_E5a_DLL_PLL_Tracking_Fpga") == 0)
{ {
@@ -608,8 +599,6 @@ bool TrackingPullInTestFpga::acquire_signal(int SV_ID)
args.freq_band = 1; args.freq_band = 1;
acquisition = std::make_shared<GalileoE5aPcpsAcquisitionFpga>(config.get(), "Acquisition", 0, 0); acquisition = std::make_shared<GalileoE5aPcpsAcquisitionFpga>(config.get(), "Acquisition", 0, 0);
} }
else if (implementation.compare("GPS_L5_DLL_PLL_Tracking_Fpga") == 0) else if (implementation.compare("GPS_L5_DLL_PLL_Tracking_Fpga") == 0)
{ {
@@ -622,7 +611,6 @@ bool TrackingPullInTestFpga::acquire_signal(int SV_ID)
args.freq_band = 1; args.freq_band = 1;
acquisition = std::make_shared<GpsL5iPcpsAcquisitionFpga>(config.get(), "Acquisition", 0, 0); acquisition = std::make_shared<GpsL5iPcpsAcquisitionFpga>(config.get(), "Acquisition", 0, 0);
} }
else else
{ {
@@ -706,7 +694,6 @@ bool TrackingPullInTestFpga::acquire_signal(int SV_ID)
for (unsigned int PRN = 1; PRN < MAX_PRN_IDX; PRN++) for (unsigned int PRN = 1; PRN < MAX_PRN_IDX; PRN++)
{ {
tmp_gnss_synchro.PRN = PRN; tmp_gnss_synchro.PRN = PRN;
acquisition->stop_acquisition(); // reset the whole system including the sample counters acquisition->stop_acquisition(); // reset the whole system including the sample counters
@@ -724,11 +711,11 @@ bool TrackingPullInTestFpga::acquire_signal(int SV_ID)
// send the previous samples to set the downsampling filter in a good condition // send the previous samples to set the downsampling filter in a good condition
send_samples_start = 0; send_samples_start = 0;
args.skip_used_samples = - DOWNAMPLING_FILTER_INIT_SAMPLES; args.skip_used_samples = -DOWNAMPLING_FILTER_INIT_SAMPLES;
args.nsamples_tx = DOWNAMPLING_FILTER_INIT_SAMPLES + DOWNSAMPLING_FILTER_DELAY; args.nsamples_tx = DOWNAMPLING_FILTER_INIT_SAMPLES + DOWNSAMPLING_FILTER_DELAY;
if (pthread_create(&thread_DMA, NULL, handler_DMA, (void *)&args) < 0) if (pthread_create(&thread_DMA, NULL, handler_DMA, (void*)&args) < 0)
{ {
std::cout << "ERROR cannot create DMA Process" << std::endl; std::cout << "ERROR cannot create DMA Process" << std::endl;
} }
@@ -741,7 +728,6 @@ bool TrackingPullInTestFpga::acquire_signal(int SV_ID)
args.nsamples_tx = nsamples_to_transfer; args.nsamples_tx = nsamples_to_transfer;
args.skip_used_samples = DOWNSAMPLING_FILTER_DELAY; args.skip_used_samples = DOWNSAMPLING_FILTER_DELAY;
} }
else else
{ {
@@ -751,10 +737,7 @@ bool TrackingPullInTestFpga::acquire_signal(int SV_ID)
} }
if (pthread_create(&thread_DMA, NULL, handler_DMA, (void*)&args) < 0)
if (pthread_create(&thread_DMA, NULL, handler_DMA, (void *)&args) < 0)
{ {
std::cout << "ERROR cannot create DMA Process" << std::endl; std::cout << "ERROR cannot create DMA Process" << std::endl;
} }
@@ -788,9 +771,11 @@ bool TrackingPullInTestFpga::acquire_signal(int SV_ID)
// however because of the LPF in the GPS L1/Gal E1 acquisition, this calculation is approximate // however because of the LPF in the GPS L1/Gal E1 acquisition, this calculation is approximate
// and some extra samples might be sent. Wait at least once to give time the HW to consume any extra // and some extra samples might be sent. Wait at least once to give time the HW to consume any extra
// sample the DMA might have sent. // sample the DMA might have sent.
do { do
{
usleep(100000); usleep(100000);
} while (msg_rx->rx_message == 0); }
while (msg_rx->rx_message == 0);
if (msg_rx->rx_message == 1) if (msg_rx->rx_message == 1)
{ {
@@ -809,7 +794,6 @@ bool TrackingPullInTestFpga::acquire_signal(int SV_ID)
top_block->stop(); top_block->stop();
std::cout.flush(); std::cout.flush();
} }
std::cout << "]" << std::endl; std::cout << "]" << std::endl;
@@ -821,7 +805,6 @@ bool TrackingPullInTestFpga::acquire_signal(int SV_ID)
} }
// report the elapsed time // report the elapsed time
end = std::chrono::system_clock::now(); end = std::chrono::system_clock::now();
elapsed_seconds = end - start; elapsed_seconds = end - start;
@@ -833,8 +816,6 @@ bool TrackingPullInTestFpga::acquire_signal(int SV_ID)
TEST_F(TrackingPullInTestFpga, ValidationOfResults) TEST_F(TrackingPullInTestFpga, ValidationOfResults)
{ {
// pointer to the DMA thread that sends the samples to the acquisition engine // pointer to the DMA thread that sends the samples to the acquisition engine
pthread_t thread_DMA; pthread_t thread_DMA;
@@ -886,7 +867,6 @@ TEST_F(TrackingPullInTestFpga, ValidationOfResults)
} }
// use generator or use an external capture file // use generator or use an external capture file
if (FLAGS_enable_external_signal_file) if (FLAGS_enable_external_signal_file)
{ {
@@ -953,7 +933,6 @@ TEST_F(TrackingPullInTestFpga, ValidationOfResults)
std::cout << "Estimated Initial Doppler " << true_acq_doppler_hz std::cout << "Estimated Initial Doppler " << true_acq_doppler_hz
<< " [Hz], estimated Initial code delay " << true_acq_delay_samples << " [Samples]" << " [Hz], estimated Initial code delay " << true_acq_delay_samples << " [Samples]"
<< " Acquisition SampleStamp is " << acq_samplestamp_samples << std::endl; << " Acquisition SampleStamp is " << acq_samplestamp_samples << std::endl;
} }
std::vector<std::vector<double>> pull_in_results_v_v; std::vector<std::vector<double>> pull_in_results_v_v;
@@ -970,7 +949,6 @@ TEST_F(TrackingPullInTestFpga, ValidationOfResults)
else if (implementation.compare("Galileo_E5a_DLL_PLL_Tracking_Fpga") == 0) else if (implementation.compare("Galileo_E5a_DLL_PLL_Tracking_Fpga") == 0)
{ {
code_length = static_cast<unsigned int>(std::round(static_cast<double>(baseband_sampling_freq) / GALILEO_E5A_CODE_CHIP_RATE_HZ * static_cast<double>(GALILEO_E5A_CODE_LENGTH_CHIPS))); code_length = static_cast<unsigned int>(std::round(static_cast<double>(baseband_sampling_freq) / GALILEO_E5A_CODE_CHIP_RATE_HZ * static_cast<double>(GALILEO_E5A_CODE_LENGTH_CHIPS)));
} }
else // (if (implementation.compare("GPS_L5_DLL_PLL_Tracking_Fpga") == 0)) else // (if (implementation.compare("GPS_L5_DLL_PLL_Tracking_Fpga") == 0))
{ {
@@ -1026,7 +1004,6 @@ TEST_F(TrackingPullInTestFpga, ValidationOfResults)
{ {
for (unsigned int current_acq_code_error_idx = 0; current_acq_code_error_idx < acq_delay_error_chips_values.at(current_acq_doppler_error_idx).size(); current_acq_code_error_idx++) for (unsigned int current_acq_code_error_idx = 0; current_acq_code_error_idx < acq_delay_error_chips_values.at(current_acq_doppler_error_idx).size(); current_acq_code_error_idx++)
{ {
// reset the HW to clear the sample counters // reset the HW to clear the sample counters
acquisition->stop_acquisition(); acquisition->stop_acquisition();
@@ -1067,7 +1044,7 @@ TEST_F(TrackingPullInTestFpga, ValidationOfResults)
if (skip_samples_already_used == 1) if (skip_samples_already_used == 1)
{ {
args.skip_used_samples = (gnss_synchro.PRN - 1)*fft_size; args.skip_used_samples = (gnss_synchro.PRN - 1) * fft_size;
} }
else else
{ {
@@ -1080,10 +1057,10 @@ TEST_F(TrackingPullInTestFpga, ValidationOfResults)
//******************************************************************** //********************************************************************
args.nsamples_tx = baseband_sampling_freq*FLAGS_duration; args.nsamples_tx = baseband_sampling_freq * FLAGS_duration;
if (pthread_create(&thread_DMA, NULL, handler_DMA, (void *)&args) < 0) if (pthread_create(&thread_DMA, NULL, handler_DMA, (void*)&args) < 0)
{ {
std::cout << "ERROR cannot create DMA Process" << std::endl; std::cout << "ERROR cannot create DMA Process" << std::endl;
} }
@@ -1342,10 +1319,6 @@ TEST_F(TrackingPullInTestFpga, ValidationOfResults)
g4.savetops("trk_pull_in_grid_external_file"); g4.savetops("trk_pull_in_grid_external_file");
g4.savetopdf("trk_pull_in_grid_external_file", 12); g4.savetopdf("trk_pull_in_grid_external_file", 12);
} }
} }
} }
} }