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https://github.com/gnss-sdr/gnss-sdr
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Added optional support for Sparkfun SiGe GN3S USB GPS RF sampler:
- Added a pre-compiled custom GN3S firmware. - Added a fully-compliant GNU Radio source block for GN3S USB dongle. It can be used also from GNU Radio companion and from Python applications. - Added a new GN3S_Signal_Source block. It is possible to disable the GN3S signal source compilation. See README. git-svn-id: https://svn.code.sf.net/p/gnss-sdr/code/trunk@217 64b25241-fba3-4117-9849-534c7e92360d
This commit is contained in:
Javier Arribas
179
firmware/GN3S_v2/lib/delay.asm
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179
firmware/GN3S_v2/lib/delay.asm
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;--------------------------------------------------------
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; File Created by SDCC : free open source ANSI-C Compiler
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; Version 2.9.0 #5416 (Feb 3 2010) (UNIX)
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; This file was generated Mon Jul 30 11:40:52 2012
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;--------------------------------------------------------
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.module delay
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.optsdcc -mmcs51 --model-small
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;--------------------------------------------------------
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; Public variables in this module
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;--------------------------------------------------------
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.globl _mdelay
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.globl _udelay
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;--------------------------------------------------------
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; special function registers
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;--------------------------------------------------------
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.area RSEG (DATA)
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;--------------------------------------------------------
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; special function bits
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;--------------------------------------------------------
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.area RSEG (DATA)
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;--------------------------------------------------------
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; overlayable register banks
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;--------------------------------------------------------
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.area REG_BANK_0 (REL,OVR,DATA)
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.ds 8
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;--------------------------------------------------------
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; internal ram data
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;--------------------------------------------------------
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.area DSEG (DATA)
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;--------------------------------------------------------
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; overlayable items in internal ram
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;--------------------------------------------------------
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.area OSEG (OVR,DATA)
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;--------------------------------------------------------
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; indirectly addressable internal ram data
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;--------------------------------------------------------
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.area ISEG (DATA)
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;--------------------------------------------------------
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; absolute internal ram data
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;--------------------------------------------------------
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.area IABS (ABS,DATA)
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.area IABS (ABS,DATA)
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;--------------------------------------------------------
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; bit data
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;--------------------------------------------------------
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.area BSEG (BIT)
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;--------------------------------------------------------
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; paged external ram data
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;--------------------------------------------------------
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.area PSEG (PAG,XDATA)
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;--------------------------------------------------------
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; external ram data
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;--------------------------------------------------------
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.area XSEG (XDATA)
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;--------------------------------------------------------
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; absolute external ram data
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;--------------------------------------------------------
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.area XABS (ABS,XDATA)
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;--------------------------------------------------------
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; external initialized ram data
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;--------------------------------------------------------
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.area HOME (CODE)
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.area GSINIT0 (CODE)
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.area GSINIT1 (CODE)
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.area GSINIT2 (CODE)
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.area GSINIT3 (CODE)
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.area GSINIT4 (CODE)
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.area GSINIT5 (CODE)
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.area GSINIT (CODE)
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.area GSFINAL (CODE)
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.area CSEG (CODE)
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;--------------------------------------------------------
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; global & static initialisations
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;--------------------------------------------------------
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.area HOME (CODE)
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.area GSINIT (CODE)
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.area GSFINAL (CODE)
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.area GSINIT (CODE)
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;--------------------------------------------------------
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; Home
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;--------------------------------------------------------
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.area HOME (CODE)
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.area HOME (CODE)
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;--------------------------------------------------------
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; code
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;--------------------------------------------------------
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.area CSEG (CODE)
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;------------------------------------------------------------
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;Allocation info for local variables in function 'udelay1'
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;------------------------------------------------------------
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;------------------------------------------------------------
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; delay.c:27: udelay1 (void) _naked
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; -----------------------------------------
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; function udelay1
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; -----------------------------------------
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_udelay1:
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; naked function: no prologue.
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; delay.c:31: _endasm;
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; lcall that got us here took 4 bus cycles
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ret ; 4 bus cycles
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; naked function: no epilogue.
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;------------------------------------------------------------
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;Allocation info for local variables in function 'udelay'
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;------------------------------------------------------------
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;usecs Allocated to registers r2
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;------------------------------------------------------------
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; delay.c:38: udelay (unsigned char usecs)
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; -----------------------------------------
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; function udelay
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; -----------------------------------------
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_udelay:
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ar2 = 0x02
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ar3 = 0x03
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ar4 = 0x04
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ar5 = 0x05
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ar6 = 0x06
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ar7 = 0x07
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ar0 = 0x00
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ar1 = 0x01
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mov r2,dpl
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; delay.c:40: do {
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00101$:
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; delay.c:41: udelay1 ();
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lcall _udelay1
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; delay.c:42: } while (--usecs != 0);
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djnz r2,00101$
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ret
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;------------------------------------------------------------
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;Allocation info for local variables in function 'mdelay1'
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;------------------------------------------------------------
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;------------------------------------------------------------
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; delay.c:54: mdelay1 (void) _naked
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; -----------------------------------------
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; function mdelay1
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; -----------------------------------------
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_mdelay1:
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; naked function: no prologue.
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; delay.c:65: _endasm;
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mov dptr,#(-1200 & 0xffff)
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002$:
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inc dptr ; 3 bus cycles
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mov a, dpl ; 2 bus cycles
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orl a, dph ; 2 bus cycles
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jnz 002$ ; 3 bus cycles
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ret
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; naked function: no epilogue.
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;------------------------------------------------------------
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;Allocation info for local variables in function 'mdelay'
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;------------------------------------------------------------
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;msecs Allocated to registers r2 r3
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;------------------------------------------------------------
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; delay.c:69: mdelay (unsigned int msecs)
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; -----------------------------------------
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; function mdelay
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; -----------------------------------------
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_mdelay:
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mov r2,dpl
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mov r3,dph
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; delay.c:71: do {
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00101$:
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; delay.c:72: mdelay1 ();
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lcall _mdelay1
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; delay.c:73: } while (--msecs != 0);
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dec r2
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cjne r2,#0xff,00108$
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dec r3
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00108$:
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mov a,r2
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orl a,r3
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jnz 00101$
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ret
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.area CSEG (CODE)
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.area CONST (CODE)
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.area CABS (ABS,CODE)
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