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https://github.com/gnss-sdr/gnss-sdr
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Fix carrier phase observable initialization in the FPGA side
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@ -469,6 +469,8 @@ dll_pll_veml_tracking_fpga::dll_pll_veml_tracking_fpga(const Dll_Pll_Conf_Fpga &
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d_worker_is_done = false;
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d_stop_tracking = false;
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d_acc_carrier_phase_initialized = false;
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}
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@ -511,12 +513,11 @@ void dll_pll_veml_tracking_fpga::start_tracking()
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d_carrier_doppler_hz = d_acq_carrier_doppler_hz;
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d_carrier_phase_step_rad = PI_2 * d_carrier_doppler_hz / trk_parameters.fs_in;
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// filter initialization
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d_carrier_loop_filter.initialize(static_cast<float>(d_acq_carrier_doppler_hz)); // initialize the carrier filter
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d_corrected_doppler = false;
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d_acc_carrier_phase_initialized = false;
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boost::mutex::scoped_lock lock(d_mutex);
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d_worker_is_done = true;
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@ -768,6 +769,16 @@ void dll_pll_veml_tracking_fpga::run_dll_pll()
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}
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void dll_pll_veml_tracking_fpga::check_carrier_phase_coherent_initialization()
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{
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if (d_acc_carrier_phase_initialized == false)
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{
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d_acc_carrier_phase_rad = -d_rem_carr_phase_rad;
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d_acc_carrier_phase_initialized = true;
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}
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}
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void dll_pll_veml_tracking_fpga::clear_tracking_vars()
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{
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std::fill_n(d_correlator_outs.begin(), d_n_correlator_taps, gr_complex(0.0, 0.0));
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@ -1832,7 +1843,7 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
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{
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run_dll_pll();
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update_tracking_vars();
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check_carrier_phase_coherent_initialization();
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if (d_current_data_symbol == 0)
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{
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// enable write dump file this cycle (valid DLL/PLL cycle)
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@ -189,6 +189,7 @@ private:
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bool d_pull_in_transitory;
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bool d_corrected_doppler;
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bool interchange_iq;
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bool d_acc_carrier_phase_initialized;
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double d_current_correlation_time_s;
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double d_carr_phase_error_hz;
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double d_carr_freq_error_hz;
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