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mirror of https://github.com/gnss-sdr/gnss-sdr synced 2024-06-25 22:43:14 +00:00

Fix carrier phase observable initialization in the FPGA side

This commit is contained in:
Carles Fernandez 2020-03-08 12:00:03 +01:00
parent e58264bb0e
commit b4017f7aab
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GPG Key ID: 4C583C52B0C3877D
2 changed files with 15 additions and 3 deletions

View File

@ -469,6 +469,8 @@ dll_pll_veml_tracking_fpga::dll_pll_veml_tracking_fpga(const Dll_Pll_Conf_Fpga &
d_worker_is_done = false;
d_stop_tracking = false;
d_acc_carrier_phase_initialized = false;
}
@ -511,12 +513,11 @@ void dll_pll_veml_tracking_fpga::start_tracking()
d_carrier_doppler_hz = d_acq_carrier_doppler_hz;
d_carrier_phase_step_rad = PI_2 * d_carrier_doppler_hz / trk_parameters.fs_in;
// filter initialization
d_carrier_loop_filter.initialize(static_cast<float>(d_acq_carrier_doppler_hz)); // initialize the carrier filter
d_corrected_doppler = false;
d_acc_carrier_phase_initialized = false;
boost::mutex::scoped_lock lock(d_mutex);
d_worker_is_done = true;
@ -768,6 +769,16 @@ void dll_pll_veml_tracking_fpga::run_dll_pll()
}
void dll_pll_veml_tracking_fpga::check_carrier_phase_coherent_initialization()
{
if (d_acc_carrier_phase_initialized == false)
{
d_acc_carrier_phase_rad = -d_rem_carr_phase_rad;
d_acc_carrier_phase_initialized = true;
}
}
void dll_pll_veml_tracking_fpga::clear_tracking_vars()
{
std::fill_n(d_correlator_outs.begin(), d_n_correlator_taps, gr_complex(0.0, 0.0));
@ -1832,7 +1843,7 @@ int dll_pll_veml_tracking_fpga::general_work(int noutput_items __attribute__((un
{
run_dll_pll();
update_tracking_vars();
check_carrier_phase_coherent_initialization();
if (d_current_data_symbol == 0)
{
// enable write dump file this cycle (valid DLL/PLL cycle)

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@ -189,6 +189,7 @@ private:
bool d_pull_in_transitory;
bool d_corrected_doppler;
bool interchange_iq;
bool d_acc_carrier_phase_initialized;
double d_current_correlation_time_s;
double d_carr_phase_error_hz;
double d_carr_freq_error_hz;