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mirror of https://github.com/gnss-sdr/gnss-sdr synced 2025-08-01 16:52:54 +00:00

Halt FPGA-based receiver on buffer overflow detection

This commit is contained in:
Marc Majoral 2025-06-13 13:18:37 +02:00 committed by Carles Fernandez
parent d36bf449e3
commit a559536f61
5 changed files with 31 additions and 5 deletions

View File

@ -357,7 +357,14 @@ void Adrv9361z7035SignalSourceFPGA::run_buffer_monitor_process()
while (enable_ovf_check_buffer_monitor_active)
{
buffer_monitor_fpga->check_buffer_overflow_and_monitor_buffer_status();
if (buffer_monitor_fpga->check_buffer_overflow_and_monitor_buffer_status())
{
// If a buffer overflow is detected, the receiver may not function correctly.
// This compromises system reliability and can lead to undefined behavior.
// To prevent further issues, execution is halted.
LOG(ERROR) << "Buffer Overflow Detected Execution Halted";
exit(1);
}
std::this_thread::sleep_for(std::chrono::milliseconds(buffer_monitor_period_ms));
std::lock_guard<std::mutex> lock(buffer_monitor_mutex);
if (enable_ovf_check_buffer_monitor_active_ == false)

View File

@ -302,7 +302,14 @@ void Fmcomms5SignalSourceFPGA::run_buffer_monitor_process()
while (enable_ovf_check_buffer_monitor_active)
{
buffer_monitor_fpga->check_buffer_overflow_and_monitor_buffer_status();
if (buffer_monitor_fpga->check_buffer_overflow_and_monitor_buffer_status())
{
// If a buffer overflow is detected, the receiver may not function correctly.
// This compromises system reliability and can lead to undefined behavior.
// To prevent further issues, execution is halted.
LOG(ERROR) << "Buffer Overflow Detected Execution Halted";
exit(1);
}
std::this_thread::sleep_for(std::chrono::milliseconds(buffer_monitor_period_ms));
std::lock_guard<std::mutex> lock(buffer_monitor_mutex);
if (enable_ovf_check_buffer_monitor_active_ == false)

View File

@ -422,7 +422,14 @@ void MAX2771EVKITSignalSourceFPGA::run_buffer_monitor_process()
while (enable_ovf_check_buffer_monitor_active)
{
buffer_monitor_fpga->check_buffer_overflow_and_monitor_buffer_status();
if (buffer_monitor_fpga->check_buffer_overflow_and_monitor_buffer_status())
{
// If a buffer overflow is detected, the receiver may not function correctly.
// This compromises system reliability and can lead to undefined behavior.
// To prevent further issues, execution is halted.
LOG(ERROR) << "Buffer Overflow Detected Execution Halted";
exit(1);
}
std::this_thread::sleep_for(std::chrono::milliseconds(buffer_monitor_period_ms));
std::lock_guard<std::mutex> lock(buffer_monitor_mutex);
if (enable_ovf_check_buffer_monitor_active_ == false)
@ -430,6 +437,7 @@ void MAX2771EVKITSignalSourceFPGA::run_buffer_monitor_process()
enable_ovf_check_buffer_monitor_active = false;
}
}
}

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@ -161,8 +161,9 @@ Fpga_buffer_monitor::~Fpga_buffer_monitor()
}
void Fpga_buffer_monitor::check_buffer_overflow_and_monitor_buffer_status()
bool Fpga_buffer_monitor::check_buffer_overflow_and_monitor_buffer_status()
{
bool buffer_overflow = false;
// check buffer overflow flags
uint32_t buffer_overflow_status = d_map_base[overflow_flags_reg_addr];
@ -176,6 +177,7 @@ void Fpga_buffer_monitor::check_buffer_overflow_and_monitor_buffer_status()
{
LOG(ERROR) << "FPGA Buffer overflow";
}
buffer_overflow = true;
}
if (d_num_freq_bands > 1)
@ -184,6 +186,7 @@ void Fpga_buffer_monitor::check_buffer_overflow_and_monitor_buffer_status()
{
LOG(ERROR) << "FPGA Buffer overflow in frequency band 1";
}
buffer_overflow = true;
}
// buffer monitor
@ -242,6 +245,7 @@ void Fpga_buffer_monitor::check_buffer_overflow_and_monitor_buffer_status()
{
d_dump_file << std::endl;
}
return buffer_overflow;
}
}

View File

@ -61,7 +61,7 @@ public:
/*!
* \brief This function checks buffer overflow and monitors the FPGA buffer status
*/
void check_buffer_overflow_and_monitor_buffer_status();
bool check_buffer_overflow_and_monitor_buffer_status();
private:
const std::string BUFFER_MONITOR_DEVICE_NAME = std::string("buffer_monitor"); // buffer monitor device name