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https://github.com/gnss-sdr/gnss-sdr
synced 2025-01-15 19:55:47 +00:00
Apply modernize-redundant-void-arg clang-tidy fix
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942ac32701
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3d146019dd
@ -313,7 +313,7 @@ void pcps_acquisition_fpga::set_active(bool active)
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}
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}
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void pcps_acquisition_fpga::reset_acquisition(void)
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void pcps_acquisition_fpga::reset_acquisition()
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{
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{
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// this function triggers a HW reset of the FPGA PL.
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// this function triggers a HW reset of the FPGA PL.
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acquisition_fpga->open_device();
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acquisition_fpga->open_device();
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@ -199,7 +199,7 @@ public:
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/*!
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/*!
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* \brief This function triggers a HW reset of the FPGA PL.
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* \brief This function triggers a HW reset of the FPGA PL.
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*/
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*/
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void reset_acquisition(void);
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void reset_acquisition();
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private:
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private:
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friend pcps_acquisition_fpga_sptr pcps_make_acquisition_fpga(pcpsconf_fpga_t conf_);
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friend pcps_acquisition_fpga_sptr pcps_make_acquisition_fpga(pcpsconf_fpga_t conf_);
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@ -152,7 +152,7 @@ void Fpga_Acquisition::fpga_acquisition_test_register()
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}
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}
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void Fpga_Acquisition::run_acquisition(void)
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void Fpga_Acquisition::run_acquisition()
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{
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{
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// enable interrupts
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// enable interrupts
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int32_t reenable = 1;
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int32_t reenable = 1;
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@ -263,7 +263,7 @@ void Fpga_Acquisition::close_device()
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}
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}
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void Fpga_Acquisition::reset_acquisition(void)
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void Fpga_Acquisition::reset_acquisition()
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{
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{
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//printf("============ resetting the hw now from the acquisition ===============");
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//printf("============ resetting the hw now from the acquisition ===============");
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d_map_base[8] = RESET_ACQUISITION; // writing a 2 to d_map_base[8] resets the acquisition. This causes a reset of all
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d_map_base[8] = RESET_ACQUISITION; // writing a 2 to d_map_base[8] resets the acquisition. This causes a reset of all
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@ -77,7 +77,7 @@ public:
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/*!
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/*!
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* \brief Run the acquisition process in the FPGA
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* \brief Run the acquisition process in the FPGA
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*/
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*/
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void run_acquisition(void);
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void run_acquisition();
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/*!
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/*!
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* \brief Read the results of the acquisition process
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* \brief Read the results of the acquisition process
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@ -112,7 +112,7 @@ public:
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/*!
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/*!
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* \brief Reset the FPGA PL.
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* \brief Reset the FPGA PL.
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*/
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*/
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void reset_acquisition(void);
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void reset_acquisition();
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/*!
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/*!
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* \brief Read the scaling factor that has been used by the FFT-IFFT
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* \brief Read the scaling factor that has been used by the FFT-IFFT
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@ -657,7 +657,7 @@ bool dll_pll_veml_tracking_fpga::cn0_and_tracking_lock_status(double coh_integra
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// - updated remnant code phase in samples (d_rem_code_phase_samples)
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// - updated remnant code phase in samples (d_rem_code_phase_samples)
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// - d_code_freq_chips
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// - d_code_freq_chips
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// - d_carrier_doppler_hz
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// - d_carrier_doppler_hz
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void dll_pll_veml_tracking_fpga::do_correlation_step(void)
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void dll_pll_veml_tracking_fpga::do_correlation_step()
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{
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{
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// ################# CARRIER WIPEOFF AND CORRELATORS ##############################
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// ################# CARRIER WIPEOFF AND CORRELATORS ##############################
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// perform carrier wipe-off and compute Early, Prompt and Late correlation
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// perform carrier wipe-off and compute Early, Prompt and Late correlation
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@ -1468,7 +1468,7 @@ void dll_pll_veml_tracking_fpga::stop_tracking()
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}
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}
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void dll_pll_veml_tracking_fpga::reset(void)
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void dll_pll_veml_tracking_fpga::reset()
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{
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{
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gr::thread::scoped_lock l(d_setlock);
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gr::thread::scoped_lock l(d_setlock);
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multicorrelator_fpga->unlock_channel();
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multicorrelator_fpga->unlock_channel();
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@ -101,7 +101,7 @@ public:
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/*!
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/*!
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* \brief This function disables the HW multicorrelator in the FPGA in order to stop the tracking process
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* \brief This function disables the HW multicorrelator in the FPGA in order to stop the tracking process
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*/
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*/
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void reset(void);
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void reset();
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private:
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private:
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friend dll_pll_veml_tracking_fpga_sptr dll_pll_veml_make_tracking_fpga(const Dll_Pll_Conf_Fpga &conf_);
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friend dll_pll_veml_tracking_fpga_sptr dll_pll_veml_make_tracking_fpga(const Dll_Pll_Conf_Fpga &conf_);
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@ -110,7 +110,7 @@ private:
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bool cn0_and_tracking_lock_status(double coh_integration_time_s);
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bool cn0_and_tracking_lock_status(double coh_integration_time_s);
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bool acquire_secondary();
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bool acquire_secondary();
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void do_correlation_step(void);
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void do_correlation_step();
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void run_dll_pll();
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void run_dll_pll();
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void update_tracking_vars();
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void update_tracking_vars();
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void clear_tracking_vars();
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void clear_tracking_vars();
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@ -318,7 +318,7 @@ void Fpga_Multicorrelator_8sc::fpga_configure_tracking_gps_local_code(int32_t PR
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}
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}
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void Fpga_Multicorrelator_8sc::fpga_compute_code_shift_parameters(void)
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void Fpga_Multicorrelator_8sc::fpga_compute_code_shift_parameters()
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{
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{
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float frac_part; // decimal part
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float frac_part; // decimal part
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int32_t dec_part; // fractional part
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int32_t dec_part; // fractional part
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@ -362,7 +362,7 @@ void Fpga_Multicorrelator_8sc::fpga_compute_code_shift_parameters(void)
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}
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}
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void Fpga_Multicorrelator_8sc::fpga_configure_code_parameters_in_fpga(void)
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void Fpga_Multicorrelator_8sc::fpga_configure_code_parameters_in_fpga()
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{
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{
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for (uint32_t i = 0; i < d_n_correlators; i++)
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for (uint32_t i = 0; i < d_n_correlators; i++)
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{
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{
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@ -377,7 +377,7 @@ void Fpga_Multicorrelator_8sc::fpga_configure_code_parameters_in_fpga(void)
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}
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}
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void Fpga_Multicorrelator_8sc::fpga_compute_signal_parameters_in_fpga(void)
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void Fpga_Multicorrelator_8sc::fpga_compute_signal_parameters_in_fpga()
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{
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{
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float d_rem_carrier_phase_in_rad_temp;
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float d_rem_carrier_phase_in_rad_temp;
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@ -403,7 +403,7 @@ void Fpga_Multicorrelator_8sc::fpga_compute_signal_parameters_in_fpga(void)
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}
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}
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void Fpga_Multicorrelator_8sc::fpga_configure_signal_parameters_in_fpga(void)
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void Fpga_Multicorrelator_8sc::fpga_configure_signal_parameters_in_fpga()
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{
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{
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d_map_base[code_phase_step_chips_num_reg_addr] = d_code_phase_step_chips_num; // code phase step
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d_map_base[code_phase_step_chips_num_reg_addr] = d_code_phase_step_chips_num; // code phase step
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@ -419,7 +419,7 @@ void Fpga_Multicorrelator_8sc::fpga_configure_signal_parameters_in_fpga(void)
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}
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}
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void Fpga_Multicorrelator_8sc::fpga_launch_multicorrelator_fpga(void)
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void Fpga_Multicorrelator_8sc::fpga_launch_multicorrelator_fpga()
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{
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{
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// enable interrupts
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// enable interrupts
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int32_t reenable = 1;
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int32_t reenable = 1;
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@ -433,7 +433,7 @@ void Fpga_Multicorrelator_8sc::fpga_launch_multicorrelator_fpga(void)
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}
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}
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void Fpga_Multicorrelator_8sc::read_tracking_gps_results(void)
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void Fpga_Multicorrelator_8sc::read_tracking_gps_results()
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{
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{
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int32_t readval_real;
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int32_t readval_real;
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int32_t readval_imag;
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int32_t readval_imag;
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@ -453,7 +453,7 @@ void Fpga_Multicorrelator_8sc::read_tracking_gps_results(void)
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}
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}
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void Fpga_Multicorrelator_8sc::unlock_channel(void)
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void Fpga_Multicorrelator_8sc::unlock_channel()
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{
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{
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// unlock the channel to let the next samples go through
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// unlock the channel to let the next samples go through
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d_map_base[drop_samples_reg_addr] = drop_samples; // unlock the channel and disable secondary codes
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d_map_base[drop_samples_reg_addr] = drop_samples; // unlock the channel and disable secondary codes
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@ -474,7 +474,7 @@ void Fpga_Multicorrelator_8sc::close_device()
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}
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}
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void Fpga_Multicorrelator_8sc::lock_channel(void)
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void Fpga_Multicorrelator_8sc::lock_channel()
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{
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{
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// lock the channel for processing
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// lock the channel for processing
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d_map_base[drop_samples_reg_addr] = 0; // lock the channel
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d_map_base[drop_samples_reg_addr] = 0; // lock the channel
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@ -110,12 +110,12 @@ public:
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/*!
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/*!
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* \brief Start the tracking process in the FPGA
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* \brief Start the tracking process in the FPGA
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*/
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*/
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void lock_channel(void);
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void lock_channel();
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/*!
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/*!
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* \brief finish the tracking process in the FPGA
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* \brief finish the tracking process in the FPGA
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*/
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*/
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void unlock_channel(void);
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void unlock_channel();
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/*!
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/*!
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* \brief Set the secondary code length in the FPGA. This is only used when extended coherent integration
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* \brief Set the secondary code length in the FPGA. This is only used when extended coherent integration
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@ -248,12 +248,12 @@ private:
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// private functions
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// private functions
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uint32_t fpga_acquisition_test_register(uint32_t writeval);
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uint32_t fpga_acquisition_test_register(uint32_t writeval);
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void fpga_configure_tracking_gps_local_code(int32_t PRN);
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void fpga_configure_tracking_gps_local_code(int32_t PRN);
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void fpga_compute_code_shift_parameters(void);
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void fpga_compute_code_shift_parameters();
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void fpga_configure_code_parameters_in_fpga(void);
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void fpga_configure_code_parameters_in_fpga();
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void fpga_compute_signal_parameters_in_fpga(void);
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void fpga_compute_signal_parameters_in_fpga();
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void fpga_configure_signal_parameters_in_fpga(void);
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void fpga_configure_signal_parameters_in_fpga();
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void fpga_launch_multicorrelator_fpga(void);
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void fpga_launch_multicorrelator_fpga();
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void read_tracking_gps_results(void);
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void read_tracking_gps_results();
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void close_device(void);
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void close_device(void);
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void write_secondary_code(uint32_t secondary_code_length, std::string *secondary_code_string, uint32_t reg_addr);
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void write_secondary_code(uint32_t secondary_code_length, std::string *secondary_code_string, uint32_t reg_addr);
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};
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};
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@ -176,7 +176,7 @@ private:
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public:
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public:
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int rx_message;
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int rx_message;
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~GpsL1CADllPllTrackingTestFpga_msg_rx(); //!< Default destructor
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~GpsL1CADllPllTrackingTestFpga_msg_rx() override; //!< Default destructor
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};
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};
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@ -252,7 +252,7 @@ public:
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gnss_synchro = Gnss_Synchro();
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gnss_synchro = Gnss_Synchro();
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}
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}
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~GpsL1CADllPllTrackingTestFpga() = default;
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~GpsL1CADllPllTrackingTestFpga() override = default;
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void configure_receiver();
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void configure_receiver();
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