1
0
mirror of https://github.com/gnss-sdr/gnss-sdr synced 2024-06-16 10:09:58 +00:00

Apply modernize-redundant-void-arg clang-tidy fix

This commit is contained in:
Carles Fernandez 2019-08-14 02:14:29 +02:00
parent 942ac32701
commit 3d146019dd
No known key found for this signature in database
GPG Key ID: 4C583C52B0C3877D
9 changed files with 28 additions and 28 deletions

View File

@ -313,7 +313,7 @@ void pcps_acquisition_fpga::set_active(bool active)
}
void pcps_acquisition_fpga::reset_acquisition(void)
void pcps_acquisition_fpga::reset_acquisition()
{
// this function triggers a HW reset of the FPGA PL.
acquisition_fpga->open_device();

View File

@ -199,7 +199,7 @@ public:
/*!
* \brief This function triggers a HW reset of the FPGA PL.
*/
void reset_acquisition(void);
void reset_acquisition();
private:
friend pcps_acquisition_fpga_sptr pcps_make_acquisition_fpga(pcpsconf_fpga_t conf_);

View File

@ -152,7 +152,7 @@ void Fpga_Acquisition::fpga_acquisition_test_register()
}
void Fpga_Acquisition::run_acquisition(void)
void Fpga_Acquisition::run_acquisition()
{
// enable interrupts
int32_t reenable = 1;
@ -263,7 +263,7 @@ void Fpga_Acquisition::close_device()
}
void Fpga_Acquisition::reset_acquisition(void)
void Fpga_Acquisition::reset_acquisition()
{
//printf("============ resetting the hw now from the acquisition ===============");
d_map_base[8] = RESET_ACQUISITION; // writing a 2 to d_map_base[8] resets the acquisition. This causes a reset of all

View File

@ -77,7 +77,7 @@ public:
/*!
* \brief Run the acquisition process in the FPGA
*/
void run_acquisition(void);
void run_acquisition();
/*!
* \brief Read the results of the acquisition process
@ -112,7 +112,7 @@ public:
/*!
* \brief Reset the FPGA PL.
*/
void reset_acquisition(void);
void reset_acquisition();
/*!
* \brief Read the scaling factor that has been used by the FFT-IFFT

View File

@ -657,7 +657,7 @@ bool dll_pll_veml_tracking_fpga::cn0_and_tracking_lock_status(double coh_integra
// - updated remnant code phase in samples (d_rem_code_phase_samples)
// - d_code_freq_chips
// - d_carrier_doppler_hz
void dll_pll_veml_tracking_fpga::do_correlation_step(void)
void dll_pll_veml_tracking_fpga::do_correlation_step()
{
// ################# CARRIER WIPEOFF AND CORRELATORS ##############################
// perform carrier wipe-off and compute Early, Prompt and Late correlation
@ -1468,7 +1468,7 @@ void dll_pll_veml_tracking_fpga::stop_tracking()
}
void dll_pll_veml_tracking_fpga::reset(void)
void dll_pll_veml_tracking_fpga::reset()
{
gr::thread::scoped_lock l(d_setlock);
multicorrelator_fpga->unlock_channel();

View File

@ -101,7 +101,7 @@ public:
/*!
* \brief This function disables the HW multicorrelator in the FPGA in order to stop the tracking process
*/
void reset(void);
void reset();
private:
friend dll_pll_veml_tracking_fpga_sptr dll_pll_veml_make_tracking_fpga(const Dll_Pll_Conf_Fpga &conf_);
@ -110,7 +110,7 @@ private:
bool cn0_and_tracking_lock_status(double coh_integration_time_s);
bool acquire_secondary();
void do_correlation_step(void);
void do_correlation_step();
void run_dll_pll();
void update_tracking_vars();
void clear_tracking_vars();

View File

@ -318,7 +318,7 @@ void Fpga_Multicorrelator_8sc::fpga_configure_tracking_gps_local_code(int32_t PR
}
void Fpga_Multicorrelator_8sc::fpga_compute_code_shift_parameters(void)
void Fpga_Multicorrelator_8sc::fpga_compute_code_shift_parameters()
{
float frac_part; // decimal part
int32_t dec_part; // fractional part
@ -362,7 +362,7 @@ void Fpga_Multicorrelator_8sc::fpga_compute_code_shift_parameters(void)
}
void Fpga_Multicorrelator_8sc::fpga_configure_code_parameters_in_fpga(void)
void Fpga_Multicorrelator_8sc::fpga_configure_code_parameters_in_fpga()
{
for (uint32_t i = 0; i < d_n_correlators; i++)
{
@ -377,7 +377,7 @@ void Fpga_Multicorrelator_8sc::fpga_configure_code_parameters_in_fpga(void)
}
void Fpga_Multicorrelator_8sc::fpga_compute_signal_parameters_in_fpga(void)
void Fpga_Multicorrelator_8sc::fpga_compute_signal_parameters_in_fpga()
{
float d_rem_carrier_phase_in_rad_temp;
@ -403,7 +403,7 @@ void Fpga_Multicorrelator_8sc::fpga_compute_signal_parameters_in_fpga(void)
}
void Fpga_Multicorrelator_8sc::fpga_configure_signal_parameters_in_fpga(void)
void Fpga_Multicorrelator_8sc::fpga_configure_signal_parameters_in_fpga()
{
d_map_base[code_phase_step_chips_num_reg_addr] = d_code_phase_step_chips_num; // code phase step
@ -419,7 +419,7 @@ void Fpga_Multicorrelator_8sc::fpga_configure_signal_parameters_in_fpga(void)
}
void Fpga_Multicorrelator_8sc::fpga_launch_multicorrelator_fpga(void)
void Fpga_Multicorrelator_8sc::fpga_launch_multicorrelator_fpga()
{
// enable interrupts
int32_t reenable = 1;
@ -433,7 +433,7 @@ void Fpga_Multicorrelator_8sc::fpga_launch_multicorrelator_fpga(void)
}
void Fpga_Multicorrelator_8sc::read_tracking_gps_results(void)
void Fpga_Multicorrelator_8sc::read_tracking_gps_results()
{
int32_t readval_real;
int32_t readval_imag;
@ -453,7 +453,7 @@ void Fpga_Multicorrelator_8sc::read_tracking_gps_results(void)
}
void Fpga_Multicorrelator_8sc::unlock_channel(void)
void Fpga_Multicorrelator_8sc::unlock_channel()
{
// unlock the channel to let the next samples go through
d_map_base[drop_samples_reg_addr] = drop_samples; // unlock the channel and disable secondary codes
@ -474,7 +474,7 @@ void Fpga_Multicorrelator_8sc::close_device()
}
void Fpga_Multicorrelator_8sc::lock_channel(void)
void Fpga_Multicorrelator_8sc::lock_channel()
{
// lock the channel for processing
d_map_base[drop_samples_reg_addr] = 0; // lock the channel

View File

@ -110,12 +110,12 @@ public:
/*!
* \brief Start the tracking process in the FPGA
*/
void lock_channel(void);
void lock_channel();
/*!
* \brief finish the tracking process in the FPGA
*/
void unlock_channel(void);
void unlock_channel();
/*!
* \brief Set the secondary code length in the FPGA. This is only used when extended coherent integration
@ -248,12 +248,12 @@ private:
// private functions
uint32_t fpga_acquisition_test_register(uint32_t writeval);
void fpga_configure_tracking_gps_local_code(int32_t PRN);
void fpga_compute_code_shift_parameters(void);
void fpga_configure_code_parameters_in_fpga(void);
void fpga_compute_signal_parameters_in_fpga(void);
void fpga_configure_signal_parameters_in_fpga(void);
void fpga_launch_multicorrelator_fpga(void);
void read_tracking_gps_results(void);
void fpga_compute_code_shift_parameters();
void fpga_configure_code_parameters_in_fpga();
void fpga_compute_signal_parameters_in_fpga();
void fpga_configure_signal_parameters_in_fpga();
void fpga_launch_multicorrelator_fpga();
void read_tracking_gps_results();
void close_device(void);
void write_secondary_code(uint32_t secondary_code_length, std::string *secondary_code_string, uint32_t reg_addr);
};

View File

@ -176,7 +176,7 @@ private:
public:
int rx_message;
~GpsL1CADllPllTrackingTestFpga_msg_rx(); //!< Default destructor
~GpsL1CADllPllTrackingTestFpga_msg_rx() override; //!< Default destructor
};
@ -252,7 +252,7 @@ public:
gnss_synchro = Gnss_Synchro();
}
~GpsL1CADllPllTrackingTestFpga() = default;
~GpsL1CADllPllTrackingTestFpga() override = default;
void configure_receiver();