mirror of
https://github.com/gnss-sdr/gnss-sdr
synced 2024-11-10 20:10:05 +00:00
Replaced the AD9361 FPGA signal source with the ADRV9361_Z7035 FPGA and the FMCOMMS5 FPGA signal sources.
This commit is contained in:
Marc Majoral
parent
c5bd9b6a03
commit
19a152c6ce
@ -37,8 +37,10 @@ if(ENABLE_AD9361)
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###############################################
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# AD9361 DIRECT TO FPGA Hardware
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###############################################
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list(APPEND OPT_DRIVER_SOURCES ad9361_signal_source_fpga.cc)
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list(APPEND OPT_DRIVER_HEADERS ad9361_signal_source_fpga.h)
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list(APPEND OPT_DRIVER_SOURCES adrv9361_z7035_signal_source_fpga.cc)
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list(APPEND OPT_DRIVER_HEADERS adrv9361_z7035_signal_source_fpga.h)
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list(APPEND OPT_DRIVER_SOURCES fmcomms5_signal_source_fpga.cc)
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list(APPEND OPT_DRIVER_HEADERS fmcomms5_signal_source_fpga.h)
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endif()
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if(ENABLE_MAX2771)
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@ -1,7 +1,7 @@
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/*!
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* \file ad9361_signal_source_fpga.cc
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* \brief signal source for Analog Devices front-end AD9361 connected directly
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* to FPGA accelerators.
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* \file adrv9361_z7035_signal_source_fpga.cc
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* \brief signal source for the Analog Devices ADRV9361-Z7035 evaluation board
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* directly connected to the FPGA accelerators.
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* This source implements only the AD9361 control. It is NOT compatible with
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* conventional SDR acquisition and tracking blocks.
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* Please use the fmcomms2 source if conventional SDR acquisition and tracking
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@ -16,13 +16,13 @@
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* GNSS-SDR is a Global Navigation Satellite System software-defined receiver.
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* This file is part of GNSS-SDR.
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*
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* Copyright (C) 2010-2020 (see AUTHORS file for a list of contributors)
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* Copyright (C) 2010-2024 (see AUTHORS file for a list of contributors)
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* SPDX-License-Identifier: GPL-3.0-or-later
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*
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* -----------------------------------------------------------------------------
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*/
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#include "ad9361_signal_source_fpga.h"
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#include "adrv9361_z7035_signal_source_fpga.h"
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#include "GPS_L1_CA.h"
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#include "GPS_L5.h"
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#include "ad9361_manager.h"
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@ -44,10 +44,10 @@
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using namespace std::string_literals;
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Ad9361SignalSourceFPGA::Ad9361SignalSourceFPGA(const ConfigurationInterface *configuration,
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Adrv9361z7035SignalSourceFPGA::Adrv9361z7035SignalSourceFPGA(const ConfigurationInterface *configuration,
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const std::string &role, unsigned int in_stream, unsigned int out_stream,
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Concurrent_Queue<pmt::pmt_t> *queue __attribute__((unused)))
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: SignalSourceBase(configuration, role, "Ad9361_Signal_Source_Fpga"s),
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: SignalSourceBase(configuration, role, "ADRV9361_Z7035_Signal_Source_FPGA"s),
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gain_mode_rx1_(configuration->property(role + ".gain_mode_rx1", default_gain_mode)),
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gain_mode_rx2_(configuration->property(role + ".gain_mode_rx2", default_gain_mode)),
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rf_port_select_(configuration->property(role + ".rf_port_select", default_rf_port_select)),
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@ -276,7 +276,7 @@ Ad9361SignalSourceFPGA::Ad9361SignalSourceFPGA(const ConfigurationInterface *con
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}
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Ad9361SignalSourceFPGA::~Ad9361SignalSourceFPGA()
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Adrv9361z7035SignalSourceFPGA::~Adrv9361z7035SignalSourceFPGA()
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{
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/* cleanup and exit */
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@ -328,7 +328,7 @@ Ad9361SignalSourceFPGA::~Ad9361SignalSourceFPGA()
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}
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void Ad9361SignalSourceFPGA::run_dynamic_bit_selection_process()
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void Adrv9361z7035SignalSourceFPGA::run_dynamic_bit_selection_process()
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{
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bool dynamic_bit_selection_active = true;
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@ -347,7 +347,7 @@ void Ad9361SignalSourceFPGA::run_dynamic_bit_selection_process()
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}
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void Ad9361SignalSourceFPGA::run_buffer_monitor_process()
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void Adrv9361z7035SignalSourceFPGA::run_buffer_monitor_process()
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{
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bool enable_ovf_check_buffer_monitor_active = true;
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@ -367,7 +367,7 @@ void Ad9361SignalSourceFPGA::run_buffer_monitor_process()
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}
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void Ad9361SignalSourceFPGA::connect(gr::top_block_sptr top_block)
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void Adrv9361z7035SignalSourceFPGA::connect(gr::top_block_sptr top_block)
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{
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if (top_block)
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{ /* top_block is not null */
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@ -376,7 +376,7 @@ void Ad9361SignalSourceFPGA::connect(gr::top_block_sptr top_block)
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}
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void Ad9361SignalSourceFPGA::disconnect(gr::top_block_sptr top_block)
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void Adrv9361z7035SignalSourceFPGA::disconnect(gr::top_block_sptr top_block)
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{
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if (top_block)
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{ /* top_block is not null */
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@ -385,14 +385,14 @@ void Ad9361SignalSourceFPGA::disconnect(gr::top_block_sptr top_block)
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}
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gr::basic_block_sptr Ad9361SignalSourceFPGA::get_left_block()
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gr::basic_block_sptr Adrv9361z7035SignalSourceFPGA::get_left_block()
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{
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LOG(WARNING) << "Trying to get signal source left block.";
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return {};
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}
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gr::basic_block_sptr Ad9361SignalSourceFPGA::get_right_block()
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gr::basic_block_sptr Adrv9361z7035SignalSourceFPGA::get_right_block()
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{
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return {};
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}
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@ -1,7 +1,7 @@
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/*!
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* \file ad9361_signal_source_fpga.h
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* \brief signal source for Analog Devices front-end AD9361 connected directly
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* to FPGA accelerators.
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* \file adrv9361_z7035_signal_source_fpga.h
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* \brief signal source for the Analog Devices ADRV9361-Z7035 evaluation board
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* directly connected to the FPGA accelerators.
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* This source implements only the AD9361 control. It is NOT compatible with
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* conventional SDR acquisition and tracking blocks.
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* Please use the fmcomms2 source if conventional SDR acquisition and tracking
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@ -12,14 +12,14 @@
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* GNSS-SDR is a Global Navigation Satellite System software-defined receiver.
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* This file is part of GNSS-SDR.
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*
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* Copyright (C) 2010-2020 (see AUTHORS file for a list of contributors)
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* Copyright (C) 2010-2024 (see AUTHORS file for a list of contributors)
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* SPDX-License-Identifier: GPL-3.0-or-later
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*
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* -----------------------------------------------------------------------------
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*/
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#ifndef GNSS_SDR_AD9361_SIGNAL_SOURCE_FPGA_H
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#define GNSS_SDR_AD9361_SIGNAL_SOURCE_FPGA_H
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#ifndef GNSS_SDR_ADRV9361_Z7035_SIGNAL_SOURCE_FPGA_H
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#define GNSS_SDR_ADRV9361_Z7035_SIGNAL_SOURCE_FPGA_H
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#include "concurrent_queue.h"
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#include "fpga_buffer_monitor.h"
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@ -44,14 +44,14 @@
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class ConfigurationInterface;
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class Ad9361SignalSourceFPGA : public SignalSourceBase
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class Adrv9361z7035SignalSourceFPGA : public SignalSourceBase
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{
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public:
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Ad9361SignalSourceFPGA(const ConfigurationInterface *configuration,
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Adrv9361z7035SignalSourceFPGA(const ConfigurationInterface *configuration,
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const std::string &role, unsigned int in_stream,
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unsigned int out_stream, Concurrent_Queue<pmt::pmt_t> *queue);
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~Ad9361SignalSourceFPGA();
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~Adrv9361z7035SignalSourceFPGA();
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inline size_t item_size() override
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{
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@ -139,4 +139,4 @@ private:
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/** \} */
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/** \} */
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#endif // GNSS_SDR_AD9361_SIGNAL_SOURCE_FPGA_H
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#endif // GNSS_SDR_ADRV9361_Z7035_SIGNAL_SOURCE_FPGA_H
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@ -41,7 +41,7 @@ using namespace std::string_literals;
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DMASignalSourceFPGA::DMASignalSourceFPGA(const ConfigurationInterface *configuration,
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const std::string &role, unsigned int in_stream, unsigned int out_stream,
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Concurrent_Queue<pmt::pmt_t> *queue __attribute__((unused)))
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: SignalSourceBase(configuration, role, "DMA_Signal_Source_Fpga"s),
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: SignalSourceBase(configuration, role, "DMA_Signal_Source_FPGA"s),
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queue_(queue),
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filename0_(configuration->property(role + ".filename", empty_string)),
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sample_rate_(configuration->property(role + ".sampling_frequency", default_bandwidth)),
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@ -0,0 +1,347 @@
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/*!
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* \file fmcomms5_signal_source_fpga.cc
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* \brief signal source for the Analog Devices FMCOMMS5 directly connected
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* to the FPGA accelerators.
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* This source implements only the AD9361 control. It is NOT compatible with
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* conventional SDR acquisition and tracking blocks.
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* Please use the fmcomms2 source if conventional SDR acquisition and tracking
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* is selected in the configuration file.
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* \authors <ul>
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* <li> Javier Arribas, jarribas(at)cttc.es
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* <li> Marc Majoral, mmajoral(at)cttc.es
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* </ul>
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*
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* -----------------------------------------------------------------------------
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*
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* GNSS-SDR is a Global Navigation Satellite System software-defined receiver.
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* This file is part of GNSS-SDR.
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*
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* Copyright (C) 2010-2024 (see AUTHORS file for a list of contributors)
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* SPDX-License-Identifier: GPL-3.0-or-later
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*
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* -----------------------------------------------------------------------------
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*/
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#include "fmcomms5_signal_source_fpga.h"
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#include "GPS_L1_CA.h"
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#include "GPS_L5.h"
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#include "ad9361_manager.h"
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#include "configuration_interface.h"
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#include "gnss_sdr_flags.h"
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#include "gnss_sdr_string_literals.h"
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#include <algorithm> // for std::max
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#include <chrono> // for std::chrono
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#include <cmath> // for std::floor
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#include <exception> // for std::exception
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#include <iostream> // for std::cout
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#if USE_GLOG_AND_GFLAGS
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#include <glog/logging.h>
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#else
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#include <absl/log/check.h>
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#include <absl/log/log.h>
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#endif
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using namespace std::string_literals;
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Fmcomms5SignalSourceFPGA::Fmcomms5SignalSourceFPGA(const ConfigurationInterface *configuration,
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const std::string &role, unsigned int in_stream, unsigned int out_stream,
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Concurrent_Queue<pmt::pmt_t> *queue __attribute__((unused)))
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: SignalSourceBase(configuration, role, "FMCOMMS5_Signal_Source_FPGA"s),
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gain_mode_rx1_(configuration->property(role + ".gain_mode_rx1", default_gain_mode)),
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gain_mode_rx2_(configuration->property(role + ".gain_mode_rx2", default_gain_mode)),
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rf_port_select_(configuration->property(role + ".rf_port_select", default_rf_port_select)),
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filter_filename_(configuration->property(role + ".filter_filename", filter_file_)),
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rf_gain_rx1_(configuration->property(role + ".gain_rx1", default_manual_gain_rx1)),
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rf_gain_rx2_(configuration->property(role + ".gain_rx2", default_manual_gain_rx2)),
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freq0_(configuration->property(role + ".freq0", static_cast<uint64_t>(GPS_L1_FREQ_HZ))),
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freq1_(configuration->property(role + ".freq1", static_cast<uint64_t>(GPS_L5_FREQ_HZ))),
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sample_rate_(configuration->property(role + ".sampling_frequency", default_bandwidth)),
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bandwidth_(configuration->property(role + ".bandwidth", default_bandwidth)),
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Fpass_(configuration->property(role + ".Fpass", static_cast<float>(0.0))),
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Fstop_(configuration->property(role + ".Fstop", static_cast<float>(0.0))),
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in_stream_(in_stream),
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out_stream_(out_stream),
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item_size_(sizeof(int8_t)),
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filter_auto_(configuration->property(role + ".filter_auto", false)),
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quadrature_(configuration->property(role + ".quadrature", true)),
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rf_dc_(configuration->property(role + ".rf_dc", true)),
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bb_dc_(configuration->property(role + ".bb_dc", true)),
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rx1_enable_(configuration->property(role + ".rx1_enable", true)),
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rx2_enable_(configuration->property(role + ".rx2_enable", true)),
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enable_dynamic_bit_selection_(configuration->property(role + ".enable_dynamic_bit_selection", true)),
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enable_ovf_check_buffer_monitor_active_(true),
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dump_(configuration->property(role + ".dump", false)),
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#if USE_GLOG_AND_GFLAGS
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rf_shutdown_(configuration->property(role + ".rf_shutdown", FLAGS_rf_shutdown))
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#else
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rf_shutdown_(configuration->property(role + ".rf_shutdown", absl::GetFlag(FLAGS_rf_shutdown)))
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#endif
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{
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const bool enable_rx1_band((configuration->property("Channels_1C.count", 0) > 0) ||
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(configuration->property("Channels_1B.count", 0) > 0));
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const bool enable_rx2_band((configuration->property("Channels_L2.count", 0) > 0) ||
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(configuration->property("Channels_L5.count", 0) > 0) ||
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(configuration->property("Channels_5X.count", 0) > 0));
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const uint32_t num_freq_bands = ((enable_rx1_band == true) and (enable_rx2_band == true)) ? 2 : 1;
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if (filter_auto_)
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{
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filter_source_ = configuration->property(role + ".filter_source", std::string("Auto"));
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}
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else
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{
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filter_source_ = configuration->property(role + ".filter_source", std::string("Off"));
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}
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switch_fpga = std::make_shared<Fpga_Switch>();
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switch_fpga->set_switch_position(switch_to_real_time_mode);
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std::cout << "Sample rate: " << sample_rate_ << " Sps\n";
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// some basic checks
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if ((rf_port_select_ != "A_BALANCED") && (rf_port_select_ != "B_BALANCED") && (rf_port_select_ != "A_N") && (rf_port_select_ != "B_N") && (rf_port_select_ != "B_P") && (rf_port_select_ != "C_N") && (rf_port_select_ != "C_P") && (rf_port_select_ != "TX_MONITOR1") && (rf_port_select_ != "TX_MONITOR2") && (rf_port_select_ != "TX_MONITOR1_2"))
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{
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std::cout << "Configuration parameter rf_port_select should take one of these values:\n";
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std::cout << " A_BALANCED, B_BALANCED, A_N, B_N, B_P, C_N, C_P, TX_MONITOR1, TX_MONITOR2, TX_MONITOR1_2\n";
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std::cout << "Error: provided value rf_port_select=" << rf_port_select_ << " is not among valid values\n";
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std::cout << " This parameter has been set to its default value rf_port_select=" << default_rf_port_select << '\n';
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rf_port_select_ = default_rf_port_select;
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LOG(WARNING) << "Invalid configuration value for rf_port_select parameter. Set to rf_port_select=" << default_rf_port_select;
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}
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if ((gain_mode_rx1_ != "manual") && (gain_mode_rx1_ != "slow_attack") && (gain_mode_rx1_ != "fast_attack") && (gain_mode_rx1_ != "hybrid"))
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{
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std::cout << "Configuration parameter gain_mode_rx1 should take one of these values:\n";
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std::cout << " manual, slow_attack, fast_attack, hybrid\n";
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std::cout << "Error: provided value gain_mode_rx1=" << gain_mode_rx1_ << " is not among valid values\n";
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std::cout << " This parameter has been set to its default value gain_mode_rx1=" << default_gain_mode << '\n';
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gain_mode_rx1_ = default_gain_mode;
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LOG(WARNING) << "Invalid configuration value for gain_mode_rx1 parameter. Set to gain_mode_rx1=" << default_gain_mode;
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}
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if ((gain_mode_rx2_ != "manual") && (gain_mode_rx2_ != "slow_attack") && (gain_mode_rx2_ != "fast_attack") && (gain_mode_rx2_ != "hybrid"))
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{
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std::cout << "Configuration parameter gain_mode_rx2 should take one of these values:\n";
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std::cout << " manual, slow_attack, fast_attack, hybrid\n";
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std::cout << "Error: provided value gain_mode_rx2=" << gain_mode_rx2_ << " is not among valid values\n";
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std::cout << " This parameter has been set to its default value gain_mode_rx2=" << default_gain_mode << '\n';
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gain_mode_rx2_ = default_gain_mode;
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LOG(WARNING) << "Invalid configuration value for gain_mode_rx2 parameter. Set to gain_mode_rx2=" << default_gain_mode;
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}
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if (gain_mode_rx1_ == "manual")
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{
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if (rf_gain_rx1_ > 73.0 || rf_gain_rx1_ < -1.0)
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{
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std::cout << "Configuration parameter rf_gain_rx1 should take values between -1.0 and 73 dB\n";
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std::cout << "Error: provided value rf_gain_rx1=" << rf_gain_rx1_ << " is not among valid values\n";
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std::cout << " This parameter has been set to its default value rf_gain_rx1=" << default_manual_gain_rx1 << '\n';
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rf_gain_rx1_ = default_manual_gain_rx1;
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LOG(WARNING) << "Invalid configuration value for rf_gain_rx1 parameter. Set to rf_gain_rx1=" << default_manual_gain_rx1;
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}
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}
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if (gain_mode_rx2_ == "manual")
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{
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if (rf_gain_rx2_ > 73.0 || rf_gain_rx2_ < -1.0)
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{
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std::cout << "Configuration parameter rf_gain_rx2 should take values between -1.0 and 73 dB\n";
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std::cout << "Error: provided value rf_gain_rx2=" << rf_gain_rx2_ << " is not among valid values\n";
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std::cout << " This parameter has been set to its default value rf_gain_rx2=" << default_manual_gain_rx2 << '\n';
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rf_gain_rx2_ = default_manual_gain_rx2;
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LOG(WARNING) << "Invalid configuration value for rf_gain_rx2 parameter. Set to rf_gain_rx2=" << default_manual_gain_rx2;
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}
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}
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if ((filter_source_ != "Off") && (filter_source_ != "Auto") && (filter_source_ != "File") && (filter_source_ != "Design"))
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{
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std::cout << "Configuration parameter filter_source should take one of these values:\n";
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std::cout << " Off: Disable filter\n";
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std::cout << " Auto: Use auto-generated filters\n";
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std::cout << " File: User-provided filter in filter_filename parameter\n";
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std::cout << " Design: Create filter from Fpass, Fstop, sampling_frequency and bandwidth parameters\n";
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std::cout << "Error: provided value filter_source=" << filter_source_ << " is not among valid values\n";
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std::cout << " This parameter has been set to its default value filter_source=Off\n";
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filter_source_ = std::string("Off");
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LOG(WARNING) << "Invalid configuration value for filter_source parameter. Set to filter_source=Off";
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}
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if (bandwidth_ < 200000 || bandwidth_ > 56000000)
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{
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std::cout << "Configuration parameter bandwidth should take values between 200000 and 56000000 Hz\n";
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std::cout << "Error: provided value bandwidth=" << bandwidth_ << " is not among valid values\n";
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std::cout << " This parameter has been set to its default value bandwidth=" << default_bandwidth << '\n';
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bandwidth_ = default_bandwidth;
|
||||
LOG(WARNING) << "Invalid configuration value for bandwidth parameter. Set to bandwidth=" << default_bandwidth;
|
||||
}
|
||||
|
||||
if (enable_rx1_band)
|
||||
{
|
||||
std::cout << "LO 0 frequency : " << freq0_ << " Hz\n";
|
||||
}
|
||||
if (enable_rx2_band)
|
||||
{
|
||||
std::cout << "LO 1 frequency : " << freq1_ << " Hz\n";
|
||||
}
|
||||
try
|
||||
{
|
||||
config_ad9361_rx_local(bandwidth_,
|
||||
sample_rate_,
|
||||
freq0_,
|
||||
freq1_,
|
||||
rf_port_select_,
|
||||
rx1_enable_,
|
||||
rx2_enable_,
|
||||
gain_mode_rx1_,
|
||||
gain_mode_rx2_,
|
||||
rf_gain_rx1_,
|
||||
rf_gain_rx2_,
|
||||
quadrature_,
|
||||
rf_dc_,
|
||||
bb_dc_,
|
||||
filter_source_,
|
||||
filter_filename_,
|
||||
Fpass_,
|
||||
Fstop_);
|
||||
}
|
||||
catch (const std::runtime_error &e)
|
||||
{
|
||||
std::cerr << "Exception cached when configuring the RX chain: " << e.what() << '\n';
|
||||
return;
|
||||
}
|
||||
|
||||
std::string dump_filename = configuration->property(role + ".dump_filename", default_dump_filename);
|
||||
|
||||
buffer_monitor_fpga = std::make_shared<Fpga_buffer_monitor>(num_freq_bands, dump_, dump_filename);
|
||||
thread_buffer_monitor = std::thread([&] { run_buffer_monitor_process(); });
|
||||
|
||||
|
||||
// dynamic bits selection
|
||||
if (enable_dynamic_bit_selection_)
|
||||
{
|
||||
dynamic_bit_selection_fpga = std::make_shared<Fpga_dynamic_bit_selection>(enable_rx1_band, enable_rx2_band);
|
||||
thread_dynamic_bit_selection = std::thread([&] { run_dynamic_bit_selection_process(); });
|
||||
}
|
||||
|
||||
if (in_stream_ > 0)
|
||||
{
|
||||
LOG(ERROR) << "A signal source does not have an input stream";
|
||||
}
|
||||
if (out_stream_ > 1)
|
||||
{
|
||||
LOG(ERROR) << "This implementation only supports one output stream";
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
Fmcomms5SignalSourceFPGA::~Fmcomms5SignalSourceFPGA()
|
||||
{
|
||||
/* cleanup and exit */
|
||||
|
||||
if (rf_shutdown_)
|
||||
{
|
||||
std::cout << "* Disabling RX streaming channels\n";
|
||||
if (!disable_ad9361_rx_local())
|
||||
{
|
||||
LOG(WARNING) << "Problem shutting down the AD9361 RX channels";
|
||||
}
|
||||
}
|
||||
|
||||
// disable buffer overflow checking and buffer monitoring
|
||||
std::unique_lock<std::mutex> lock_buffer_monitor(buffer_monitor_mutex);
|
||||
enable_ovf_check_buffer_monitor_active_ = false;
|
||||
lock_buffer_monitor.unlock();
|
||||
|
||||
if (thread_buffer_monitor.joinable())
|
||||
{
|
||||
thread_buffer_monitor.join();
|
||||
}
|
||||
|
||||
std::unique_lock<std::mutex> lock_dyn_bit_sel(dynamic_bit_selection_mutex);
|
||||
bool bit_selection_enabled = enable_dynamic_bit_selection_;
|
||||
lock_dyn_bit_sel.unlock();
|
||||
|
||||
if (bit_selection_enabled == true)
|
||||
{
|
||||
std::unique_lock<std::mutex> lock(dynamic_bit_selection_mutex);
|
||||
enable_dynamic_bit_selection_ = false;
|
||||
lock.unlock();
|
||||
|
||||
if (thread_dynamic_bit_selection.joinable())
|
||||
{
|
||||
thread_dynamic_bit_selection.join();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void Fmcomms5SignalSourceFPGA::run_dynamic_bit_selection_process()
|
||||
{
|
||||
bool dynamic_bit_selection_active = true;
|
||||
|
||||
while (dynamic_bit_selection_active)
|
||||
{
|
||||
// setting the bit selection to the top bits
|
||||
dynamic_bit_selection_fpga->bit_selection();
|
||||
std::this_thread::sleep_for(std::chrono::milliseconds(Gain_control_period_ms));
|
||||
std::unique_lock<std::mutex> lock(dynamic_bit_selection_mutex);
|
||||
if (enable_dynamic_bit_selection_ == false)
|
||||
{
|
||||
dynamic_bit_selection_active = false;
|
||||
}
|
||||
lock.unlock();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void Fmcomms5SignalSourceFPGA::run_buffer_monitor_process()
|
||||
{
|
||||
bool enable_ovf_check_buffer_monitor_active = true;
|
||||
|
||||
std::this_thread::sleep_for(std::chrono::milliseconds(buffer_monitoring_initial_delay_ms));
|
||||
|
||||
while (enable_ovf_check_buffer_monitor_active)
|
||||
{
|
||||
buffer_monitor_fpga->check_buffer_overflow_and_monitor_buffer_status();
|
||||
std::this_thread::sleep_for(std::chrono::milliseconds(buffer_monitor_period_ms));
|
||||
std::unique_lock<std::mutex> lock(buffer_monitor_mutex);
|
||||
if (enable_ovf_check_buffer_monitor_active_ == false)
|
||||
{
|
||||
enable_ovf_check_buffer_monitor_active = false;
|
||||
}
|
||||
lock.unlock();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void Fmcomms5SignalSourceFPGA::connect(gr::top_block_sptr top_block)
|
||||
{
|
||||
if (top_block)
|
||||
{ /* top_block is not null */
|
||||
};
|
||||
DLOG(INFO) << "AD9361 FPGA source nothing to connect";
|
||||
}
|
||||
|
||||
|
||||
void Fmcomms5SignalSourceFPGA::disconnect(gr::top_block_sptr top_block)
|
||||
{
|
||||
if (top_block)
|
||||
{ /* top_block is not null */
|
||||
};
|
||||
DLOG(INFO) << "AD9361 FPGA source nothing to disconnect";
|
||||
}
|
||||
|
||||
|
||||
gr::basic_block_sptr Fmcomms5SignalSourceFPGA::get_left_block()
|
||||
{
|
||||
LOG(WARNING) << "Trying to get signal source left block.";
|
||||
return {};
|
||||
}
|
||||
|
||||
|
||||
gr::basic_block_sptr Fmcomms5SignalSourceFPGA::get_right_block()
|
||||
{
|
||||
return {};
|
||||
}
|
||||
@ -0,0 +1,135 @@
|
||||
/*!
|
||||
* \file fmcomms5_signal_source_fpga.h
|
||||
* \brief signal source for the Analog Devices FMCOMMS5 directly connected
|
||||
* to the FPGA accelerators.
|
||||
* This source implements only the AD9361 control. It is NOT compatible with
|
||||
* conventional SDR acquisition and tracking blocks.
|
||||
* Please use the fmcomms2 source if conventional SDR acquisition and tracking
|
||||
* is selected in the configuration file.
|
||||
*
|
||||
* -----------------------------------------------------------------------------
|
||||
*
|
||||
* GNSS-SDR is a Global Navigation Satellite System software-defined receiver.
|
||||
* This file is part of GNSS-SDR.
|
||||
*
|
||||
* Copyright (C) 2010-2024 (see AUTHORS file for a list of contributors)
|
||||
* SPDX-License-Identifier: GPL-3.0-or-later
|
||||
*
|
||||
* -----------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
#ifndef GNSS_SDR_FMCOMMS5_SIGNAL_SOURCE_FPGA_H
|
||||
#define GNSS_SDR_FMCOMMS5_SIGNAL_SOURCE_FPGA_H
|
||||
|
||||
#include "concurrent_queue.h"
|
||||
#include "fpga_buffer_monitor.h"
|
||||
#include "fpga_dma-proxy.h"
|
||||
#include "fpga_dynamic_bit_selection.h"
|
||||
#include "fpga_switch.h"
|
||||
#include "gnss_block_interface.h"
|
||||
#include "signal_source_base.h"
|
||||
#include <pmt/pmt.h>
|
||||
#include <cstdint>
|
||||
#include <memory>
|
||||
#include <mutex>
|
||||
#include <string>
|
||||
#include <thread>
|
||||
|
||||
|
||||
/** \addtogroup Signal_Source
|
||||
* \{ */
|
||||
/** \addtogroup Signal_Source_adapters
|
||||
* \{ */
|
||||
|
||||
|
||||
class ConfigurationInterface;
|
||||
|
||||
class Fmcomms5SignalSourceFPGA : public SignalSourceBase
|
||||
{
|
||||
public:
|
||||
Fmcomms5SignalSourceFPGA(const ConfigurationInterface *configuration,
|
||||
const std::string &role, unsigned int in_stream,
|
||||
unsigned int out_stream, Concurrent_Queue<pmt::pmt_t> *queue);
|
||||
|
||||
~Fmcomms5SignalSourceFPGA();
|
||||
|
||||
inline size_t item_size() override
|
||||
{
|
||||
return item_size_;
|
||||
}
|
||||
|
||||
void connect(gr::top_block_sptr top_block) override;
|
||||
void disconnect(gr::top_block_sptr top_block) override;
|
||||
gr::basic_block_sptr get_left_block() override;
|
||||
gr::basic_block_sptr get_right_block() override;
|
||||
|
||||
private:
|
||||
const std::string default_dump_filename = std::string("FPGA_buffer_monitor_dump.dat");
|
||||
const std::string default_rf_port_select = std::string("A_BALANCED");
|
||||
const std::string default_gain_mode = std::string("slow_attack");
|
||||
const double default_tx_attenuation_db = -10.0;
|
||||
const double default_manual_gain_rx1 = 64.0;
|
||||
const double default_manual_gain_rx2 = 64.0;
|
||||
const uint64_t default_bandwidth = 12500000;
|
||||
|
||||
// perform dynamic bit selection every 500 ms by default
|
||||
const uint32_t Gain_control_period_ms = 500;
|
||||
// check buffer overflow and perform buffer monitoring every 1s by default
|
||||
const uint32_t buffer_monitor_period_ms = 1000;
|
||||
// buffer overflow and buffer monitoring initial delay
|
||||
const uint32_t buffer_monitoring_initial_delay_ms = 2000;
|
||||
// sample block size when running in post-processing mode
|
||||
const int sample_block_size = 16384;
|
||||
const int32_t switch_to_real_time_mode = 2;
|
||||
|
||||
void run_dynamic_bit_selection_process();
|
||||
void run_buffer_monitor_process();
|
||||
|
||||
std::thread thread_dynamic_bit_selection;
|
||||
std::thread thread_buffer_monitor;
|
||||
|
||||
std::shared_ptr<Fpga_Switch> switch_fpga;
|
||||
std::shared_ptr<Fpga_dynamic_bit_selection> dynamic_bit_selection_fpga;
|
||||
std::shared_ptr<Fpga_buffer_monitor> buffer_monitor_fpga;
|
||||
|
||||
std::mutex dynamic_bit_selection_mutex;
|
||||
std::mutex buffer_monitor_mutex;
|
||||
|
||||
std::string gain_mode_rx1_;
|
||||
std::string gain_mode_rx2_;
|
||||
std::string rf_port_select_;
|
||||
std::string filter_file_;
|
||||
std::string filter_source_;
|
||||
std::string filter_filename_;
|
||||
|
||||
double rf_gain_rx1_;
|
||||
double rf_gain_rx2_;
|
||||
|
||||
uint64_t freq0_; // frequency of local oscillator for ADRV9361-A
|
||||
uint64_t freq1_; // frequency of local oscillator for ADRV9361-B
|
||||
uint64_t sample_rate_;
|
||||
uint64_t bandwidth_;
|
||||
|
||||
float Fpass_;
|
||||
float Fstop_;
|
||||
uint32_t in_stream_;
|
||||
uint32_t out_stream_;
|
||||
|
||||
size_t item_size_;
|
||||
|
||||
bool filter_auto_;
|
||||
bool quadrature_;
|
||||
bool rf_dc_;
|
||||
bool bb_dc_;
|
||||
bool rx1_enable_;
|
||||
bool rx2_enable_;
|
||||
bool enable_dynamic_bit_selection_;
|
||||
bool enable_ovf_check_buffer_monitor_active_;
|
||||
bool dump_;
|
||||
bool rf_shutdown_;
|
||||
};
|
||||
|
||||
|
||||
/** \} */
|
||||
/** \} */
|
||||
#endif // GNSS_SDR_FMCOMMS5_SIGNAL_SOURCE_FPGA_H
|
||||
@ -40,7 +40,7 @@ using namespace std::string_literals;
|
||||
MAX2771EVKITSignalSourceFPGA::MAX2771EVKITSignalSourceFPGA(const ConfigurationInterface *configuration,
|
||||
const std::string &role, unsigned int in_stream, unsigned int out_stream,
|
||||
Concurrent_Queue<pmt::pmt_t> *queue __attribute__((unused)))
|
||||
: SignalSourceBase(configuration, role, "MAX2771_EVKIT_Signal_Source_Fpga"s),
|
||||
: SignalSourceBase(configuration, role, "MAX2771_EVKIT_Signal_Source_FPGA"s),
|
||||
freq_(configuration->property(role + ".freq", static_cast<uint64_t>(GPS_L1_FREQ_HZ))),
|
||||
sample_rate_(configuration->property(role + ".sampling_frequency", default_sampling_rate)),
|
||||
in_stream_(in_stream),
|
||||
|
||||
@ -166,8 +166,9 @@
|
||||
#include "fmcomms2_signal_source.h"
|
||||
#endif
|
||||
|
||||
#if AD9361_DRIVER
|
||||
#include "ad9361_signal_source_fpga.h"
|
||||
#if ENABLE_FPGA and AD9361_DRIVER
|
||||
#include "adrv9361_z7035_signal_source_fpga.h"
|
||||
#include "fmcomms5_signal_source_fpga.h"
|
||||
#endif
|
||||
|
||||
#if MAX2771_DRIVER
|
||||
@ -820,16 +821,22 @@ std::unique_ptr<GNSSBlockInterface> GNSSBlockFactory::GetBlock(
|
||||
#endif
|
||||
|
||||
#if ENABLE_FPGA and AD9361_DRIVER
|
||||
else if (implementation == "Ad9361_Signal_Source_Fpga")
|
||||
else if (implementation == "Adrv9361_Z7035_Signal_Source_Fpga")
|
||||
{
|
||||
std::unique_ptr<GNSSBlockInterface> block_ = std::make_unique<Ad9361SignalSourceFPGA>(configuration, role, in_streams,
|
||||
std::unique_ptr<GNSSBlockInterface> block_ = std::make_unique<Adrv9361z7035SignalSourceFPGA>(configuration, role, in_streams,
|
||||
out_streams, queue);
|
||||
block = std::move(block_);
|
||||
}
|
||||
else if (implementation == "Fmcomms5_Signal_Source_Fpga")
|
||||
{
|
||||
std::unique_ptr<GNSSBlockInterface> block_ = std::make_unique<Fmcomms5SignalSourceFPGA>(configuration, role, in_streams,
|
||||
out_streams, queue);
|
||||
block = std::move(block_);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if ENABLE_FPGA and MAX2771_DRIVER
|
||||
else if (implementation == "MAX2771_EVKIT_Signal_Source_Fpga")
|
||||
else if (implementation == "Max2771_Evkit_Signal_Source_Fpga")
|
||||
{
|
||||
std::unique_ptr<GNSSBlockInterface> block_ = std::make_unique<MAX2771EVKITSignalSourceFPGA>(configuration, role, in_streams,
|
||||
out_streams, queue);
|
||||
@ -838,7 +845,7 @@ std::unique_ptr<GNSSBlockInterface> GNSSBlockFactory::GetBlock(
|
||||
#endif
|
||||
|
||||
#if ENABLE_FPGA and DMA_PROXY_DRIVER
|
||||
else if (implementation == "DMA_Signal_Source_Fpga")
|
||||
else if (implementation == "Dma_Signal_Source_Fpga")
|
||||
{
|
||||
std::unique_ptr<GNSSBlockInterface> block_ = std::make_unique<DMASignalSourceFPGA>(configuration, role, in_streams,
|
||||
out_streams, queue);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user