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Avoid claah between volk and volk_gnsssdr defines

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Carles Fernandez 2018-04-30 20:58:53 +02:00
parent faf27fff22
commit 0494d9b5a8
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GPG Key ID: 4C583C52B0C3877D
5 changed files with 83 additions and 75 deletions

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@ -40,7 +40,6 @@
#include "gps_sdr_signal_processing.h" #include "gps_sdr_signal_processing.h"
#include "GPS_L1_CA.h" #include "GPS_L1_CA.h"
#include <gnuradio/fft/fft.h> #include <gnuradio/fft/fft.h>
#include <volk/volk.h>
#include <glog/logging.h> #include <glog/logging.h>
#include <new> #include <new>

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@ -40,6 +40,7 @@
#include "acquisition_interface.h" #include "acquisition_interface.h"
#include "gnss_synchro.h" #include "gnss_synchro.h"
#include "pcps_acquisition_fpga.h" #include "pcps_acquisition_fpga.h"
#include <volk_gnsssdr/volk_gnsssdr.h>
#include <string> #include <string>
class ConfigurationInterface; class ConfigurationInterface;

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@ -57,9 +57,9 @@
#define GNSS_SDR_PCPS_ACQUISITION_FPGA_H_ #define GNSS_SDR_PCPS_ACQUISITION_FPGA_H_
#include <gnuradio/block.h>
#include "fpga_acquisition.h" #include "fpga_acquisition.h"
#include "gnss_synchro.h" #include "gnss_synchro.h"
#include <gnuradio/block.h>
typedef struct typedef struct
{ {
@ -72,7 +72,7 @@ typedef struct
int samples_per_code; int samples_per_code;
unsigned int select_queue_Fpga; unsigned int select_queue_Fpga;
std::string device_name; std::string device_name;
lv_16sc_t *all_fft_codes; // memory that contains all the code ffts lv_16sc_t* all_fft_codes; // memory that contains all the code ffts
} pcpsconf_fpga_t; } pcpsconf_fpga_t;

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@ -33,32 +33,27 @@
* ------------------------------------------------------------------------- * -------------------------------------------------------------------------
*/ */
// libraries used by the GIPO
#include <fcntl.h>
#include <sys/mman.h>
// logging
#include <glog/logging.h>
// GPS L1
#include "GPS_L1_CA.h"
#include "fpga_acquisition.h" #include "fpga_acquisition.h"
#include "GPS_L1_CA.h"
#include "gps_sdr_signal_processing.h" #include "gps_sdr_signal_processing.h"
#include <glog/logging.h>
#include <fcntl.h> // libraries used by the GIPO
#include <sys/mman.h> // libraries used by the GIPO
#define PAGE_SIZE 0x10000 // default page size for the multicorrelator memory map
#define MAX_PHASE_STEP_RAD 0.999999999534339 // 1 - pow(2,-31); #define PAGE_SIZE 0x10000 // default page size for the multicorrelator memory map
#define RESET_ACQUISITION 2 // command to reset the multicorrelator #define MAX_PHASE_STEP_RAD 0.999999999534339 // 1 - pow(2,-31);
#define LAUNCH_ACQUISITION 1 // command to launch the multicorrelator #define RESET_ACQUISITION 2 // command to reset the multicorrelator
#define TEST_REG_SANITY_CHECK 0x55AA // value to check the presence of the test register (to detect the hw) #define LAUNCH_ACQUISITION 1 // command to launch the multicorrelator
#define LOCAL_CODE_CLEAR_MEM 0x10000000 // command to clear the internal memory of the multicorrelator #define TEST_REG_SANITY_CHECK 0x55AA // value to check the presence of the test register (to detect the hw)
#define MEM_LOCAL_CODE_WR_ENABLE 0x0C000000 // command to enable the ENA and WR pins of the internal memory of the multicorrelator #define LOCAL_CODE_CLEAR_MEM 0x10000000 // command to clear the internal memory of the multicorrelator
#define POW_2_2 4 // 2^2 (used for the conversion of floating point numbers to integers) #define MEM_LOCAL_CODE_WR_ENABLE 0x0C000000 // command to enable the ENA and WR pins of the internal memory of the multicorrelator
#define POW_2_29 536870912 // 2^29 (used for the conversion of floating point numbers to integers) #define POW_2_2 4 // 2^2 (used for the conversion of floating point numbers to integers)
#define SELECT_LSB 0x00FF // value to select the least significant byte #define POW_2_29 536870912 // 2^29 (used for the conversion of floating point numbers to integers)
#define SELECT_MSB 0XFF00 // value to select the most significant byte #define SELECT_LSB 0x00FF // value to select the least significant byte
#define SELECT_16_BITS 0xFFFF // value to select 16 bits #define SELECT_MSB 0XFF00 // value to select the most significant byte
#define SHL_8_BITS 256 // value used to shift a value 8 bits to the left #define SELECT_16_BITS 0xFFFF // value to select 16 bits
#define SHL_8_BITS 256 // value used to shift a value 8 bits to the left
bool fpga_acquisition::init() bool fpga_acquisition::init()
@ -68,34 +63,36 @@ bool fpga_acquisition::init()
return true; return true;
} }
bool fpga_acquisition::set_local_code(unsigned int PRN) bool fpga_acquisition::set_local_code(unsigned int PRN)
{ {
// select the code with the chosen PRN // select the code with the chosen PRN
fpga_acquisition::fpga_configure_acquisition_local_code( fpga_acquisition::fpga_configure_acquisition_local_code(
&d_all_fft_codes[d_nsamples_total * (PRN - 1)]); &d_all_fft_codes[d_nsamples_total * (PRN - 1)]);
return true; return true;
} }
fpga_acquisition::fpga_acquisition(std::string device_name, fpga_acquisition::fpga_acquisition(std::string device_name,
unsigned int nsamples, unsigned int nsamples,
unsigned int doppler_max, unsigned int doppler_max,
unsigned int nsamples_total, long fs_in, long freq, unsigned int nsamples_total, long fs_in, long freq,
unsigned int sampled_ms, unsigned select_queue, unsigned int sampled_ms, unsigned select_queue,
lv_16sc_t *all_fft_codes) lv_16sc_t *all_fft_codes)
{ {
unsigned int vector_length = nsamples_total*sampled_ms; unsigned int vector_length = nsamples_total * sampled_ms;
// initial values // initial values
d_device_name = device_name; d_device_name = device_name;
d_freq = freq; d_freq = freq;
d_fs_in = fs_in; d_fs_in = fs_in;
d_vector_length = vector_length; d_vector_length = vector_length;
d_nsamples = nsamples; // number of samples not including padding d_nsamples = nsamples; // number of samples not including padding
d_select_queue = select_queue; d_select_queue = select_queue;
d_nsamples_total = nsamples_total; d_nsamples_total = nsamples_total;
d_doppler_max = doppler_max; d_doppler_max = doppler_max;
d_doppler_step = 0; d_doppler_step = 0;
d_fd = 0; // driver descriptor d_fd = 0; // driver descriptor
d_map_base = nullptr; // driver memory map d_map_base = nullptr; // driver memory map
d_all_fft_codes = all_fft_codes; d_all_fft_codes = all_fft_codes;
// open communication with HW accelerator // open communication with HW accelerator
@ -104,9 +101,9 @@ fpga_acquisition::fpga_acquisition(std::string device_name,
LOG(WARNING) << "Cannot open deviceio" << d_device_name; LOG(WARNING) << "Cannot open deviceio" << d_device_name;
} }
d_map_base = reinterpret_cast<volatile unsigned *>(mmap(NULL, PAGE_SIZE, d_map_base = reinterpret_cast<volatile unsigned *>(mmap(NULL, PAGE_SIZE,
PROT_READ | PROT_WRITE, MAP_SHARED, d_fd, 0)); PROT_READ | PROT_WRITE, MAP_SHARED, d_fd, 0));
if (d_map_base == reinterpret_cast<void*>(-1)) if (d_map_base == reinterpret_cast<void *>(-1))
{ {
LOG(WARNING) << "Cannot map the FPGA acquisition module into user memory"; LOG(WARNING) << "Cannot map the FPGA acquisition module into user memory";
} }
@ -121,23 +118,25 @@ fpga_acquisition::fpga_acquisition(std::string device_name,
} }
else else
{ {
LOG(INFO) << "Acquisition test register sanity check success !"; LOG(INFO) << "Acquisition test register sanity check success!";
} }
fpga_acquisition::reset_acquisition(); fpga_acquisition::reset_acquisition();
DLOG(INFO) << "Acquisition FPGA class created"; DLOG(INFO) << "Acquisition FPGA class created";
} }
fpga_acquisition::~fpga_acquisition() fpga_acquisition::~fpga_acquisition()
{ {
close_device(); close_device();
} }
bool fpga_acquisition::free() bool fpga_acquisition::free()
{ {
return true; return true;
} }
unsigned fpga_acquisition::fpga_acquisition_test_register(unsigned writeval) unsigned fpga_acquisition::fpga_acquisition_test_register(unsigned writeval)
{ {
unsigned readval; unsigned readval;
@ -149,6 +148,7 @@ unsigned fpga_acquisition::fpga_acquisition_test_register(unsigned writeval)
return readval; return readval;
} }
void fpga_acquisition::fpga_configure_acquisition_local_code(lv_16sc_t fft_local_code[]) void fpga_acquisition::fpga_configure_acquisition_local_code(lv_16sc_t fft_local_code[])
{ {
unsigned short local_code; unsigned short local_code;
@ -161,19 +161,20 @@ void fpga_acquisition::fpga_configure_acquisition_local_code(lv_16sc_t fft_local
{ {
tmp = fft_local_code[k].real(); tmp = fft_local_code[k].real();
tmp2 = fft_local_code[k].imag(); tmp2 = fft_local_code[k].imag();
local_code = (tmp & SELECT_LSB) | ((tmp2 * SHL_8_BITS) & SELECT_MSB); // put together the real part and the imaginary part local_code = (tmp & SELECT_LSB) | ((tmp2 * SHL_8_BITS) & SELECT_MSB); // put together the real part and the imaginary part
fft_data = MEM_LOCAL_CODE_WR_ENABLE | (local_code & SELECT_16_BITS); fft_data = MEM_LOCAL_CODE_WR_ENABLE | (local_code & SELECT_16_BITS);
d_map_base[4] = fft_data; d_map_base[4] = fft_data;
} }
} }
void fpga_acquisition::run_acquisition(void) void fpga_acquisition::run_acquisition(void)
{ {
// enable interrupts // enable interrupts
int reenable = 1; int reenable = 1;
write(d_fd, reinterpret_cast<void*>(&reenable), sizeof(int)); write(d_fd, reinterpret_cast<void *>(&reenable), sizeof(int));
// launch the acquisition process // launch the acquisition process
d_map_base[6] = LAUNCH_ACQUISITION; // writing anything to reg 6 launches the acquisition process d_map_base[6] = LAUNCH_ACQUISITION; // writing anything to reg 6 launches the acquisition process
int irq_count; int irq_count;
ssize_t nb; ssize_t nb;
@ -186,14 +187,16 @@ void fpga_acquisition::run_acquisition(void)
} }
} }
void fpga_acquisition::configure_acquisition() void fpga_acquisition::configure_acquisition()
{ {
d_map_base[0] = d_select_queue; d_map_base[0] = d_select_queue;
d_map_base[1] = d_vector_length; d_map_base[1] = d_vector_length;
d_map_base[2] = d_nsamples; d_map_base[2] = d_nsamples;
d_map_base[5] = (int) log2((float) d_vector_length); // log2 FFTlength d_map_base[5] = (int)log2((float)d_vector_length); // log2 FFTlength
} }
void fpga_acquisition::set_phase_step(unsigned int doppler_index) void fpga_acquisition::set_phase_step(unsigned int doppler_index)
{ {
float phase_step_rad_real; float phase_step_rad_real;
@ -212,13 +215,14 @@ void fpga_acquisition::set_phase_step(unsigned int doppler_index)
{ {
phase_step_rad_real = MAX_PHASE_STEP_RAD; phase_step_rad_real = MAX_PHASE_STEP_RAD;
} }
phase_step_rad_int_temp = phase_step_rad_real * POW_2_2; // * 2^2 phase_step_rad_int_temp = phase_step_rad_real * POW_2_2; // * 2^2
phase_step_rad_int = (int32_t) (phase_step_rad_int_temp * (POW_2_29)); // * 2^29 (in total it makes x2^31 in two steps to avoid the warnings phase_step_rad_int = (int32_t)(phase_step_rad_int_temp * (POW_2_29)); // * 2^29 (in total it makes x2^31 in two steps to avoid the warnings
d_map_base[3] = phase_step_rad_int; d_map_base[3] = phase_step_rad_int;
} }
void fpga_acquisition::read_acquisition_results(uint32_t* max_index,
float* max_magnitude, unsigned *initial_sample, float *power_sum) void fpga_acquisition::read_acquisition_results(uint32_t *max_index,
float *max_magnitude, unsigned *initial_sample, float *power_sum)
{ {
unsigned readval = 0; unsigned readval = 0;
readval = d_map_base[1]; readval = d_map_base[1];
@ -231,28 +235,31 @@ void fpga_acquisition::read_acquisition_results(uint32_t* max_index,
*max_index = readval; *max_index = readval;
} }
void fpga_acquisition::block_samples() void fpga_acquisition::block_samples()
{ {
d_map_base[14] = 1; // block the samples d_map_base[14] = 1; // block the samples
} }
void fpga_acquisition::unblock_samples() void fpga_acquisition::unblock_samples()
{ {
d_map_base[14] = 0; // unblock the samples d_map_base[14] = 0; // unblock the samples
} }
void fpga_acquisition::close_device() void fpga_acquisition::close_device()
{ {
unsigned * aux = const_cast<unsigned*>(d_map_base); unsigned *aux = const_cast<unsigned *>(d_map_base);
if (munmap(static_cast<void*>(aux), PAGE_SIZE) == -1) if (munmap(static_cast<void *>(aux), PAGE_SIZE) == -1)
{ {
printf("Failed to unmap memory uio\n"); printf("Failed to unmap memory uio\n");
} }
close(d_fd); close(d_fd);
} }
void fpga_acquisition::reset_acquisition(void) void fpga_acquisition::reset_acquisition(void)
{ {
d_map_base[6] = RESET_ACQUISITION; // writing a 2 to d_map_base[6] resets the multicorrelator d_map_base[6] = RESET_ACQUISITION; // writing a 2 to d_map_base[6] resets the multicorrelator
} }

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@ -36,8 +36,8 @@
#ifndef GNSS_SDR_FPGA_ACQUISITION_H_ #ifndef GNSS_SDR_FPGA_ACQUISITION_H_
#define GNSS_SDR_FPGA_ACQUISITION_H_ #define GNSS_SDR_FPGA_ACQUISITION_H_
#include <volk_gnsssdr/volk_gnsssdr.h>
#include <gnuradio/fft/fft.h> #include <gnuradio/fft/fft.h>
#include <volk/volk.h>
/*! /*!
* \brief Class that implements carrier wipe-off and correlators. * \brief Class that implements carrier wipe-off and correlators.
@ -46,18 +46,20 @@ class fpga_acquisition
{ {
public: public:
fpga_acquisition(std::string device_name, fpga_acquisition(std::string device_name,
unsigned int nsamples, unsigned int nsamples,
unsigned int doppler_max, unsigned int doppler_max,
unsigned int nsamples_total, long fs_in, long freq, unsigned int nsamples_total, long fs_in, long freq,
unsigned int sampled_ms, unsigned select_queue, unsigned int sampled_ms, unsigned select_queue,
lv_16sc_t *all_fft_codes); lv_16sc_t *all_fft_codes);
~fpga_acquisition();bool init();bool set_local_code( ~fpga_acquisition();
unsigned int PRN); bool init();
bool set_local_code(
unsigned int PRN);
bool free(); bool free();
void run_acquisition(void); void run_acquisition(void);
void set_phase_step(unsigned int doppler_index); void set_phase_step(unsigned int doppler_index);
void read_acquisition_results(uint32_t* max_index, float* max_magnitude, void read_acquisition_results(uint32_t *max_index, float *max_magnitude,
unsigned *initial_sample, float *power_sum); unsigned *initial_sample, float *power_sum);
void block_samples(); void block_samples();
void unblock_samples(); void unblock_samples();
@ -80,21 +82,20 @@ public:
} }
private: private:
long d_freq; long d_freq;
long d_fs_in; long d_fs_in;
gr::fft::fft_complex* d_fft_if; // function used to run the fft of the local codes gr::fft::fft_complex *d_fft_if; // function used to run the fft of the local codes
// data related to the hardware module and the driver // data related to the hardware module and the driver
int d_fd; // driver descriptor int d_fd; // driver descriptor
volatile unsigned *d_map_base; // driver memory map volatile unsigned *d_map_base; // driver memory map
lv_16sc_t *d_all_fft_codes; // memory that contains all the code ffts lv_16sc_t *d_all_fft_codes; // memory that contains all the code ffts
unsigned int d_vector_length; // number of samples incluing padding and number of ms unsigned int d_vector_length; // number of samples incluing padding and number of ms
unsigned int d_nsamples_total; // number of samples including padding unsigned int d_nsamples_total; // number of samples including padding
unsigned int d_nsamples; // number of samples not including padding unsigned int d_nsamples; // number of samples not including padding
unsigned int d_select_queue; // queue selection unsigned int d_select_queue; // queue selection
std::string d_device_name; // HW device name std::string d_device_name; // HW device name
unsigned int d_doppler_max; // max doppler unsigned int d_doppler_max; // max doppler
unsigned int d_doppler_step; // doppler step unsigned int d_doppler_step; // doppler step
// FPGA private functions // FPGA private functions
unsigned fpga_acquisition_test_register(unsigned writeval); unsigned fpga_acquisition_test_register(unsigned writeval);
void fpga_configure_acquisition_local_code(lv_16sc_t fft_local_code[]); void fpga_configure_acquisition_local_code(lv_16sc_t fft_local_code[]);