From 55cd4e3b80336ac110b70919c8cbe4eff1756622 Mon Sep 17 00:00:00 2001 From: osmarks Date: Thu, 25 Dec 2025 11:39:54 +0000 Subject: [PATCH] =?UTF-8?q?Create=20=E2=80=98emerald=5Frapids=E2=80=99?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- emerald_rapids.myco | 5 +++++ 1 file changed, 5 insertions(+) create mode 100644 emerald_rapids.myco diff --git a/emerald_rapids.myco b/emerald_rapids.myco new file mode 100644 index 0000000..b8650d2 --- /dev/null +++ b/emerald_rapids.myco @@ -0,0 +1,5 @@ +Emerald Rapids is [[Intel]]'s fifth generation of "Xeon Scalable" server [[central processing unit|CPU]]s, succeeding [[Sapphire Rapids]]. Emerald Rapids uses the same core design as Sapphire Rapids, but a redesigned chiplet layout (two die instead of four) and much more [[L3 cache]]. + +Emerald Rapids uses the [[Eagle Stream]] platform, with 8-channel [[DDR5]] up to 5600MT/s (varies by SKU) and 80 PCIe 5.0 lanes. + +=> https://newsletter.semianalysis.com/p/intel-emerald-rapids-backtracks-on \ No newline at end of file