mirror of https://github.com/gnss-sdr/gnss-sdr
43874 lines
1.2 MiB
43874 lines
1.2 MiB
Library {
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Name "gnss_sdr_tcp_connector_tracking_lib"
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Version 7.6
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Created "Thu Mar 08 11:41:48 2012"
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Creator "David Pubill"
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UpdateHistory "UpdateHistoryNever"
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ModifiedByFormat "%<Auto>"
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LastModifiedBy "gnss"
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ModifiedDateFormat "%<Auto>"
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LastModifiedDate "Wed Jun 27 13:07:39 2012"
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RTWModifiedTimeStamp 262702783
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|
|
SID "3:11758"
|
|
Ports [3, 1]
|
|
Position [195, 80, 215, 100]
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ShowName off
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IconShape "round"
|
|
Inputs "-++"
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|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
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|
SaturateOnIntegerOverflow off
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Block {
|
|
BlockType UnitDelay
|
|
Name "Unit Delay"
|
|
SID "3:11759"
|
|
Position [230, 118, 265, 152]
|
|
BlockMirror on
|
|
ShowName off
|
|
X0 "100*10"
|
|
SampleTime "-1"
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|
}
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Block {
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BlockType Outport
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Name "mean"
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SID "3:11760"
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Position [425, 83, 455, 97]
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IconDisplay "Port number"
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SrcBlock "Sum"
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DstBlock "Unit Delay"
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DstPort 1
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DstBlock "Gain"
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DstPort 1
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SrcBlock "Unit Delay"
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SrcPort 1
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DstBlock "Sum"
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DstPort 3
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SrcPort 1
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DstPort 1
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SrcBlock "in"
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SrcPort 1
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DstBlock "Sum"
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DstPort 2
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DstBlock "Integer Delay"
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DstPort 1
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Line {
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SrcBlock "Integer Delay"
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SrcPort 1
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Points [40, 0]
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DstBlock "Sum"
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DstPort 1
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}
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Block {
|
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BlockType Math
|
|
Name "Power\nto\nAmplitude"
|
|
SID "3:11763"
|
|
Ports [1, 1]
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|
Position [435, 70, 465, 100]
|
|
Operator "sqrt"
|
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}
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Block {
|
|
BlockType Math
|
|
Name "Re^2"
|
|
SID "3:11765"
|
|
Ports [1, 1]
|
|
Position [335, 30, 365, 60]
|
|
Operator "square"
|
|
}
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Block {
|
|
BlockType Sum
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|
Name "Sum"
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SID "3:11769"
|
|
Ports [2, 1]
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Position [380, 75, 400, 95]
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ShowName off
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IconShape "round"
|
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Inputs "+|+"
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InputSameDT off
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|
OutDataTypeStr "Inherit: Inherit via internal rule"
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SaturateOnIntegerOverflow off
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Block {
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|
BlockType Outport
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|
Name "out"
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|
SID "3:11777"
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|
Position [490, 78, 520, 92]
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IconDisplay "Port number"
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Line {
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SrcBlock "Im^2"
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SrcPort 1
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Points [20, 0]
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DstBlock "Sum"
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DstPort 2
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Line {
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SrcBlock "Re^2"
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SrcPort 1
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Points [20, 0]
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DstBlock "Sum"
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DstPort 1
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Line {
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|
SrcBlock "Complex to\nReal-Imag"
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|
SrcPort 1
|
|
Points [15, 0; 0, -30]
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DstBlock "Abs(Re)"
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|
DstPort 1
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Line {
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SrcBlock "Abs(Re)"
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SrcPort 1
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DstBlock "Mean(Re)"
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DstPort 1
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Line {
|
|
SrcBlock "Complex to\nReal-Imag"
|
|
SrcPort 2
|
|
Points [20, 0]
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DstBlock "Abs(Im)"
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|
DstPort 1
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Line {
|
|
SrcBlock "Abs(Im)"
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SrcPort 1
|
|
DstBlock "Mean(Im)"
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DstPort 1
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SrcBlock "Sum"
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SrcPort 1
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DstBlock "Power\nto\nAmplitude"
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DstPort 1
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Line {
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SrcBlock "Mean(Im)"
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SrcPort 1
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DstBlock "Im^2"
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DstPort 1
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SrcBlock "Mean(Re)"
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SrcPort 1
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DstBlock "Re^2"
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DstPort 1
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SrcBlock "in"
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SrcPort 1
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DstBlock "Complex to\nReal-Imag"
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DstPort 1
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SrcBlock "Power\nto\nAmplitude"
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SrcPort 1
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DstPort 1
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}
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Block {
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|
BlockType Outport
|
|
Name "E'"
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|
SID "3:11778"
|
|
Position [360, 38, 390, 52]
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|
IconDisplay "Port number"
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}
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Block {
|
|
BlockType Outport
|
|
Name "P'"
|
|
SID "3:11779"
|
|
Position [360, 118, 390, 132]
|
|
Port "2"
|
|
IconDisplay "Port number"
|
|
}
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Block {
|
|
BlockType Outport
|
|
Name "L'"
|
|
SID "3:11780"
|
|
Position [360, 208, 390, 222]
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|
Port "3"
|
|
IconDisplay "Port number"
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SrcBlock "P"
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SrcPort 1
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Points [25, 0]
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DstBlock "P Normalisation"
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DstPort 1
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Branch {
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Labels [0, 0]
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Points [0, 40]
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DstBlock "Power Estimation"
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DstPort 1
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Line {
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SrcBlock "E"
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SrcPort 1
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DstBlock "E Normalisation"
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DstPort 1
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Line {
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SrcBlock "E Normalisation"
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SrcPort 1
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DstBlock "E'"
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DstPort 1
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Line {
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SrcBlock "P Normalisation"
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SrcPort 1
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DstBlock "P'"
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DstPort 1
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Line {
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SrcBlock "L"
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SrcPort 1
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DstBlock "L Normalisation"
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DstPort 1
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Line {
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SrcBlock "L Normalisation"
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SrcPort 1
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DstBlock "L'"
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DstPort 1
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Line {
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SrcBlock "Power Estimation"
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SrcPort 1
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Points [30, 0; 0, 0]
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Branch {
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Points [0, -25]
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Branch {
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Points [0, -80]
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DstBlock "E Normalisation"
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DstPort 2
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Branch {
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DstBlock "P Normalisation"
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DstPort 2
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Branch {
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Points [0, 65]
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DstBlock "L Normalisation"
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DstPort 2
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}
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Block {
|
|
BlockType Sum
|
|
Name "Sum"
|
|
SID "3:11783"
|
|
Ports [2, 1]
|
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Position [500, 75, 520, 95]
|
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ShowName off
|
|
IconShape "round"
|
|
Inputs "|++"
|
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InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
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SaturateOnIntegerOverflow off
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}
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Block {
|
|
BlockType Terminator
|
|
Name "Terminator"
|
|
SID "3:11784"
|
|
Position [155, 75, 175, 95]
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ShowName off
|
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}
|
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Block {
|
|
BlockType SubSystem
|
|
Name "Zero Order\nLow-Pass Filter"
|
|
SID "3:11785"
|
|
Ports [1, 1]
|
|
Position [405, 59, 460, 111]
|
|
MinAlgLoopOccurrences off
|
|
PropExecContextOutsideSubsystem off
|
|
RTWSystemCode "Auto"
|
|
FunctionWithSeparateData off
|
|
Opaque off
|
|
RequestExecContextInheritance off
|
|
MaskHideContents off
|
|
System {
|
|
Name "Zero Order\nLow-Pass Filter"
|
|
Location [217, 135, 598, 254]
|
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Open off
|
|
ModelBrowserVisibility off
|
|
ModelBrowserWidth 200
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|
ScreenColor "white"
|
|
PaperOrientation "landscape"
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PaperPositionMode "auto"
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PaperType "A4"
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|
PaperUnits "centimeters"
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|
TiledPaperMargins [1.270000, 1.270000, 1.270000, 1.270000]
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TiledPageScale 1
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ShowPageBoundaries off
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ZoomFactor "100"
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Block {
|
|
BlockType Inport
|
|
Name "in"
|
|
SID "3:11894"
|
|
Position [25, 28, 55, 42]
|
|
IconDisplay "Port number"
|
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}
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Block {
|
|
BlockType Constant
|
|
Name "B"
|
|
SID "3:11787"
|
|
Position [15, 66, 65, 94]
|
|
ShowName off
|
|
Value "B_DLL"
|
|
SampleTime "T"
|
|
}
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|
Block {
|
|
BlockType Fcn
|
|
Name "Fcn"
|
|
SID "3:11788"
|
|
Position [100, 63, 245, 97]
|
|
ShowName off
|
|
Expr "(4*u*T) / (1 + 2*u*T);"
|
|
}
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Block {
|
|
BlockType Product
|
|
Name "Product"
|
|
SID "3:11789"
|
|
Ports [2, 1]
|
|
Position [285, 42, 315, 73]
|
|
ShowName off
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
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Block {
|
|
BlockType Outport
|
|
Name "out"
|
|
SID "3:11895"
|
|
Position [345, 53, 375, 67]
|
|
IconDisplay "Port number"
|
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|
SrcBlock "Fcn"
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SrcPort 1
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|
Points [20, 0]
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DstBlock "Product"
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DstPort 2
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Line {
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|
SrcBlock "B"
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SrcPort 1
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|
DstBlock "Fcn"
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DstPort 1
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Line {
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SrcBlock "Product"
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SrcPort 1
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DstBlock "out"
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DstPort 1
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SrcBlock "in"
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SrcPort 1
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Points [210, 0]
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DstBlock "Product"
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DstPort 1
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}
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Block {
|
|
BlockType Gain
|
|
Name "[chip] to [s]"
|
|
SID "3:11862"
|
|
Position [290, 70, 320, 100]
|
|
Gain "Tc"
|
|
}
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|
Block {
|
|
BlockType Gain
|
|
Name "[rad/s] to [s/Ti]"
|
|
SID "3:11795"
|
|
Position [290, 174, 415, 206]
|
|
Gain "-Ti/(2*pi*f0)"
|
|
ParamDataTypeStr "Inherit: Inherit via internal rule"
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
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Block {
|
|
BlockType Outport
|
|
Name "code_error [s]"
|
|
SID "3:11798"
|
|
Position [565, 78, 595, 92]
|
|
IconDisplay "Port number"
|
|
}
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Line {
|
|
SrcBlock "Gain"
|
|
SrcPort 1
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|
DstBlock "Zero Order\nLow-Pass Filter"
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DstPort 1
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Line {
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SrcBlock "L"
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SrcPort 1
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|
DstBlock "Normalization"
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DstPort 3
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|
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Line {
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|
SrcBlock "P"
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|
SrcPort 1
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|
DstBlock "Normalization"
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DstPort 2
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|
SrcBlock "E"
|
|
SrcPort 1
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|
DstBlock "Normalization"
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DstPort 1
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|
|
SrcBlock "[chip] to [s]"
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|
SrcPort 1
|
|
DstBlock "Gain"
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DstPort 1
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Line {
|
|
SrcBlock "Early-Late Power"
|
|
SrcPort 1
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|
DstBlock "[chip] to [s]"
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|
DstPort 1
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|
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Line {
|
|
SrcBlock "[rad/s] to [s/Ti]"
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|
SrcPort 1
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Points [90, 0]
|
|
DstBlock "Delay"
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DstPort 1
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|
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Line {
|
|
SrcBlock "carrier_aid"
|
|
SrcPort 1
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|
DstBlock "[rad/s] to [s/Ti]"
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DstPort 1
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Line {
|
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SrcBlock "Sum"
|
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SrcPort 1
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DstBlock "code_error [s]"
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DstPort 1
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Line {
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SrcBlock "Delay"
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SrcPort 1
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DstBlock "Sum"
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DstPort 2
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SrcBlock "Normalization"
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SrcPort 3
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DstBlock "Early-Late Power"
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DstPort 2
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SrcBlock "Normalization"
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SrcPort 1
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|
DstBlock "Early-Late Power"
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DstPort 1
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|
SrcBlock "Normalization"
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SrcPort 2
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|
DstBlock "Terminator"
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DstPort 1
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Line {
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|
SrcBlock "Zero Order\nLow-Pass Filter"
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SrcPort 1
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|
DstBlock "Sum"
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DstPort 1
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}
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}
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|
Block {
|
|
BlockType DataTypeConversion
|
|
Name "Data Type \nConversion1"
|
|
SID "3:11799"
|
|
Position [580, 115, 620, 155]
|
|
ShowName off
|
|
OutDataTypeStr "single"
|
|
}
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Block {
|
|
BlockType DataTypeConversion
|
|
Name "Data Type \nConversion2"
|
|
SID "3:11800"
|
|
Position [180, 55, 220, 95]
|
|
ShowName off
|
|
OutDataTypeStr "double"
|
|
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|
Block {
|
|
BlockType DataTypeConversion
|
|
Name "Data Type \nConversion3"
|
|
SID "3:11801"
|
|
Position [580, 340, 620, 380]
|
|
ShowName off
|
|
OutDataTypeStr "single"
|
|
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|
Block {
|
|
BlockType DataTypeConversion
|
|
Name "Data Type \nConversion4"
|
|
SID "3:11802"
|
|
Position [580, 265, 620, 305]
|
|
ShowName off
|
|
OutDataTypeStr "single"
|
|
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|
Block {
|
|
BlockType DataTypeConversion
|
|
Name "Data Type \nConversion5"
|
|
SID "3:11803"
|
|
Position [180, 135, 220, 175]
|
|
ShowName off
|
|
OutDataTypeStr "double"
|
|
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|
|
Block {
|
|
BlockType DataTypeConversion
|
|
Name "Data Type \nConversion6"
|
|
SID "3:11804"
|
|
Position [180, 250, 220, 290]
|
|
ShowName off
|
|
OutDataTypeStr "double"
|
|
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|
|
Block {
|
|
BlockType Mux
|
|
Name "Mux"
|
|
SID "3:11886"
|
|
Ports [3, 1]
|
|
Position [335, 159, 340, 241]
|
|
ShowName off
|
|
Inputs "3"
|
|
DisplayOption "bar"
|
|
}
|
|
Block {
|
|
BlockType RealImagToComplex
|
|
Name "Real-Imag to\nComplex"
|
|
SID "3:11806"
|
|
Ports [2, 1]
|
|
Position [125, 36, 160, 109]
|
|
ShowName off
|
|
Input "Real and imag"
|
|
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|
|
Block {
|
|
BlockType RealImagToComplex
|
|
Name "Real-Imag to\nComplex1"
|
|
SID "3:11807"
|
|
Ports [2, 1]
|
|
Position [125, 116, 160, 189]
|
|
ShowName off
|
|
Input "Real and imag"
|
|
}
|
|
Block {
|
|
BlockType RealImagToComplex
|
|
Name "Real-Imag to\nComplex2"
|
|
SID "3:11808"
|
|
Ports [2, 1]
|
|
Position [125, 231, 160, 304]
|
|
ShowName off
|
|
Input "Real and imag"
|
|
}
|
|
Block {
|
|
BlockType Gain
|
|
Name "[rad/s] to [Hz]"
|
|
SID "3:11812"
|
|
Position [485, 345, 515, 375]
|
|
Gain "1/(2*pi)"
|
|
ParamDataTypeStr "Inherit: Inherit via internal rule"
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
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|
SaturateOnIntegerOverflow off
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}
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Block {
|
|
BlockType Outport
|
|
Name "control_id_"
|
|
SID "3:11813"
|
|
Position [655, 13, 685, 27]
|
|
IconDisplay "Port number"
|
|
}
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|
Block {
|
|
BlockType Outport
|
|
Name "code_error_[s]"
|
|
SID "3:11814"
|
|
Position [655, 128, 685, 142]
|
|
Port "2"
|
|
IconDisplay "Port number"
|
|
}
|
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Block {
|
|
BlockType Outport
|
|
Name "carrier_error"
|
|
SID "3:11815"
|
|
Position [655, 278, 685, 292]
|
|
Port "3"
|
|
IconDisplay "Port number"
|
|
}
|
|
Block {
|
|
BlockType Outport
|
|
Name "carrier_doppler_[Hz]"
|
|
SID "3:11816"
|
|
Position [655, 353, 685, 367]
|
|
Port "4"
|
|
IconDisplay "Port number"
|
|
}
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|
UseBitMask on
|
|
NumInputPorts "1"
|
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BitMask "bin2dec('0000100000000000000000000')"
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|
BitMaskRealWorld "Stored Integer"
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}
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Block {
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BlockType Reference
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Name "Bitwise\nOperator9"
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SID "76"
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Ports [1, 1]
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Position [425, 906, 465, 944]
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LibraryVersion "1.302"
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SourceBlock "simulink/Logic and Bit\nOperations/Bitwise\nOperator"
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|
SourceType "Bitwise Operator"
|
|
logicop "AND"
|
|
UseBitMask on
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|
NumInputPorts "1"
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|
BitMask "bin2dec('0000010000000000000000000')"
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|
BitMaskRealWorld "Stored Integer"
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}
|
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Block {
|
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BlockType Reference
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Name "Compare\nTo Zero1"
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SID "77"
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Ports [1, 1]
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Position [480, 245, 510, 275]
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LibraryVersion "1.302"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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SourceType "Compare To Zero"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
|
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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relop ">"
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LogicOutDataTypeMode "uint8"
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ZeroCross off
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}
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Block {
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BlockType Reference
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Name "Compare\nTo Zero10"
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SID "78"
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Ports [1, 1]
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Position [495, 1840, 525, 1870]
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LibraryVersion "1.302"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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SourceType "Compare To Zero"
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ShowPortLabels "FromPortIcon"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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|
RTWMemSecDataConstants "Inherit from model"
|
|
RTWMemSecDataInternal "Inherit from model"
|
|
RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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relop ">"
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LogicOutDataTypeMode "uint8"
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}
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Block {
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BlockType Reference
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Name "Compare\nTo Zero11"
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SID "79"
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Ports [1, 1]
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Position [495, 2050, 525, 2080]
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LibraryVersion "1.302"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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SourceType "Compare To Zero"
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ShowPortLabels "FromPortIcon"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
|
|
RTWMemSecDataInternal "Inherit from model"
|
|
RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
|
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relop ">"
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LogicOutDataTypeMode "uint8"
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ZeroCross off
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}
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Block {
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BlockType Reference
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Name "Compare\nTo Zero12"
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SID "80"
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|
Ports [1, 1]
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Position [495, 2280, 525, 2310]
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LibraryVersion "1.302"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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SourceType "Compare To Zero"
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ShowPortLabels "FromPortIcon"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
|
|
RTWMemSecDataConstants "Inherit from model"
|
|
RTWMemSecDataInternal "Inherit from model"
|
|
RTWMemSecDataParameters "Inherit from model"
|
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GeneratePreprocessorConditionals off
|
|
relop ">"
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LogicOutDataTypeMode "uint8"
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ZeroCross off
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}
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Block {
|
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BlockType Reference
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Name "Compare\nTo Zero13"
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|
SID "81"
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|
Ports [1, 1]
|
|
Position [495, 2525, 525, 2555]
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LibraryVersion "1.302"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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SourceType "Compare To Zero"
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ShowPortLabels "FromPortIcon"
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SystemSampleTime "-1"
|
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FunctionWithSeparateData off
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|
RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
|
|
RTWMemSecDataConstants "Inherit from model"
|
|
RTWMemSecDataInternal "Inherit from model"
|
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
|
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relop ">"
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LogicOutDataTypeMode "uint8"
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ZeroCross off
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}
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Block {
|
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BlockType Reference
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Name "Compare\nTo Zero14"
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SID "82"
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|
Ports [1, 1]
|
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Position [495, 2780, 525, 2810]
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LibraryVersion "1.302"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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SourceType "Compare To Zero"
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ShowPortLabels "FromPortIcon"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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|
RTWMemSecDataConstants "Inherit from model"
|
|
RTWMemSecDataInternal "Inherit from model"
|
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
|
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relop ">"
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LogicOutDataTypeMode "uint8"
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ZeroCross off
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}
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Block {
|
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BlockType Reference
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Name "Compare\nTo Zero15"
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SID "83"
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|
Ports [1, 1]
|
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Position [495, 3045, 525, 3075]
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|
LibraryVersion "1.302"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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SourceType "Compare To Zero"
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ShowPortLabels "FromPortIcon"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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|
RTWMemSecDataConstants "Inherit from model"
|
|
RTWMemSecDataInternal "Inherit from model"
|
|
RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
|
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relop ">"
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LogicOutDataTypeMode "uint8"
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ZeroCross off
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}
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Block {
|
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BlockType Reference
|
|
Name "Compare\nTo Zero16"
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SID "84"
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|
Ports [1, 1]
|
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Position [495, 3320, 525, 3350]
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|
LibraryVersion "1.302"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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SourceType "Compare To Zero"
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ShowPortLabels "FromPortIcon"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
|
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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|
RTWMemSecDataConstants "Inherit from model"
|
|
RTWMemSecDataInternal "Inherit from model"
|
|
RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
|
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relop ">"
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LogicOutDataTypeMode "uint8"
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ZeroCross off
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}
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Block {
|
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BlockType Reference
|
|
Name "Compare\nTo Zero17"
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SID "85"
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|
Ports [1, 1]
|
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Position [495, 3600, 525, 3630]
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LibraryVersion "1.302"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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|
SourceType "Compare To Zero"
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ShowPortLabels "FromPortIcon"
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SystemSampleTime "-1"
|
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FunctionWithSeparateData off
|
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
|
|
RTWMemSecDataConstants "Inherit from model"
|
|
RTWMemSecDataInternal "Inherit from model"
|
|
RTWMemSecDataParameters "Inherit from model"
|
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GeneratePreprocessorConditionals off
|
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relop ">"
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LogicOutDataTypeMode "uint8"
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ZeroCross off
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}
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Block {
|
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BlockType Reference
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Name "Compare\nTo Zero18"
|
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SID "86"
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|
Ports [1, 1]
|
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Position [495, 3890, 525, 3920]
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LibraryVersion "1.302"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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SourceType "Compare To Zero"
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ShowPortLabels "FromPortIcon"
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SystemSampleTime "-1"
|
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FunctionWithSeparateData off
|
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
|
|
RTWMemSecDataConstants "Inherit from model"
|
|
RTWMemSecDataInternal "Inherit from model"
|
|
RTWMemSecDataParameters "Inherit from model"
|
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GeneratePreprocessorConditionals off
|
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relop ">"
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LogicOutDataTypeMode "uint8"
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ZeroCross off
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}
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Block {
|
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BlockType Reference
|
|
Name "Compare\nTo Zero19"
|
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SID "87"
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|
Ports [1, 1]
|
|
Position [495, 4185, 525, 4215]
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LibraryVersion "1.302"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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|
SourceType "Compare To Zero"
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ShowPortLabels "FromPortIcon"
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SystemSampleTime "-1"
|
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FunctionWithSeparateData off
|
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
|
|
RTWMemSecDataConstants "Inherit from model"
|
|
RTWMemSecDataInternal "Inherit from model"
|
|
RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
|
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relop ">"
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LogicOutDataTypeMode "uint8"
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ZeroCross off
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}
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Block {
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BlockType Reference
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Name "Compare\nTo Zero2"
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SID "88"
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|
Ports [1, 1]
|
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Position [485, 430, 515, 460]
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LibraryVersion "1.302"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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SourceType "Compare To Zero"
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ShowPortLabels "FromPortIcon"
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SystemSampleTime "-1"
|
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FunctionWithSeparateData off
|
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
|
|
RTWMemSecDataConstants "Inherit from model"
|
|
RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
|
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relop ">"
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LogicOutDataTypeMode "uint8"
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ZeroCross off
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}
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Block {
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BlockType Reference
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Name "Compare\nTo Zero20"
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SID "89"
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|
Ports [1, 1]
|
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Position [495, 4490, 525, 4520]
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LibraryVersion "1.302"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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SourceType "Compare To Zero"
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ShowPortLabels "FromPortIcon"
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SystemSampleTime "-1"
|
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
|
|
RTWMemSecDataConstants "Inherit from model"
|
|
RTWMemSecDataInternal "Inherit from model"
|
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
|
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relop ">"
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LogicOutDataTypeMode "uint8"
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ZeroCross off
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}
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Block {
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BlockType Reference
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Name "Compare\nTo Zero21"
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SID "90"
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Ports [1, 1]
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Position [495, 4800, 525, 4830]
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LibraryVersion "1.302"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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SourceType "Compare To Zero"
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ShowPortLabels "FromPortIcon"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
|
|
RTWMemSecDataConstants "Inherit from model"
|
|
RTWMemSecDataInternal "Inherit from model"
|
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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relop ">"
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LogicOutDataTypeMode "uint8"
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ZeroCross off
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}
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Block {
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BlockType Reference
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Name "Compare\nTo Zero22"
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SID "91"
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Ports [1, 1]
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Position [500, 5115, 530, 5145]
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LibraryVersion "1.302"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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SourceType "Compare To Zero"
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ShowPortLabels "FromPortIcon"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
|
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RTWMemSecDataConstants "Inherit from model"
|
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RTWMemSecDataInternal "Inherit from model"
|
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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relop ">"
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LogicOutDataTypeMode "uint8"
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ZeroCross off
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}
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Block {
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BlockType Reference
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Name "Compare\nTo Zero23"
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SID "92"
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Ports [1, 1]
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Position [500, 5435, 530, 5465]
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LibraryVersion "1.302"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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SourceType "Compare To Zero"
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ShowPortLabels "FromPortIcon"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
|
|
RTWMemSecDataConstants "Inherit from model"
|
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RTWMemSecDataInternal "Inherit from model"
|
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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relop ">"
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LogicOutDataTypeMode "uint8"
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ZeroCross off
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}
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Block {
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BlockType Reference
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Name "Compare\nTo Zero24"
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SID "93"
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Ports [1, 1]
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Position [500, 5760, 530, 5790]
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LibraryVersion "1.302"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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SourceType "Compare To Zero"
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ShowPortLabels "FromPortIcon"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
|
|
RTWMemSecDataConstants "Inherit from model"
|
|
RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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relop ">"
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LogicOutDataTypeMode "uint8"
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ZeroCross off
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}
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Block {
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BlockType Reference
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Name "Compare\nTo Zero3"
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SID "94"
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|
Ports [1, 1]
|
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Position [485, 580, 515, 610]
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LibraryVersion "1.302"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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SourceType "Compare To Zero"
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ShowPortLabels "FromPortIcon"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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|
RTWMemSecFuncExecute "Inherit from model"
|
|
RTWMemSecDataConstants "Inherit from model"
|
|
RTWMemSecDataInternal "Inherit from model"
|
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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relop ">"
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LogicOutDataTypeMode "uint8"
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ZeroCross off
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}
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Block {
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BlockType Reference
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Name "Compare\nTo Zero4"
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|
SID "95"
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|
Ports [1, 1]
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Position [490, 740, 520, 770]
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LibraryVersion "1.302"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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SourceType "Compare To Zero"
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ShowPortLabels "FromPortIcon"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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|
RTWMemSecFuncExecute "Inherit from model"
|
|
RTWMemSecDataConstants "Inherit from model"
|
|
RTWMemSecDataInternal "Inherit from model"
|
|
RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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relop ">"
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LogicOutDataTypeMode "uint8"
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ZeroCross off
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}
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Block {
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BlockType Reference
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Name "Compare\nTo Zero5"
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|
SID "96"
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|
Ports [1, 1]
|
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Position [495, 910, 525, 940]
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LibraryVersion "1.302"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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SourceType "Compare To Zero"
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ShowPortLabels "FromPortIcon"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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|
RTWMemSecFuncInitTerm "Inherit from model"
|
|
RTWMemSecFuncExecute "Inherit from model"
|
|
RTWMemSecDataConstants "Inherit from model"
|
|
RTWMemSecDataInternal "Inherit from model"
|
|
RTWMemSecDataParameters "Inherit from model"
|
|
GeneratePreprocessorConditionals off
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relop ">"
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LogicOutDataTypeMode "uint8"
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ZeroCross off
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}
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Block {
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BlockType Reference
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|
Name "Compare\nTo Zero6"
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|
SID "97"
|
|
Ports [1, 1]
|
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Position [495, 1090, 525, 1120]
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|
LibraryVersion "1.302"
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|
SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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SourceType "Compare To Zero"
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ShowPortLabels "FromPortIcon"
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SystemSampleTime "-1"
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|
FunctionWithSeparateData off
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|
RTWMemSecFuncInitTerm "Inherit from model"
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|
RTWMemSecFuncExecute "Inherit from model"
|
|
RTWMemSecDataConstants "Inherit from model"
|
|
RTWMemSecDataInternal "Inherit from model"
|
|
RTWMemSecDataParameters "Inherit from model"
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|
GeneratePreprocessorConditionals off
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relop ">"
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LogicOutDataTypeMode "uint8"
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ZeroCross off
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}
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Block {
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BlockType Reference
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|
Name "Compare\nTo Zero7"
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|
SID "98"
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|
Ports [1, 1]
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Position [495, 1270, 525, 1300]
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|
LibraryVersion "1.302"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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|
SourceType "Compare To Zero"
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ShowPortLabels "FromPortIcon"
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|
SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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|
RTWMemSecFuncExecute "Inherit from model"
|
|
RTWMemSecDataConstants "Inherit from model"
|
|
RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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relop ">"
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LogicOutDataTypeMode "uint8"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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LogicOutDataTypeMode "uint8"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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LogicOutDataTypeMode "uint8"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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LogicOutDataTypeMode "uint8"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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Decimation "1"
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Block {
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SID "831"
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Decimation "1"
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Block {
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SID "832"
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Position [640, 197, 730, 223]
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Decimation "1"
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Block {
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SID "833"
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Decimation "1"
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Lockdown off
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Block {
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BlockType Math
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Name "Math\nFunction1"
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SID "834"
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Ports [2, 1]
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Position [420, 177, 450, 208]
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Operator "pow"
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Block {
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BlockType Math
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Name "Math\nFunction10"
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SID "835"
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Ports [2, 1]
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Position [435, 1772, 465, 1803]
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Operator "pow"
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Block {
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BlockType Math
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Name "Math\nFunction11"
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SID "836"
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Ports [2, 1]
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Position [435, 1982, 465, 2013]
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Operator "pow"
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Block {
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BlockType Math
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Name "Math\nFunction12"
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SID "837"
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Ports [2, 1]
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Position [435, 2212, 465, 2243]
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Operator "pow"
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BlockType Math
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SID "838"
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Ports [2, 1]
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Position [435, 2457, 465, 2488]
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BlockType Math
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SID "839"
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Ports [2, 1]
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Position [435, 2712, 465, 2743]
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Operator "pow"
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BlockType Math
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SID "840"
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Ports [2, 1]
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Position [435, 2977, 465, 3008]
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Operator "pow"
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Block {
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BlockType Math
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Name "Math\nFunction16"
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SID "841"
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Ports [2, 1]
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Position [435, 3252, 465, 3283]
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Operator "pow"
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Block {
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BlockType Math
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Name "Math\nFunction17"
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SID "842"
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Ports [2, 1]
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Position [435, 3532, 465, 3563]
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Operator "pow"
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Block {
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BlockType Math
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Name "Math\nFunction18"
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SID "843"
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Ports [2, 1]
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Position [435, 3822, 465, 3853]
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Operator "pow"
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Block {
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BlockType Math
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Name "Math\nFunction19"
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SID "844"
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Ports [2, 1]
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Position [435, 4117, 465, 4148]
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Operator "pow"
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Block {
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BlockType Math
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Name "Math\nFunction2"
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SID "845"
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|
Ports [2, 1]
|
|
Position [425, 362, 455, 393]
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Operator "pow"
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Block {
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BlockType Math
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|
Name "Math\nFunction20"
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SID "846"
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|
Ports [2, 1]
|
|
Position [435, 4422, 465, 4453]
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Operator "pow"
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Block {
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BlockType Math
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|
Name "Math\nFunction21"
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|
SID "847"
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|
Ports [2, 1]
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|
Position [435, 4732, 465, 4763]
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|
Operator "pow"
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}
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Block {
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BlockType Math
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|
Name "Math\nFunction22"
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|
SID "848"
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|
Ports [2, 1]
|
|
Position [440, 5047, 470, 5078]
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Operator "pow"
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Block {
|
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BlockType Math
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|
Name "Math\nFunction23"
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|
SID "849"
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|
Ports [2, 1]
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|
Position [440, 5367, 470, 5398]
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|
Operator "pow"
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Block {
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BlockType Math
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|
Name "Math\nFunction24"
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|
SID "850"
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|
Ports [2, 1]
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|
Position [440, 5692, 470, 5723]
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|
Operator "pow"
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Block {
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BlockType Math
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|
Name "Math\nFunction3"
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|
SID "851"
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|
Ports [2, 1]
|
|
Position [425, 512, 455, 543]
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|
Operator "pow"
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|
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Block {
|
|
BlockType Math
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|
Name "Math\nFunction4"
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|
SID "852"
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|
Ports [2, 1]
|
|
Position [430, 672, 460, 703]
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|
Operator "pow"
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|
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Block {
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|
BlockType Math
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|
Name "Math\nFunction5"
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|
SID "853"
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|
Ports [2, 1]
|
|
Position [435, 842, 465, 873]
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|
Operator "pow"
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Block {
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|
BlockType Math
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|
Name "Math\nFunction6"
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|
SID "854"
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|
Ports [2, 1]
|
|
Position [435, 1022, 465, 1053]
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|
Operator "pow"
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Block {
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BlockType Math
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|
Name "Math\nFunction7"
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|
SID "855"
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|
Ports [2, 1]
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|
Position [435, 1202, 465, 1233]
|
|
Operator "pow"
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Block {
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BlockType Math
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|
Name "Math\nFunction8"
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|
SID "856"
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|
Ports [2, 1]
|
|
Position [435, 1382, 465, 1413]
|
|
Operator "pow"
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|
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Block {
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|
BlockType Math
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|
Name "Math\nFunction9"
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|
SID "857"
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|
Ports [2, 1]
|
|
Position [435, 1572, 465, 1603]
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|
Operator "pow"
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SID "858"
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SID "859"
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InputSameDT off
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OutDataTypeStr "Inherit: Inherit via internal rule"
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Block {
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SID "860"
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Block {
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|
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InputSameDT off
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OutDataTypeStr "Inherit: Inherit via internal rule"
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Block {
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|
SID "862"
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|
Ports [2, 1]
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|
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InputSameDT off
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OutDataTypeStr "Inherit: Inherit via internal rule"
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Block {
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|
SID "863"
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|
Ports [2, 1]
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InputSameDT off
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OutDataTypeStr "Inherit: Inherit via internal rule"
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Block {
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|
BlockType Product
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Name "Product15"
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|
SID "864"
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|
Ports [2, 1]
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Position [570, 3002, 600, 3033]
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InputSameDT off
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|
OutDataTypeStr "Inherit: Inherit via internal rule"
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|
SaturateOnIntegerOverflow off
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}
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Block {
|
|
BlockType Product
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|
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|
|
SID "865"
|
|
Ports [2, 1]
|
|
Position [570, 3277, 600, 3308]
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|
InputSameDT off
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|
OutDataTypeStr "Inherit: Inherit via internal rule"
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|
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Block {
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|
BlockType Product
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|
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|
SID "866"
|
|
Ports [2, 1]
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|
Position [570, 3557, 600, 3588]
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|
InputSameDT off
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|
OutDataTypeStr "Inherit: Inherit via internal rule"
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|
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Block {
|
|
BlockType Product
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|
Name "Product18"
|
|
SID "867"
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|
Ports [2, 1]
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|
Position [570, 3847, 600, 3878]
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|
InputSameDT off
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|
OutDataTypeStr "Inherit: Inherit via internal rule"
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|
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Block {
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|
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|
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|
SID "868"
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|
Ports [2, 1]
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Position [570, 4142, 600, 4173]
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InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
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|
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Block {
|
|
BlockType Product
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|
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|
|
SID "869"
|
|
Ports [2, 1]
|
|
Position [560, 387, 590, 418]
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|
InputSameDT off
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|
OutDataTypeStr "Inherit: Inherit via internal rule"
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|
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Block {
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|
BlockType Product
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|
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|
|
SID "870"
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|
Ports [2, 1]
|
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Position [570, 4447, 600, 4478]
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|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
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|
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Block {
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|
BlockType Product
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|
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|
|
SID "871"
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|
Ports [2, 1]
|
|
Position [570, 4757, 600, 4788]
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|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
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|
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Block {
|
|
BlockType Product
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|
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|
|
SID "872"
|
|
Ports [2, 1]
|
|
Position [575, 5072, 605, 5103]
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|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
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|
SaturateOnIntegerOverflow off
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}
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Block {
|
|
BlockType Product
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|
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|
|
SID "873"
|
|
Ports [2, 1]
|
|
Position [575, 5392, 605, 5423]
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|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
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|
SaturateOnIntegerOverflow off
|
|
}
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|
Block {
|
|
BlockType Product
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|
Name "Product24"
|
|
SID "874"
|
|
Ports [2, 1]
|
|
Position [575, 5717, 605, 5748]
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|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
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Block {
|
|
BlockType Product
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|
Name "Product3"
|
|
SID "875"
|
|
Ports [2, 1]
|
|
Position [560, 537, 590, 568]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
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|
SaturateOnIntegerOverflow off
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}
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|
Block {
|
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BlockType Product
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|
Name "Product4"
|
|
SID "876"
|
|
Ports [2, 1]
|
|
Position [565, 697, 595, 728]
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|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
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|
SaturateOnIntegerOverflow off
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}
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Block {
|
|
BlockType Product
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|
Name "Product5"
|
|
SID "877"
|
|
Ports [2, 1]
|
|
Position [570, 867, 600, 898]
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|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
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|
SaturateOnIntegerOverflow off
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}
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Block {
|
|
BlockType Product
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|
Name "Product6"
|
|
SID "878"
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|
Ports [2, 1]
|
|
Position [570, 1047, 600, 1078]
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|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
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|
SaturateOnIntegerOverflow off
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}
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Block {
|
|
BlockType Product
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|
Name "Product7"
|
|
SID "879"
|
|
Ports [2, 1]
|
|
Position [570, 1227, 600, 1258]
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|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
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}
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Block {
|
|
BlockType Product
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|
Name "Product8"
|
|
SID "880"
|
|
Ports [2, 1]
|
|
Position [570, 1407, 600, 1438]
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|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
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|
SaturateOnIntegerOverflow off
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}
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Block {
|
|
BlockType Product
|
|
Name "Product9"
|
|
SID "881"
|
|
Ports [2, 1]
|
|
Position [570, 1597, 600, 1628]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
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|
SaturateOnIntegerOverflow off
|
|
}
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Block {
|
|
BlockType Sum
|
|
Name "Sum1"
|
|
SID "882"
|
|
Ports [2, 1]
|
|
Position [380, 380, 400, 400]
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ShowName off
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|
IconShape "round"
|
|
Inputs "|+-"
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InputSameDT off
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OutDataTypeStr "Inherit: Inherit via internal rule"
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|
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|
|
}
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Block {
|
|
BlockType Sum
|
|
Name "Sum10"
|
|
SID "883"
|
|
Ports [2, 1]
|
|
Position [380, 1400, 400, 1420]
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ShowName off
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|
IconShape "round"
|
|
Inputs "|+-"
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InputSameDT off
|
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OutDataTypeStr "Inherit: Inherit via internal rule"
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|
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|
|
}
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Block {
|
|
BlockType Sum
|
|
Name "Sum11"
|
|
SID "884"
|
|
Ports [2, 1]
|
|
Position [380, 1590, 400, 1610]
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ShowName off
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|
IconShape "round"
|
|
Inputs "|+-"
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InputSameDT off
|
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OutDataTypeStr "Inherit: Inherit via internal rule"
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|
SaturateOnIntegerOverflow off
|
|
}
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Block {
|
|
BlockType Sum
|
|
Name "Sum12"
|
|
SID "885"
|
|
Ports [2, 1]
|
|
Position [380, 1790, 400, 1810]
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|
ShowName off
|
|
IconShape "round"
|
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Inputs "|+-"
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InputSameDT off
|
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OutDataTypeStr "Inherit: Inherit via internal rule"
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|
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}
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|
Block {
|
|
BlockType Sum
|
|
Name "Sum13"
|
|
SID "886"
|
|
Ports [2, 1]
|
|
Position [380, 2000, 400, 2020]
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|
ShowName off
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|
IconShape "round"
|
|
Inputs "|+-"
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InputSameDT off
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OutDataTypeStr "Inherit: Inherit via internal rule"
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}
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Block {
|
|
BlockType Sum
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|
Name "Sum14"
|
|
SID "887"
|
|
Ports [2, 1]
|
|
Position [380, 2230, 400, 2250]
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ShowName off
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|
IconShape "round"
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Inputs "|+-"
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InputSameDT off
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OutDataTypeStr "Inherit: Inherit via internal rule"
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Block {
|
|
BlockType Sum
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|
Name "Sum15"
|
|
SID "888"
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|
Ports [2, 1]
|
|
Position [380, 2475, 400, 2495]
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ShowName off
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IconShape "round"
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Inputs "|+-"
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InputSameDT off
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}
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Block {
|
|
BlockType Sum
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|
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|
SID "889"
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|
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|
|
Position [380, 2730, 400, 2750]
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ShowName off
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IconShape "round"
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Inputs "|+-"
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InputSameDT off
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OutDataTypeStr "Inherit: Inherit via internal rule"
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Block {
|
|
BlockType Sum
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|
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|
|
SID "890"
|
|
Ports [2, 1]
|
|
Position [380, 2995, 400, 3015]
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ShowName off
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IconShape "round"
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Inputs "|+-"
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InputSameDT off
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OutDataTypeStr "Inherit: Inherit via internal rule"
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Block {
|
|
BlockType Sum
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|
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|
|
SID "891"
|
|
Ports [2, 1]
|
|
Position [380, 3270, 400, 3290]
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ShowName off
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IconShape "round"
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Inputs "|+-"
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InputSameDT off
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OutDataTypeStr "Inherit: Inherit via internal rule"
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SaturateOnIntegerOverflow off
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Block {
|
|
BlockType Sum
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|
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|
|
SID "892"
|
|
Ports [2, 1]
|
|
Position [380, 3550, 400, 3570]
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ShowName off
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IconShape "round"
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RTWMemSecFuncExecute "Inherit from model"
|
|
RTWMemSecDataConstants "Inherit from model"
|
|
RTWMemSecDataInternal "Inherit from model"
|
|
RTWMemSecDataParameters "Inherit from model"
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
|
|
RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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|
RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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LogicOutDataTypeMode "uint8"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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LogicOutDataTypeMode "uint8"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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LogicOutDataTypeMode "uint8"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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LogicOutDataTypeMode "uint8"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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LogicOutDataTypeMode "uint8"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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LogicOutDataTypeMode "uint8"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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LogicOutDataTypeMode "uint8"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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LogicOutDataTypeMode "uint8"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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LogicOutDataTypeMode "uint8"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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|
Block {
|
|
BlockType Constant
|
|
Name "Constant15"
|
|
SID "1011"
|
|
Position [345, 880, 375, 910]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant16"
|
|
SID "1012"
|
|
Position [375, 990, 405, 1020]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant17"
|
|
SID "1013"
|
|
Position [345, 1060, 375, 1090]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant18"
|
|
SID "1014"
|
|
Position [375, 1170, 405, 1200]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant19"
|
|
SID "1015"
|
|
Position [345, 1240, 375, 1270]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant2"
|
|
SID "1016"
|
|
Position [345, 400, 375, 430]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant20"
|
|
SID "1017"
|
|
Position [375, 1350, 405, 1380]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant21"
|
|
SID "1018"
|
|
Position [345, 1420, 375, 1450]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant22"
|
|
SID "1019"
|
|
Position [375, 1540, 405, 1570]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant23"
|
|
SID "1020"
|
|
Position [345, 1610, 375, 1640]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant24"
|
|
SID "1021"
|
|
Position [375, 1740, 405, 1770]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant25"
|
|
SID "1022"
|
|
Position [345, 1810, 375, 1840]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant26"
|
|
SID "1023"
|
|
Position [375, 1950, 405, 1980]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant27"
|
|
SID "1024"
|
|
Position [345, 2020, 375, 2050]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant28"
|
|
SID "1025"
|
|
Position [375, 2180, 405, 2210]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant29"
|
|
SID "1026"
|
|
Position [345, 2250, 375, 2280]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant30"
|
|
SID "1027"
|
|
Position [375, 2425, 405, 2455]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant31"
|
|
SID "1028"
|
|
Position [345, 2495, 375, 2525]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant32"
|
|
SID "1029"
|
|
Position [375, 2680, 405, 2710]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant33"
|
|
SID "1030"
|
|
Position [345, 2750, 375, 2780]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant34"
|
|
SID "1031"
|
|
Position [375, 2945, 405, 2975]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant35"
|
|
SID "1032"
|
|
Position [345, 3015, 375, 3045]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant36"
|
|
SID "1033"
|
|
Position [375, 3220, 405, 3250]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant37"
|
|
SID "1034"
|
|
Position [345, 3290, 375, 3320]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant38"
|
|
SID "1035"
|
|
Position [375, 3500, 405, 3530]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant39"
|
|
SID "1036"
|
|
Position [345, 3570, 375, 3600]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant40"
|
|
SID "1037"
|
|
Position [375, 3790, 405, 3820]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant41"
|
|
SID "1038"
|
|
Position [345, 3860, 375, 3890]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant42"
|
|
SID "1039"
|
|
Position [375, 4085, 405, 4115]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant43"
|
|
SID "1040"
|
|
Position [345, 4155, 375, 4185]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant44"
|
|
SID "1041"
|
|
Position [375, 4390, 405, 4420]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant45"
|
|
SID "1042"
|
|
Position [345, 4460, 375, 4490]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant46"
|
|
SID "1043"
|
|
Position [375, 4700, 405, 4730]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant47"
|
|
SID "1044"
|
|
Position [345, 4770, 375, 4800]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant48"
|
|
SID "1045"
|
|
Position [380, 5015, 410, 5045]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant49"
|
|
SID "1046"
|
|
Position [350, 5085, 380, 5115]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant50"
|
|
SID "1047"
|
|
Position [380, 5335, 410, 5365]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant51"
|
|
SID "1048"
|
|
Position [350, 5405, 380, 5435]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant52"
|
|
SID "1049"
|
|
Position [380, 5660, 410, 5690]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant53"
|
|
SID "1050"
|
|
Position [350, 5730, 380, 5760]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant8"
|
|
SID "1051"
|
|
Position [365, 330, 395, 360]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Display
|
|
Name "Display1"
|
|
SID "1052"
|
|
Ports [1]
|
|
Position [730, 507, 820, 533]
|
|
Decimation "1"
|
|
Lockdown off
|
|
}
|
|
Block {
|
|
BlockType Display
|
|
Name "Display2"
|
|
SID "1053"
|
|
Ports [1]
|
|
Position [775, 657, 865, 683]
|
|
Decimation "1"
|
|
Lockdown off
|
|
}
|
|
Block {
|
|
BlockType Display
|
|
Name "Display3"
|
|
SID "1054"
|
|
Ports [1]
|
|
Position [740, 857, 830, 883]
|
|
Decimation "1"
|
|
Lockdown off
|
|
}
|
|
Block {
|
|
BlockType Display
|
|
Name "Display4"
|
|
SID "1055"
|
|
Ports [1]
|
|
Position [770, 1057, 860, 1083]
|
|
Decimation "1"
|
|
Lockdown off
|
|
}
|
|
Block {
|
|
BlockType Display
|
|
Name "Display5"
|
|
SID "1056"
|
|
Ports [1]
|
|
Position [735, 332, 825, 358]
|
|
Decimation "1"
|
|
Lockdown off
|
|
}
|
|
Block {
|
|
BlockType Display
|
|
Name "Display6"
|
|
SID "1057"
|
|
Ports [1]
|
|
Position [770, 1187, 860, 1213]
|
|
Decimation "1"
|
|
Lockdown off
|
|
}
|
|
Block {
|
|
BlockType Display
|
|
Name "Display7"
|
|
SID "1058"
|
|
Ports [1]
|
|
Position [640, 197, 730, 223]
|
|
Decimation "1"
|
|
Lockdown off
|
|
}
|
|
Block {
|
|
BlockType Display
|
|
Name "Display8"
|
|
SID "1059"
|
|
Ports [1]
|
|
Position [490, 317, 580, 343]
|
|
Decimation "1"
|
|
Lockdown off
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction1"
|
|
SID "1060"
|
|
Ports [2, 1]
|
|
Position [420, 177, 450, 208]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction10"
|
|
SID "1061"
|
|
Ports [2, 1]
|
|
Position [435, 1772, 465, 1803]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction11"
|
|
SID "1062"
|
|
Ports [2, 1]
|
|
Position [435, 1982, 465, 2013]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction12"
|
|
SID "1063"
|
|
Ports [2, 1]
|
|
Position [435, 2212, 465, 2243]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction13"
|
|
SID "1064"
|
|
Ports [2, 1]
|
|
Position [435, 2457, 465, 2488]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction14"
|
|
SID "1065"
|
|
Ports [2, 1]
|
|
Position [435, 2712, 465, 2743]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction15"
|
|
SID "1066"
|
|
Ports [2, 1]
|
|
Position [435, 2977, 465, 3008]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction16"
|
|
SID "1067"
|
|
Ports [2, 1]
|
|
Position [435, 3252, 465, 3283]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction17"
|
|
SID "1068"
|
|
Ports [2, 1]
|
|
Position [435, 3532, 465, 3563]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction18"
|
|
SID "1069"
|
|
Ports [2, 1]
|
|
Position [435, 3822, 465, 3853]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction19"
|
|
SID "1070"
|
|
Ports [2, 1]
|
|
Position [435, 4117, 465, 4148]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction2"
|
|
SID "1071"
|
|
Ports [2, 1]
|
|
Position [425, 362, 455, 393]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction20"
|
|
SID "1072"
|
|
Ports [2, 1]
|
|
Position [435, 4422, 465, 4453]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction21"
|
|
SID "1073"
|
|
Ports [2, 1]
|
|
Position [435, 4732, 465, 4763]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction22"
|
|
SID "1074"
|
|
Ports [2, 1]
|
|
Position [440, 5047, 470, 5078]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction23"
|
|
SID "1075"
|
|
Ports [2, 1]
|
|
Position [440, 5367, 470, 5398]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction24"
|
|
SID "1076"
|
|
Ports [2, 1]
|
|
Position [440, 5692, 470, 5723]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction3"
|
|
SID "1077"
|
|
Ports [2, 1]
|
|
Position [425, 512, 455, 543]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction4"
|
|
SID "1078"
|
|
Ports [2, 1]
|
|
Position [430, 672, 460, 703]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction5"
|
|
SID "1079"
|
|
Ports [2, 1]
|
|
Position [435, 842, 465, 873]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction6"
|
|
SID "1080"
|
|
Ports [2, 1]
|
|
Position [435, 1022, 465, 1053]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction7"
|
|
SID "1081"
|
|
Ports [2, 1]
|
|
Position [435, 1202, 465, 1233]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction8"
|
|
SID "1082"
|
|
Ports [2, 1]
|
|
Position [435, 1382, 465, 1413]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction9"
|
|
SID "1083"
|
|
Ports [2, 1]
|
|
Position [435, 1572, 465, 1603]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product1"
|
|
SID "1084"
|
|
Ports [2, 1]
|
|
Position [555, 202, 585, 233]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product10"
|
|
SID "1085"
|
|
Ports [2, 1]
|
|
Position [570, 1797, 600, 1828]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product11"
|
|
SID "1086"
|
|
Ports [2, 1]
|
|
Position [570, 2007, 600, 2038]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product12"
|
|
SID "1087"
|
|
Ports [2, 1]
|
|
Position [570, 2237, 600, 2268]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product13"
|
|
SID "1088"
|
|
Ports [2, 1]
|
|
Position [570, 2482, 600, 2513]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product14"
|
|
SID "1089"
|
|
Ports [2, 1]
|
|
Position [570, 2737, 600, 2768]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product15"
|
|
SID "1090"
|
|
Ports [2, 1]
|
|
Position [570, 3002, 600, 3033]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product16"
|
|
SID "1091"
|
|
Ports [2, 1]
|
|
Position [570, 3277, 600, 3308]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product17"
|
|
SID "1092"
|
|
Ports [2, 1]
|
|
Position [570, 3557, 600, 3588]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product18"
|
|
SID "1093"
|
|
Ports [2, 1]
|
|
Position [570, 3847, 600, 3878]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
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SID "1151"
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Block {
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|
|
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|
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RndMeth "Floor"
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Block {
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|
|
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|
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|
|
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|
OutDataTypeStr "uint32"
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RndMeth "Floor"
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|
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|
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RndMeth "Floor"
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|
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RndMeth "Floor"
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RndMeth "Floor"
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|
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|
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RndMeth "Floor"
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|
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|
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|
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|
BackgroundColor "cyan"
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|
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|
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|
SID "1172"
|
|
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|
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|
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|
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|
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|
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|
|
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|
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|
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logicop "AND"
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|
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SourceBlock "simulink/Logic and Bit\nOperations/Bitwise\nOperator"
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|
logicop "AND"
|
|
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|
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|
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|
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|
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|
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|
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|
|
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|
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|
SourceBlock "simulink/Logic and Bit\nOperations/Bitwise\nOperator"
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|
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|
logicop "AND"
|
|
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|
|
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|
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|
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|
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|
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|
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|
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|
|
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|
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|
SourceBlock "simulink/Logic and Bit\nOperations/Bitwise\nOperator"
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|
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|
logicop "AND"
|
|
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|
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|
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|
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|
|
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|
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|
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|
|
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|
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|
SourceBlock "simulink/Logic and Bit\nOperations/Bitwise\nOperator"
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|
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|
logicop "AND"
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|
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|
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|
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|
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Block {
|
|
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|
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|
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|
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|
|
Position [425, 2046, 465, 2084]
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|
LibraryVersion "1.302"
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|
SourceBlock "simulink/Logic and Bit\nOperations/Bitwise\nOperator"
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|
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|
logicop "AND"
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|
UseBitMask on
|
|
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|
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|
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Block {
|
|
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|
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|
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|
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|
|
Position [425, 2276, 465, 2314]
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|
LibraryVersion "1.302"
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|
SourceBlock "simulink/Logic and Bit\nOperations/Bitwise\nOperator"
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|
SourceType "Bitwise Operator"
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|
logicop "AND"
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|
UseBitMask on
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|
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|
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|
|
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|
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|
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|
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|
|
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|
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|
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|
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|
logicop "AND"
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|
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|
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|
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|
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|
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|
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|
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|
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Position [425, 2776, 465, 2814]
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LibraryVersion "1.302"
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SourceBlock "simulink/Logic and Bit\nOperations/Bitwise\nOperator"
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|
logicop "AND"
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|
UseBitMask on
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|
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|
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|
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|
Ports [1, 1]
|
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Position [425, 3041, 465, 3079]
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|
LibraryVersion "1.302"
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SourceBlock "simulink/Logic and Bit\nOperations/Bitwise\nOperator"
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logicop "AND"
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|
UseBitMask on
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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Lockdown off
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|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction1"
|
|
SID "1286"
|
|
Ports [2, 1]
|
|
Position [420, 177, 450, 208]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction10"
|
|
SID "1287"
|
|
Ports [2, 1]
|
|
Position [435, 1772, 465, 1803]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction11"
|
|
SID "1288"
|
|
Ports [2, 1]
|
|
Position [435, 1982, 465, 2013]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction12"
|
|
SID "1289"
|
|
Ports [2, 1]
|
|
Position [435, 2212, 465, 2243]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction13"
|
|
SID "1290"
|
|
Ports [2, 1]
|
|
Position [435, 2457, 465, 2488]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction14"
|
|
SID "1291"
|
|
Ports [2, 1]
|
|
Position [435, 2712, 465, 2743]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction15"
|
|
SID "1292"
|
|
Ports [2, 1]
|
|
Position [435, 2977, 465, 3008]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction16"
|
|
SID "1293"
|
|
Ports [2, 1]
|
|
Position [435, 3252, 465, 3283]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction17"
|
|
SID "1294"
|
|
Ports [2, 1]
|
|
Position [435, 3532, 465, 3563]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction18"
|
|
SID "1295"
|
|
Ports [2, 1]
|
|
Position [435, 3822, 465, 3853]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction19"
|
|
SID "1296"
|
|
Ports [2, 1]
|
|
Position [435, 4117, 465, 4148]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction2"
|
|
SID "1297"
|
|
Ports [2, 1]
|
|
Position [425, 362, 455, 393]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction20"
|
|
SID "1298"
|
|
Ports [2, 1]
|
|
Position [435, 4422, 465, 4453]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction21"
|
|
SID "1299"
|
|
Ports [2, 1]
|
|
Position [435, 4732, 465, 4763]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction22"
|
|
SID "1300"
|
|
Ports [2, 1]
|
|
Position [440, 5047, 470, 5078]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction23"
|
|
SID "1301"
|
|
Ports [2, 1]
|
|
Position [440, 5367, 470, 5398]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction24"
|
|
SID "1302"
|
|
Ports [2, 1]
|
|
Position [440, 5692, 470, 5723]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction3"
|
|
SID "1303"
|
|
Ports [2, 1]
|
|
Position [425, 512, 455, 543]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction4"
|
|
SID "1304"
|
|
Ports [2, 1]
|
|
Position [430, 672, 460, 703]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction5"
|
|
SID "1305"
|
|
Ports [2, 1]
|
|
Position [435, 842, 465, 873]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction6"
|
|
SID "1306"
|
|
Ports [2, 1]
|
|
Position [435, 1022, 465, 1053]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction7"
|
|
SID "1307"
|
|
Ports [2, 1]
|
|
Position [435, 1202, 465, 1233]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction8"
|
|
SID "1308"
|
|
Ports [2, 1]
|
|
Position [435, 1382, 465, 1413]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction9"
|
|
SID "1309"
|
|
Ports [2, 1]
|
|
Position [435, 1572, 465, 1603]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product1"
|
|
SID "1310"
|
|
Ports [2, 1]
|
|
Position [555, 202, 585, 233]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product10"
|
|
SID "1311"
|
|
Ports [2, 1]
|
|
Position [570, 1797, 600, 1828]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product11"
|
|
SID "1312"
|
|
Ports [2, 1]
|
|
Position [570, 2007, 600, 2038]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product12"
|
|
SID "1313"
|
|
Ports [2, 1]
|
|
Position [570, 2237, 600, 2268]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product13"
|
|
SID "1314"
|
|
Ports [2, 1]
|
|
Position [570, 2482, 600, 2513]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product14"
|
|
SID "1315"
|
|
Ports [2, 1]
|
|
Position [570, 2737, 600, 2768]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product15"
|
|
SID "1316"
|
|
Ports [2, 1]
|
|
Position [570, 3002, 600, 3033]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product16"
|
|
SID "1317"
|
|
Ports [2, 1]
|
|
Position [570, 3277, 600, 3308]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product17"
|
|
SID "1318"
|
|
Ports [2, 1]
|
|
Position [570, 3557, 600, 3588]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product18"
|
|
SID "1319"
|
|
Ports [2, 1]
|
|
Position [570, 3847, 600, 3878]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product19"
|
|
SID "1320"
|
|
Ports [2, 1]
|
|
Position [570, 4142, 600, 4173]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product2"
|
|
SID "1321"
|
|
Ports [2, 1]
|
|
Position [560, 387, 590, 418]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product20"
|
|
SID "1322"
|
|
Ports [2, 1]
|
|
Position [570, 4447, 600, 4478]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product21"
|
|
SID "1323"
|
|
Ports [2, 1]
|
|
Position [570, 4757, 600, 4788]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product22"
|
|
SID "1324"
|
|
Ports [2, 1]
|
|
Position [575, 5072, 605, 5103]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product23"
|
|
SID "1325"
|
|
Ports [2, 1]
|
|
Position [575, 5392, 605, 5423]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product24"
|
|
SID "1326"
|
|
Ports [2, 1]
|
|
Position [575, 5717, 605, 5748]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product3"
|
|
SID "1327"
|
|
Ports [2, 1]
|
|
Position [560, 537, 590, 568]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product4"
|
|
SID "1328"
|
|
Ports [2, 1]
|
|
Position [565, 697, 595, 728]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product5"
|
|
SID "1329"
|
|
Ports [2, 1]
|
|
Position [570, 867, 600, 898]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product6"
|
|
SID "1330"
|
|
Ports [2, 1]
|
|
Position [570, 1047, 600, 1078]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product7"
|
|
SID "1331"
|
|
Ports [2, 1]
|
|
Position [570, 1227, 600, 1258]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product8"
|
|
SID "1332"
|
|
Ports [2, 1]
|
|
Position [570, 1407, 600, 1438]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product9"
|
|
SID "1333"
|
|
Ports [2, 1]
|
|
Position [570, 1597, 600, 1628]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Sum
|
|
Name "Sum1"
|
|
SID "1334"
|
|
Ports [2, 1]
|
|
Position [380, 380, 400, 400]
|
|
ShowName off
|
|
IconShape "round"
|
|
Inputs "|+-"
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Sum
|
|
Name "Sum10"
|
|
SID "1335"
|
|
Ports [2, 1]
|
|
Position [380, 1400, 400, 1420]
|
|
ShowName off
|
|
IconShape "round"
|
|
Inputs "|+-"
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Sum
|
|
Name "Sum11"
|
|
SID "1336"
|
|
Ports [2, 1]
|
|
Position [380, 1590, 400, 1610]
|
|
ShowName off
|
|
IconShape "round"
|
|
Inputs "|+-"
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Sum
|
|
Name "Sum12"
|
|
SID "1337"
|
|
Ports [2, 1]
|
|
Position [380, 1790, 400, 1810]
|
|
ShowName off
|
|
IconShape "round"
|
|
Inputs "|+-"
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Sum
|
|
Name "Sum13"
|
|
SID "1338"
|
|
Ports [2, 1]
|
|
Position [380, 2000, 400, 2020]
|
|
ShowName off
|
|
IconShape "round"
|
|
Inputs "|+-"
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Sum
|
|
Name "Sum14"
|
|
SID "1339"
|
|
Ports [2, 1]
|
|
Position [380, 2230, 400, 2250]
|
|
ShowName off
|
|
IconShape "round"
|
|
Inputs "|+-"
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Sum
|
|
Name "Sum15"
|
|
SID "1340"
|
|
Ports [2, 1]
|
|
Position [380, 2475, 400, 2495]
|
|
ShowName off
|
|
IconShape "round"
|
|
Inputs "|+-"
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Sum
|
|
Name "Sum16"
|
|
SID "1341"
|
|
Ports [2, 1]
|
|
Position [380, 2730, 400, 2750]
|
|
ShowName off
|
|
IconShape "round"
|
|
Inputs "|+-"
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Sum
|
|
Name "Sum17"
|
|
SID "1342"
|
|
Ports [2, 1]
|
|
Position [380, 2995, 400, 3015]
|
|
ShowName off
|
|
IconShape "round"
|
|
Inputs "|+-"
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Sum
|
|
Name "Sum18"
|
|
SID "1343"
|
|
Ports [2, 1]
|
|
Position [380, 3270, 400, 3290]
|
|
ShowName off
|
|
IconShape "round"
|
|
Inputs "|+-"
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Sum
|
|
Name "Sum19"
|
|
SID "1344"
|
|
Ports [2, 1]
|
|
Position [380, 3550, 400, 3570]
|
|
ShowName off
|
|
IconShape "round"
|
|
Inputs "|+-"
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Sum
|
|
Name "Sum20"
|
|
SID "1345"
|
|
Ports [2, 1]
|
|
Position [380, 3840, 400, 3860]
|
|
ShowName off
|
|
IconShape "round"
|
|
Inputs "|+-"
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Sum
|
|
Name "Sum21"
|
|
SID "1346"
|
|
Ports [2, 1]
|
|
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ShowPortLabels "FromPortIcon"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
|
|
RTWMemSecFuncExecute "Inherit from model"
|
|
RTWMemSecDataConstants "Inherit from model"
|
|
RTWMemSecDataInternal "Inherit from model"
|
|
RTWMemSecDataParameters "Inherit from model"
|
|
GeneratePreprocessorConditionals off
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|
relop ">"
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LogicOutDataTypeMode "uint8"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
|
|
RTWMemSecDataConstants "Inherit from model"
|
|
RTWMemSecDataInternal "Inherit from model"
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|
RTWMemSecDataParameters "Inherit from model"
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|
GeneratePreprocessorConditionals off
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relop ">"
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LogicOutDataTypeMode "uint8"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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|
RTWMemSecDataConstants "Inherit from model"
|
|
RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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LogicOutDataTypeMode "uint8"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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|
RTWMemSecDataConstants "Inherit from model"
|
|
RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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relop ">"
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LogicOutDataTypeMode "uint8"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
|
|
RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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relop ">"
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LogicOutDataTypeMode "uint8"
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LibraryVersion "1.302"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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|
RTWMemSecDataConstants "Inherit from model"
|
|
RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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relop ">"
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LogicOutDataTypeMode "uint8"
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LibraryVersion "1.302"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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LogicOutDataTypeMode "uint8"
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Ports [1, 1]
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Position [495, 4185, 525, 4215]
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LibraryVersion "1.302"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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SourceType "Compare To Zero"
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ShowPortLabels "FromPortIcon"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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|
RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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relop ">"
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LogicOutDataTypeMode "uint8"
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Ports [1, 1]
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Position [485, 430, 515, 460]
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LibraryVersion "1.302"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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SourceType "Compare To Zero"
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ShowPortLabels "FromPortIcon"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
|
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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relop ">"
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LogicOutDataTypeMode "uint8"
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LibraryVersion "1.302"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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SourceType "Compare To Zero"
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ShowPortLabels "FromPortIcon"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
|
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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relop ">"
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LogicOutDataTypeMode "uint8"
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Ports [1, 1]
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Position [495, 4800, 525, 4830]
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LibraryVersion "1.302"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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SourceType "Compare To Zero"
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ShowPortLabels "FromPortIcon"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
|
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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relop ">"
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LogicOutDataTypeMode "uint8"
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Block {
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Ports [1, 1]
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Position [500, 5115, 530, 5145]
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LibraryVersion "1.302"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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SourceType "Compare To Zero"
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ShowPortLabels "FromPortIcon"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
|
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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relop ">"
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LogicOutDataTypeMode "uint8"
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Block {
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LibraryVersion "1.302"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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SourceType "Compare To Zero"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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relop ">"
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LogicOutDataTypeMode "uint8"
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Block {
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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relop ">"
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LogicOutDataTypeMode "uint8"
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Ports [1, 1]
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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ShowPortLabels "FromPortIcon"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
|
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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relop ">"
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LogicOutDataTypeMode "uint8"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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relop ">"
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LogicOutDataTypeMode "uint8"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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relop ">"
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LogicOutDataTypeMode "uint8"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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relop ">"
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LogicOutDataTypeMode "uint8"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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ShowPortLabels "FromPortIcon"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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relop ">"
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LogicOutDataTypeMode "uint8"
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ZeroCross off
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Block {
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LibraryVersion "1.302"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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ShowPortLabels "FromPortIcon"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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relop ">"
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LogicOutDataTypeMode "uint8"
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ZeroCross off
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Block {
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SID "1456"
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LibraryVersion "1.302"
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SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo Zero"
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SourceType "Compare To Zero"
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ShowPortLabels "FromPortIcon"
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SystemSampleTime "-1"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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GeneratePreprocessorConditionals off
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relop ">"
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LogicOutDataTypeMode "uint8"
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SID "1457"
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SID "1458"
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SID "1459"
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SID "1460"
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SID "1461"
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Block {
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SID "1462"
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SID "1463"
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Block {
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SID "1464"
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SID "1465"
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Block {
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BlockType Constant
|
|
Name "Constant18"
|
|
SID "1466"
|
|
Position [375, 1170, 405, 1200]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant19"
|
|
SID "1467"
|
|
Position [345, 1240, 375, 1270]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant2"
|
|
SID "1468"
|
|
Position [345, 400, 375, 430]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant20"
|
|
SID "1469"
|
|
Position [375, 1350, 405, 1380]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant21"
|
|
SID "1470"
|
|
Position [345, 1420, 375, 1450]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant22"
|
|
SID "1471"
|
|
Position [375, 1540, 405, 1570]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant23"
|
|
SID "1472"
|
|
Position [345, 1610, 375, 1640]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant24"
|
|
SID "1473"
|
|
Position [375, 1740, 405, 1770]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant25"
|
|
SID "1474"
|
|
Position [345, 1810, 375, 1840]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant26"
|
|
SID "1475"
|
|
Position [375, 1950, 405, 1980]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant27"
|
|
SID "1476"
|
|
Position [345, 2020, 375, 2050]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant28"
|
|
SID "1477"
|
|
Position [375, 2180, 405, 2210]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant29"
|
|
SID "1478"
|
|
Position [345, 2250, 375, 2280]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant30"
|
|
SID "1479"
|
|
Position [375, 2425, 405, 2455]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant31"
|
|
SID "1480"
|
|
Position [345, 2495, 375, 2525]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant32"
|
|
SID "1481"
|
|
Position [375, 2680, 405, 2710]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant33"
|
|
SID "1482"
|
|
Position [345, 2750, 375, 2780]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant34"
|
|
SID "1483"
|
|
Position [375, 2945, 405, 2975]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant35"
|
|
SID "1484"
|
|
Position [345, 3015, 375, 3045]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant36"
|
|
SID "1485"
|
|
Position [375, 3220, 405, 3250]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant37"
|
|
SID "1486"
|
|
Position [345, 3290, 375, 3320]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant38"
|
|
SID "1487"
|
|
Position [375, 3500, 405, 3530]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant39"
|
|
SID "1488"
|
|
Position [345, 3570, 375, 3600]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant40"
|
|
SID "1489"
|
|
Position [375, 3790, 405, 3820]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant41"
|
|
SID "1490"
|
|
Position [345, 3860, 375, 3890]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant42"
|
|
SID "1491"
|
|
Position [375, 4085, 405, 4115]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant43"
|
|
SID "1492"
|
|
Position [345, 4155, 375, 4185]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant44"
|
|
SID "1493"
|
|
Position [375, 4390, 405, 4420]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant45"
|
|
SID "1494"
|
|
Position [345, 4460, 375, 4490]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant46"
|
|
SID "1495"
|
|
Position [375, 4700, 405, 4730]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant47"
|
|
SID "1496"
|
|
Position [345, 4770, 375, 4800]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant48"
|
|
SID "1497"
|
|
Position [380, 5015, 410, 5045]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant49"
|
|
SID "1498"
|
|
Position [350, 5085, 380, 5115]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant50"
|
|
SID "1499"
|
|
Position [380, 5335, 410, 5365]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant51"
|
|
SID "1500"
|
|
Position [350, 5405, 380, 5435]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant52"
|
|
SID "1501"
|
|
Position [380, 5660, 410, 5690]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant53"
|
|
SID "1502"
|
|
Position [350, 5730, 380, 5760]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant8"
|
|
SID "1503"
|
|
Position [365, 330, 395, 360]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Display
|
|
Name "Display1"
|
|
SID "1504"
|
|
Ports [1]
|
|
Position [730, 507, 820, 533]
|
|
Decimation "1"
|
|
Lockdown off
|
|
}
|
|
Block {
|
|
BlockType Display
|
|
Name "Display2"
|
|
SID "1505"
|
|
Ports [1]
|
|
Position [775, 657, 865, 683]
|
|
Decimation "1"
|
|
Lockdown off
|
|
}
|
|
Block {
|
|
BlockType Display
|
|
Name "Display3"
|
|
SID "1506"
|
|
Ports [1]
|
|
Position [740, 857, 830, 883]
|
|
Decimation "1"
|
|
Lockdown off
|
|
}
|
|
Block {
|
|
BlockType Display
|
|
Name "Display4"
|
|
SID "1507"
|
|
Ports [1]
|
|
Position [770, 1057, 860, 1083]
|
|
Decimation "1"
|
|
Lockdown off
|
|
}
|
|
Block {
|
|
BlockType Display
|
|
Name "Display5"
|
|
SID "1508"
|
|
Ports [1]
|
|
Position [735, 332, 825, 358]
|
|
Decimation "1"
|
|
Lockdown off
|
|
}
|
|
Block {
|
|
BlockType Display
|
|
Name "Display6"
|
|
SID "1509"
|
|
Ports [1]
|
|
Position [770, 1187, 860, 1213]
|
|
Decimation "1"
|
|
Lockdown off
|
|
}
|
|
Block {
|
|
BlockType Display
|
|
Name "Display7"
|
|
SID "1510"
|
|
Ports [1]
|
|
Position [640, 197, 730, 223]
|
|
Decimation "1"
|
|
Lockdown off
|
|
}
|
|
Block {
|
|
BlockType Display
|
|
Name "Display8"
|
|
SID "1511"
|
|
Ports [1]
|
|
Position [490, 317, 580, 343]
|
|
Decimation "1"
|
|
Lockdown off
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction1"
|
|
SID "1512"
|
|
Ports [2, 1]
|
|
Position [420, 177, 450, 208]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction10"
|
|
SID "1513"
|
|
Ports [2, 1]
|
|
Position [435, 1772, 465, 1803]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction11"
|
|
SID "1514"
|
|
Ports [2, 1]
|
|
Position [435, 1982, 465, 2013]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction12"
|
|
SID "1515"
|
|
Ports [2, 1]
|
|
Position [435, 2212, 465, 2243]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction13"
|
|
SID "1516"
|
|
Ports [2, 1]
|
|
Position [435, 2457, 465, 2488]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction14"
|
|
SID "1517"
|
|
Ports [2, 1]
|
|
Position [435, 2712, 465, 2743]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction15"
|
|
SID "1518"
|
|
Ports [2, 1]
|
|
Position [435, 2977, 465, 3008]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction16"
|
|
SID "1519"
|
|
Ports [2, 1]
|
|
Position [435, 3252, 465, 3283]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction17"
|
|
SID "1520"
|
|
Ports [2, 1]
|
|
Position [435, 3532, 465, 3563]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction18"
|
|
SID "1521"
|
|
Ports [2, 1]
|
|
Position [435, 3822, 465, 3853]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction19"
|
|
SID "1522"
|
|
Ports [2, 1]
|
|
Position [435, 4117, 465, 4148]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction2"
|
|
SID "1523"
|
|
Ports [2, 1]
|
|
Position [425, 362, 455, 393]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction20"
|
|
SID "1524"
|
|
Ports [2, 1]
|
|
Position [435, 4422, 465, 4453]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction21"
|
|
SID "1525"
|
|
Ports [2, 1]
|
|
Position [435, 4732, 465, 4763]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction22"
|
|
SID "1526"
|
|
Ports [2, 1]
|
|
Position [440, 5047, 470, 5078]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction23"
|
|
SID "1527"
|
|
Ports [2, 1]
|
|
Position [440, 5367, 470, 5398]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction24"
|
|
SID "1528"
|
|
Ports [2, 1]
|
|
Position [440, 5692, 470, 5723]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction3"
|
|
SID "1529"
|
|
Ports [2, 1]
|
|
Position [425, 512, 455, 543]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction4"
|
|
SID "1530"
|
|
Ports [2, 1]
|
|
Position [430, 672, 460, 703]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction5"
|
|
SID "1531"
|
|
Ports [2, 1]
|
|
Position [435, 842, 465, 873]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction6"
|
|
SID "1532"
|
|
Ports [2, 1]
|
|
Position [435, 1022, 465, 1053]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction7"
|
|
SID "1533"
|
|
Ports [2, 1]
|
|
Position [435, 1202, 465, 1233]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction8"
|
|
SID "1534"
|
|
Ports [2, 1]
|
|
Position [435, 1382, 465, 1413]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction9"
|
|
SID "1535"
|
|
Ports [2, 1]
|
|
Position [435, 1572, 465, 1603]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product1"
|
|
SID "1536"
|
|
Ports [2, 1]
|
|
Position [555, 202, 585, 233]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product10"
|
|
SID "1537"
|
|
Ports [2, 1]
|
|
Position [570, 1797, 600, 1828]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product11"
|
|
SID "1538"
|
|
Ports [2, 1]
|
|
Position [570, 2007, 600, 2038]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product12"
|
|
SID "1539"
|
|
Ports [2, 1]
|
|
Position [570, 2237, 600, 2268]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product13"
|
|
SID "1540"
|
|
Ports [2, 1]
|
|
Position [570, 2482, 600, 2513]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product14"
|
|
SID "1541"
|
|
Ports [2, 1]
|
|
Position [570, 2737, 600, 2768]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product15"
|
|
SID "1542"
|
|
Ports [2, 1]
|
|
Position [570, 3002, 600, 3033]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product16"
|
|
SID "1543"
|
|
Ports [2, 1]
|
|
Position [570, 3277, 600, 3308]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product17"
|
|
SID "1544"
|
|
Ports [2, 1]
|
|
Position [570, 3557, 600, 3588]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product18"
|
|
SID "1545"
|
|
Ports [2, 1]
|
|
Position [570, 3847, 600, 3878]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product19"
|
|
SID "1546"
|
|
Ports [2, 1]
|
|
Position [570, 4142, 600, 4173]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product2"
|
|
SID "1547"
|
|
Ports [2, 1]
|
|
Position [560, 387, 590, 418]
|
|
InputSameDT off
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logicop "AND"
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NumInputPorts "1"
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BitMask "bin2dec('0000000000000000010000000')"
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BitMaskRealWorld "Stored Integer"
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logicop "AND"
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BitMask "bin2dec('0000000000000000000100000')"
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logicop "AND"
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SourceBlock "simulink/Logic and Bit\nOperations/Bitwise\nOperator"
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logicop "AND"
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NumInputPorts "1"
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BitMask "bin2dec('0000000000000000000001000')"
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logicop "AND"
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BitMask "bin2dec('0000000000000000000000100')"
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Block {
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BlockType Reference
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SourceBlock "simulink/Logic and Bit\nOperations/Bitwise\nOperator"
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logicop "AND"
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BitMask "bin2dec('0000000000000000000000010')"
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Block {
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SourceBlock "simulink/Logic and Bit\nOperations/Bitwise\nOperator"
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logicop "AND"
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UseBitMask on
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NumInputPorts "1"
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BitMask "bin2dec('0000000000000000000000001')"
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SourceBlock "simulink/Logic and Bit\nOperations/Bitwise\nOperator"
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logicop "AND"
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SourceBlock "simulink/Logic and Bit\nOperations/Bitwise\nOperator"
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logicop "AND"
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logicop "AND"
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BitMask "bin2dec('0000100000000000000000000')"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncInitTerm "Inherit from model"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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|
|
BlockType Math
|
|
Name "Math\nFunction11"
|
|
SID "1740"
|
|
Ports [2, 1]
|
|
Position [435, 1982, 465, 2013]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction12"
|
|
SID "1741"
|
|
Ports [2, 1]
|
|
Position [435, 2212, 465, 2243]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction13"
|
|
SID "1742"
|
|
Ports [2, 1]
|
|
Position [435, 2457, 465, 2488]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction14"
|
|
SID "1743"
|
|
Ports [2, 1]
|
|
Position [435, 2712, 465, 2743]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction15"
|
|
SID "1744"
|
|
Ports [2, 1]
|
|
Position [435, 2977, 465, 3008]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction16"
|
|
SID "1745"
|
|
Ports [2, 1]
|
|
Position [435, 3252, 465, 3283]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction17"
|
|
SID "1746"
|
|
Ports [2, 1]
|
|
Position [435, 3532, 465, 3563]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction18"
|
|
SID "1747"
|
|
Ports [2, 1]
|
|
Position [435, 3822, 465, 3853]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction19"
|
|
SID "1748"
|
|
Ports [2, 1]
|
|
Position [435, 4117, 465, 4148]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction2"
|
|
SID "1749"
|
|
Ports [2, 1]
|
|
Position [425, 362, 455, 393]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction20"
|
|
SID "1750"
|
|
Ports [2, 1]
|
|
Position [435, 4422, 465, 4453]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction21"
|
|
SID "1751"
|
|
Ports [2, 1]
|
|
Position [435, 4732, 465, 4763]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction22"
|
|
SID "1752"
|
|
Ports [2, 1]
|
|
Position [440, 5047, 470, 5078]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction23"
|
|
SID "1753"
|
|
Ports [2, 1]
|
|
Position [440, 5367, 470, 5398]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction24"
|
|
SID "1754"
|
|
Ports [2, 1]
|
|
Position [440, 5692, 470, 5723]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction3"
|
|
SID "1755"
|
|
Ports [2, 1]
|
|
Position [425, 512, 455, 543]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction4"
|
|
SID "1756"
|
|
Ports [2, 1]
|
|
Position [430, 672, 460, 703]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction5"
|
|
SID "1757"
|
|
Ports [2, 1]
|
|
Position [435, 842, 465, 873]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction6"
|
|
SID "1758"
|
|
Ports [2, 1]
|
|
Position [435, 1022, 465, 1053]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction7"
|
|
SID "1759"
|
|
Ports [2, 1]
|
|
Position [435, 1202, 465, 1233]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction8"
|
|
SID "1760"
|
|
Ports [2, 1]
|
|
Position [435, 1382, 465, 1413]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction9"
|
|
SID "1761"
|
|
Ports [2, 1]
|
|
Position [435, 1572, 465, 1603]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product1"
|
|
SID "1762"
|
|
Ports [2, 1]
|
|
Position [555, 202, 585, 233]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product10"
|
|
SID "1763"
|
|
Ports [2, 1]
|
|
Position [570, 1797, 600, 1828]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product11"
|
|
SID "1764"
|
|
Ports [2, 1]
|
|
Position [570, 2007, 600, 2038]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product12"
|
|
SID "1765"
|
|
Ports [2, 1]
|
|
Position [570, 2237, 600, 2268]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product13"
|
|
SID "1766"
|
|
Ports [2, 1]
|
|
Position [570, 2482, 600, 2513]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product14"
|
|
SID "1767"
|
|
Ports [2, 1]
|
|
Position [570, 2737, 600, 2768]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product15"
|
|
SID "1768"
|
|
Ports [2, 1]
|
|
Position [570, 3002, 600, 3033]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product16"
|
|
SID "1769"
|
|
Ports [2, 1]
|
|
Position [570, 3277, 600, 3308]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product17"
|
|
SID "1770"
|
|
Ports [2, 1]
|
|
Position [570, 3557, 600, 3588]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product18"
|
|
SID "1771"
|
|
Ports [2, 1]
|
|
Position [570, 3847, 600, 3878]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product19"
|
|
SID "1772"
|
|
Ports [2, 1]
|
|
Position [570, 4142, 600, 4173]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product2"
|
|
SID "1773"
|
|
Ports [2, 1]
|
|
Position [560, 387, 590, 418]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product20"
|
|
SID "1774"
|
|
Ports [2, 1]
|
|
Position [570, 4447, 600, 4478]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product21"
|
|
SID "1775"
|
|
Ports [2, 1]
|
|
Position [570, 4757, 600, 4788]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product22"
|
|
SID "1776"
|
|
Ports [2, 1]
|
|
Position [575, 5072, 605, 5103]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product23"
|
|
SID "1777"
|
|
Ports [2, 1]
|
|
Position [575, 5392, 605, 5423]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product24"
|
|
SID "1778"
|
|
Ports [2, 1]
|
|
Position [575, 5717, 605, 5748]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product3"
|
|
SID "1779"
|
|
Ports [2, 1]
|
|
Position [560, 537, 590, 568]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product4"
|
|
SID "1780"
|
|
Ports [2, 1]
|
|
Position [565, 697, 595, 728]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product5"
|
|
SID "1781"
|
|
Ports [2, 1]
|
|
Position [570, 867, 600, 898]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product6"
|
|
SID "1782"
|
|
Ports [2, 1]
|
|
Position [570, 1047, 600, 1078]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product7"
|
|
SID "1783"
|
|
Ports [2, 1]
|
|
Position [570, 1227, 600, 1258]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product8"
|
|
SID "1784"
|
|
Ports [2, 1]
|
|
Position [570, 1407, 600, 1438]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product9"
|
|
SID "1785"
|
|
Ports [2, 1]
|
|
Position [570, 1597, 600, 1628]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Sum
|
|
Name "Sum1"
|
|
SID "1786"
|
|
Ports [2, 1]
|
|
Position [380, 380, 400, 400]
|
|
ShowName off
|
|
IconShape "round"
|
|
Inputs "|+-"
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Sum
|
|
Name "Sum10"
|
|
SID "1787"
|
|
Ports [2, 1]
|
|
Position [380, 1400, 400, 1420]
|
|
ShowName off
|
|
IconShape "round"
|
|
Inputs "|+-"
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Sum
|
|
Name "Sum11"
|
|
SID "1788"
|
|
Ports [2, 1]
|
|
Position [380, 1590, 400, 1610]
|
|
ShowName off
|
|
IconShape "round"
|
|
Inputs "|+-"
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Sum
|
|
Name "Sum12"
|
|
SID "1789"
|
|
Ports [2, 1]
|
|
Position [380, 1790, 400, 1810]
|
|
ShowName off
|
|
IconShape "round"
|
|
Inputs "|+-"
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Sum
|
|
Name "Sum13"
|
|
SID "1790"
|
|
Ports [2, 1]
|
|
Position [380, 2000, 400, 2020]
|
|
ShowName off
|
|
IconShape "round"
|
|
Inputs "|+-"
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Sum
|
|
Name "Sum14"
|
|
SID "1791"
|
|
Ports [2, 1]
|
|
Position [380, 2230, 400, 2250]
|
|
ShowName off
|
|
IconShape "round"
|
|
Inputs "|+-"
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Sum
|
|
Name "Sum15"
|
|
SID "1792"
|
|
Ports [2, 1]
|
|
Position [380, 2475, 400, 2495]
|
|
ShowName off
|
|
IconShape "round"
|
|
Inputs "|+-"
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Sum
|
|
Name "Sum16"
|
|
SID "1793"
|
|
Ports [2, 1]
|
|
Position [380, 2730, 400, 2750]
|
|
ShowName off
|
|
IconShape "round"
|
|
Inputs "|+-"
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Sum
|
|
Name "Sum17"
|
|
SID "1794"
|
|
Ports [2, 1]
|
|
Position [380, 2995, 400, 3015]
|
|
ShowName off
|
|
IconShape "round"
|
|
Inputs "|+-"
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Sum
|
|
Name "Sum18"
|
|
SID "1795"
|
|
Ports [2, 1]
|
|
Position [380, 3270, 400, 3290]
|
|
ShowName off
|
|
IconShape "round"
|
|
Inputs "|+-"
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Sum
|
|
Name "Sum19"
|
|
SID "1796"
|
|
Ports [2, 1]
|
|
Position [380, 3550, 400, 3570]
|
|
ShowName off
|
|
IconShape "round"
|
|
Inputs "|+-"
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Sum
|
|
Name "Sum20"
|
|
SID "1797"
|
|
Ports [2, 1]
|
|
Position [380, 3840, 400, 3860]
|
|
ShowName off
|
|
IconShape "round"
|
|
Inputs "|+-"
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Sum
|
|
Name "Sum21"
|
|
SID "1798"
|
|
Ports [2, 1]
|
|
Position [380, 4135, 400, 4155]
|
|
ShowName off
|
|
IconShape "round"
|
|
Inputs "|+-"
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Sum
|
|
Name "Sum22"
|
|
SID "1799"
|
|
Ports [2, 1]
|
|
Position [380, 4440, 400, 4460]
|
|
ShowName off
|
|
IconShape "round"
|
|
Inputs "|+-"
|
|
InputSameDT off
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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FunctionWithSeparateData off
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RTWMemSecFuncInitTerm "Inherit from model"
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RTWMemSecFuncExecute "Inherit from model"
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RTWMemSecDataConstants "Inherit from model"
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RTWMemSecDataInternal "Inherit from model"
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RTWMemSecDataParameters "Inherit from model"
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|
Position [375, 1350, 405, 1380]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant21"
|
|
SID "1922"
|
|
Position [345, 1420, 375, 1450]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant22"
|
|
SID "1923"
|
|
Position [375, 1540, 405, 1570]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant23"
|
|
SID "1924"
|
|
Position [345, 1610, 375, 1640]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant24"
|
|
SID "1925"
|
|
Position [375, 1740, 405, 1770]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant25"
|
|
SID "1926"
|
|
Position [345, 1810, 375, 1840]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant26"
|
|
SID "1927"
|
|
Position [375, 1950, 405, 1980]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant27"
|
|
SID "1928"
|
|
Position [345, 2020, 375, 2050]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant28"
|
|
SID "1929"
|
|
Position [375, 2180, 405, 2210]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant29"
|
|
SID "1930"
|
|
Position [345, 2250, 375, 2280]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant30"
|
|
SID "1931"
|
|
Position [375, 2425, 405, 2455]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant31"
|
|
SID "1932"
|
|
Position [345, 2495, 375, 2525]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant32"
|
|
SID "1933"
|
|
Position [375, 2680, 405, 2710]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant33"
|
|
SID "1934"
|
|
Position [345, 2750, 375, 2780]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant34"
|
|
SID "1935"
|
|
Position [375, 2945, 405, 2975]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant35"
|
|
SID "1936"
|
|
Position [345, 3015, 375, 3045]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant36"
|
|
SID "1937"
|
|
Position [375, 3220, 405, 3250]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant37"
|
|
SID "1938"
|
|
Position [345, 3290, 375, 3320]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant38"
|
|
SID "1939"
|
|
Position [375, 3500, 405, 3530]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant39"
|
|
SID "1940"
|
|
Position [345, 3570, 375, 3600]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant40"
|
|
SID "1941"
|
|
Position [375, 3790, 405, 3820]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant41"
|
|
SID "1942"
|
|
Position [345, 3860, 375, 3890]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant42"
|
|
SID "1943"
|
|
Position [375, 4085, 405, 4115]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant43"
|
|
SID "1944"
|
|
Position [345, 4155, 375, 4185]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant44"
|
|
SID "1945"
|
|
Position [375, 4390, 405, 4420]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant45"
|
|
SID "1946"
|
|
Position [345, 4460, 375, 4490]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant46"
|
|
SID "1947"
|
|
Position [375, 4700, 405, 4730]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant47"
|
|
SID "1948"
|
|
Position [345, 4770, 375, 4800]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant48"
|
|
SID "1949"
|
|
Position [380, 5015, 410, 5045]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant49"
|
|
SID "1950"
|
|
Position [350, 5085, 380, 5115]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant50"
|
|
SID "1951"
|
|
Position [380, 5335, 410, 5365]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant51"
|
|
SID "1952"
|
|
Position [350, 5405, 380, 5435]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant52"
|
|
SID "1953"
|
|
Position [380, 5660, 410, 5690]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant53"
|
|
SID "1954"
|
|
Position [350, 5730, 380, 5760]
|
|
}
|
|
Block {
|
|
BlockType Constant
|
|
Name "Constant8"
|
|
SID "1955"
|
|
Position [365, 330, 395, 360]
|
|
Value "2"
|
|
}
|
|
Block {
|
|
BlockType Display
|
|
Name "Display1"
|
|
SID "1956"
|
|
Ports [1]
|
|
Position [730, 507, 820, 533]
|
|
Decimation "1"
|
|
Lockdown off
|
|
}
|
|
Block {
|
|
BlockType Display
|
|
Name "Display2"
|
|
SID "1957"
|
|
Ports [1]
|
|
Position [775, 657, 865, 683]
|
|
Decimation "1"
|
|
Lockdown off
|
|
}
|
|
Block {
|
|
BlockType Display
|
|
Name "Display3"
|
|
SID "1958"
|
|
Ports [1]
|
|
Position [740, 857, 830, 883]
|
|
Decimation "1"
|
|
Lockdown off
|
|
}
|
|
Block {
|
|
BlockType Display
|
|
Name "Display4"
|
|
SID "1959"
|
|
Ports [1]
|
|
Position [770, 1057, 860, 1083]
|
|
Decimation "1"
|
|
Lockdown off
|
|
}
|
|
Block {
|
|
BlockType Display
|
|
Name "Display5"
|
|
SID "1960"
|
|
Ports [1]
|
|
Position [735, 332, 825, 358]
|
|
Decimation "1"
|
|
Lockdown off
|
|
}
|
|
Block {
|
|
BlockType Display
|
|
Name "Display6"
|
|
SID "1961"
|
|
Ports [1]
|
|
Position [770, 1187, 860, 1213]
|
|
Decimation "1"
|
|
Lockdown off
|
|
}
|
|
Block {
|
|
BlockType Display
|
|
Name "Display7"
|
|
SID "1962"
|
|
Ports [1]
|
|
Position [640, 197, 730, 223]
|
|
Decimation "1"
|
|
Lockdown off
|
|
}
|
|
Block {
|
|
BlockType Display
|
|
Name "Display8"
|
|
SID "1963"
|
|
Ports [1]
|
|
Position [490, 317, 580, 343]
|
|
Decimation "1"
|
|
Lockdown off
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction1"
|
|
SID "1964"
|
|
Ports [2, 1]
|
|
Position [420, 177, 450, 208]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction10"
|
|
SID "1965"
|
|
Ports [2, 1]
|
|
Position [435, 1772, 465, 1803]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction11"
|
|
SID "1966"
|
|
Ports [2, 1]
|
|
Position [435, 1982, 465, 2013]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction12"
|
|
SID "1967"
|
|
Ports [2, 1]
|
|
Position [435, 2212, 465, 2243]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction13"
|
|
SID "1968"
|
|
Ports [2, 1]
|
|
Position [435, 2457, 465, 2488]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction14"
|
|
SID "1969"
|
|
Ports [2, 1]
|
|
Position [435, 2712, 465, 2743]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction15"
|
|
SID "1970"
|
|
Ports [2, 1]
|
|
Position [435, 2977, 465, 3008]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction16"
|
|
SID "1971"
|
|
Ports [2, 1]
|
|
Position [435, 3252, 465, 3283]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction17"
|
|
SID "1972"
|
|
Ports [2, 1]
|
|
Position [435, 3532, 465, 3563]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction18"
|
|
SID "1973"
|
|
Ports [2, 1]
|
|
Position [435, 3822, 465, 3853]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction19"
|
|
SID "1974"
|
|
Ports [2, 1]
|
|
Position [435, 4117, 465, 4148]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction2"
|
|
SID "1975"
|
|
Ports [2, 1]
|
|
Position [425, 362, 455, 393]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction20"
|
|
SID "1976"
|
|
Ports [2, 1]
|
|
Position [435, 4422, 465, 4453]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction21"
|
|
SID "1977"
|
|
Ports [2, 1]
|
|
Position [435, 4732, 465, 4763]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction22"
|
|
SID "1978"
|
|
Ports [2, 1]
|
|
Position [440, 5047, 470, 5078]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction23"
|
|
SID "1979"
|
|
Ports [2, 1]
|
|
Position [440, 5367, 470, 5398]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction24"
|
|
SID "1980"
|
|
Ports [2, 1]
|
|
Position [440, 5692, 470, 5723]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction3"
|
|
SID "1981"
|
|
Ports [2, 1]
|
|
Position [425, 512, 455, 543]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction4"
|
|
SID "1982"
|
|
Ports [2, 1]
|
|
Position [430, 672, 460, 703]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction5"
|
|
SID "1983"
|
|
Ports [2, 1]
|
|
Position [435, 842, 465, 873]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction6"
|
|
SID "1984"
|
|
Ports [2, 1]
|
|
Position [435, 1022, 465, 1053]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction7"
|
|
SID "1985"
|
|
Ports [2, 1]
|
|
Position [435, 1202, 465, 1233]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction8"
|
|
SID "1986"
|
|
Ports [2, 1]
|
|
Position [435, 1382, 465, 1413]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Math
|
|
Name "Math\nFunction9"
|
|
SID "1987"
|
|
Ports [2, 1]
|
|
Position [435, 1572, 465, 1603]
|
|
Operator "pow"
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product1"
|
|
SID "1988"
|
|
Ports [2, 1]
|
|
Position [555, 202, 585, 233]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product10"
|
|
SID "1989"
|
|
Ports [2, 1]
|
|
Position [570, 1797, 600, 1828]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product11"
|
|
SID "1990"
|
|
Ports [2, 1]
|
|
Position [570, 2007, 600, 2038]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product12"
|
|
SID "1991"
|
|
Ports [2, 1]
|
|
Position [570, 2237, 600, 2268]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product13"
|
|
SID "1992"
|
|
Ports [2, 1]
|
|
Position [570, 2482, 600, 2513]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product14"
|
|
SID "1993"
|
|
Ports [2, 1]
|
|
Position [570, 2737, 600, 2768]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product15"
|
|
SID "1994"
|
|
Ports [2, 1]
|
|
Position [570, 3002, 600, 3033]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product16"
|
|
SID "1995"
|
|
Ports [2, 1]
|
|
Position [570, 3277, 600, 3308]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product17"
|
|
SID "1996"
|
|
Ports [2, 1]
|
|
Position [570, 3557, 600, 3588]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product18"
|
|
SID "1997"
|
|
Ports [2, 1]
|
|
Position [570, 3847, 600, 3878]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product19"
|
|
SID "1998"
|
|
Ports [2, 1]
|
|
Position [570, 4142, 600, 4173]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product2"
|
|
SID "1999"
|
|
Ports [2, 1]
|
|
Position [560, 387, 590, 418]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product20"
|
|
SID "2000"
|
|
Ports [2, 1]
|
|
Position [570, 4447, 600, 4478]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
|
|
BlockType Product
|
|
Name "Product21"
|
|
SID "2001"
|
|
Ports [2, 1]
|
|
Position [570, 4757, 600, 4788]
|
|
InputSameDT off
|
|
OutDataTypeStr "Inherit: Inherit via internal rule"
|
|
SaturateOnIntegerOverflow off
|
|
}
|
|
Block {
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