mirror of https://github.com/gnss-sdr/gnss-sdr
90 lines
3.2 KiB
C++
90 lines
3.2 KiB
C++
/*!
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* \file fpga_dynamic_bit_selection.h
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* \brief Dynamic bit selection in the received signal.
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* \authors <ul>
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* <li> Marc Majoral, 2020. mmajoral(at)cttc.es
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* </ul>
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*
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* Class that controls the Dynamic Bit Selection in the FPGA.
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*
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*
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* -----------------------------------------------------------------------------
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*
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* GNSS-SDR is a Global Navigation Satellite System software-defined receiver.
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* This file is part of GNSS-SDR.
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*
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* Copyright (C) 2010-2020 (see AUTHORS file for a list of contributors)
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* SPDX-License-Identifier: GPL-3.0-or-later
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*
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* -----------------------------------------------------------------------------
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*/
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#ifndef GNSS_SDR_FPGA_DYNAMIC_BIT_SELECTION_H
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#define GNSS_SDR_FPGA_DYNAMIC_BIT_SELECTION_H
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#include <cstddef>
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#include <cstdint>
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#include <string>
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#include <vector>
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/** \addtogroup Signal_Source
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* \{ */
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/** \addtogroup Signal_Source_libs
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* \{ */
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/*!
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* \brief Class that controls the switch in the FPGA, which connects the FPGA acquisition and multicorrelator modules to
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* either the DMA or the Analog Front-End.
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*/
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class Fpga_dynamic_bit_selection
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{
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public:
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/*!
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* \brief Constructor
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*/
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explicit Fpga_dynamic_bit_selection(bool enable_rx1_band, bool enable_rx2_band);
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/*!
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* \brief Destructor
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*/
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~Fpga_dynamic_bit_selection();
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/*!
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* \brief This function configures the switch in th eFPGA
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*/
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void bit_selection(void);
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private:
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const std::string switch_device_name = std::string("AXIS_Switch_v1_0_0"); // Switch UIO device name
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const std::string dyn_bit_sel_device_name = std::string("dynamic_bits_selector"); // Switch dhnamic bit selector device name
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static const size_t FPGA_PAGE_SIZE = 0x1000;
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static const uint32_t Num_bits_ADC = 12; // Number of bits in the ADC
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static const uint32_t Num_bits_FPGA = 4; // Number of bits after the bit selection
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static const uint32_t shift_out_bits_default = Num_bits_ADC - Num_bits_FPGA; // take the most significant bits by default
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static const uint32_t shift_out_bits_min = 0; // minimum possible value for the bit selection
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static const uint32_t shift_out_bit_max = Num_bits_ADC - Num_bits_FPGA; // maximum possible value for the bit selection
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// received signal power thresholds for the bit selection
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// the received signal power is estimated as the averaged squared absolute value of the received signal samples
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static const uint32_t Power_Threshold_High = 9000;
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static const uint32_t Power_Threshold_Low = 3000;
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void open_device(volatile unsigned **d_map_base, int &d_dev_descr, int freq_band);
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void bit_selection_per_rf_band(volatile unsigned *d_map_base, uint32_t shift_out_bits);
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void close_device(volatile unsigned *d_map_base, int &d_dev_descr);
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volatile unsigned *d_map_base_freq_band_1;
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volatile unsigned *d_map_base_freq_band_2;
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int d_dev_descr_freq_band_1;
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int d_dev_descr_freq_band_2;
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uint32_t d_shift_out_bits_freq_band_1;
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uint32_t d_shift_out_bits_freq_band_2;
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bool d_enable_rx1_band;
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bool d_enable_rx2_band;
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};
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/** \} */
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/** \} */
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#endif // GNSS_SDR_FPGA_DYNAMIC_BIT_SELECTION_H
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