mirror of https://github.com/gnss-sdr/gnss-sdr
353 lines
14 KiB
C++
353 lines
14 KiB
C++
/*!
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* \file pcps_acquisition_fpga.cc
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* \brief This class implements a Parallel Code Phase Search Acquisition in the FPGA
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*
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* Note: The CFAR algorithm is not implemented in the FPGA.
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* Note 2: The bit transition flag is not implemented in the FPGA
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*
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* \authors <ul>
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* <li> Marc Majoral, 2017. mmajoral(at)cttc.cat
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* <li> Javier Arribas, 2011. jarribas(at)cttc.es
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* <li> Luis Esteve, 2012. luis(at)epsilon-formacion.com
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* <li> Marc Molina, 2013. marc.molina.pena@gmail.com
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* <li> Cillian O'Driscoll, 2017. cillian(at)ieee.org
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* </ul>
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*
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* -------------------------------------------------------------------------
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*
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* Copyright (C) 2010-2017 (see AUTHORS file for a list of contributors)
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*
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* GNSS-SDR is a software defined Global Navigation
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* Satellite Systems receiver
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*
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* This file is part of GNSS-SDR.
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*
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* GNSS-SDR is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* GNSS-SDR is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with GNSS-SDR. If not, see <http://www.gnu.org/licenses/>.
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*
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* -------------------------------------------------------------------------
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*/
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#include "pcps_acquisition_fpga.h"
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#include <glog/logging.h>
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#include <gnuradio/io_signature.h>
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#define AQ_DOWNSAMPLING_DELAY 40 // delay due to the downsampling filter in the acquisition
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using google::LogMessage;
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pcps_acquisition_fpga_sptr pcps_make_acquisition_fpga(pcpsconf_fpga_t conf_)
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{
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return pcps_acquisition_fpga_sptr(new pcps_acquisition_fpga(conf_));
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}
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pcps_acquisition_fpga::pcps_acquisition_fpga(pcpsconf_fpga_t conf_) : gr::block("pcps_acquisition_fpga",
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gr::io_signature::make(0, 0, 0),
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gr::io_signature::make(0, 0, 0))
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{
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// printf("acq constructor start\n");
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this->message_port_register_out(pmt::mp("events"));
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acq_parameters = conf_;
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d_sample_counter = 0ULL; // SAMPLE COUNTER
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d_active = false;
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d_state = 0;
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//d_fft_size = acq_parameters.sampled_ms * acq_parameters.samples_per_ms;
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d_fft_size = acq_parameters.samples_per_code;
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d_mag = 0;
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d_input_power = 0.0;
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d_num_doppler_bins = 0U;
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d_threshold = 0.0;
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d_doppler_step = 0U;
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d_test_statistics = 0.0;
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d_channel = 0U;
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d_gnss_synchro = 0;
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//printf("zzzz acq_parameters.code_length = %d\n", acq_parameters.code_length);
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//printf("zzzz acq_parameters.samples_per_ms = %d\n", acq_parameters.samples_per_ms);
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//printf("zzzz d_fft_size = %d\n", d_fft_size);
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// this one works we don't know why
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// acquisition_fpga = std::make_shared <fpga_acquisition>
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// (acq_parameters.device_name, acq_parameters.code_length, acq_parameters.doppler_max, acq_parameters.samples_per_ms,
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// acq_parameters.fs_in, acq_parameters.freq, acq_parameters.sampled_ms, acq_parameters.select_queue_Fpga, acq_parameters.all_fft_codes);
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// this one is the one it should be but it doesn't work
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acquisition_fpga = std::make_shared<fpga_acquisition>(acq_parameters.device_name, acq_parameters.code_length, acq_parameters.doppler_max, d_fft_size,
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acq_parameters.fs_in, acq_parameters.sampled_ms, acq_parameters.select_queue_Fpga, acq_parameters.all_fft_codes);
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// acquisition_fpga = std::make_shared <fpga_acquisition>
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// (acq_parameters.device_name, acq_parameters.samples_per_code, acq_parameters.doppler_max, acq_parameters.samples_per_code,
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// acq_parameters.fs_in, acq_parameters.freq, acq_parameters.sampled_ms, acq_parameters.select_queue_Fpga, acq_parameters.all_fft_codes);
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// debug
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//debug_d_max_absolute = 0.0;
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//debug_d_input_power_absolute = 0.0;
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// printf("acq constructor end\n");
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}
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pcps_acquisition_fpga::~pcps_acquisition_fpga()
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{
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// printf("acq destructor start\n");
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acquisition_fpga->free();
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// printf("acq destructor end\n");
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}
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void pcps_acquisition_fpga::set_local_code()
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{
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// printf("acq set local code start\n");
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acquisition_fpga->set_local_code(d_gnss_synchro->PRN);
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// printf("acq set local code end\n");
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}
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void pcps_acquisition_fpga::init()
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{
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// printf("acq init start\n");
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d_gnss_synchro->Flag_valid_acquisition = false;
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d_gnss_synchro->Flag_valid_symbol_output = false;
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d_gnss_synchro->Flag_valid_pseudorange = false;
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d_gnss_synchro->Flag_valid_word = false;
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d_gnss_synchro->Acq_delay_samples = 0.0;
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d_gnss_synchro->Acq_doppler_hz = 0.0;
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d_gnss_synchro->Acq_samplestamp_samples = 0;
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d_mag = 0.0;
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d_input_power = 0.0;
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d_num_doppler_bins = static_cast<uint32_t>(std::ceil(static_cast<double>(static_cast<int32_t>(acq_parameters.doppler_max) - static_cast<int32_t>(-acq_parameters.doppler_max)) / static_cast<double>(d_doppler_step)));
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acquisition_fpga->init();
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// printf("acq init end\n");
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}
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void pcps_acquisition_fpga::set_state(int32_t state)
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{
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// printf("acq set state start\n");
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d_state = state;
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if (d_state == 1)
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{
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d_gnss_synchro->Acq_delay_samples = 0.0;
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d_gnss_synchro->Acq_doppler_hz = 0.0;
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d_gnss_synchro->Acq_samplestamp_samples = 0;
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//d_well_count = 0;
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d_mag = 0.0;
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d_input_power = 0.0;
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d_test_statistics = 0.0;
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d_active = true;
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}
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else if (d_state == 0)
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{
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}
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else
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{
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LOG(ERROR) << "State can only be set to 0 or 1";
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}
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// printf("acq set state end\n");
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}
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void pcps_acquisition_fpga::send_positive_acquisition()
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{
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// printf("acq send positive acquisition start\n");
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// 6.1- Declare positive acquisition using a message port
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//0=STOP_CHANNEL 1=ACQ_SUCCEES 2=ACQ_FAIL
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DLOG(INFO) << "positive acquisition"
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<< ", satellite " << d_gnss_synchro->System << " " << d_gnss_synchro->PRN
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<< ", sample_stamp " << d_sample_counter
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<< ", test statistics value " << d_test_statistics
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<< ", test statistics threshold " << d_threshold
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<< ", code phase " << d_gnss_synchro->Acq_delay_samples
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<< ", doppler " << d_gnss_synchro->Acq_doppler_hz
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<< ", magnitude " << d_mag
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<< ", input signal power " << d_input_power;
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this->message_port_pub(pmt::mp("events"), pmt::from_long(1));
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// printf("acq send positive acquisition end\n");
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}
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void pcps_acquisition_fpga::send_negative_acquisition()
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{
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// printf("acq send negative acquisition start\n");
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// 6.2- Declare negative acquisition using a message port
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//0=STOP_CHANNEL 1=ACQ_SUCCEES 2=ACQ_FAIL
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DLOG(INFO) << "negative acquisition"
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<< ", satellite " << d_gnss_synchro->System << " " << d_gnss_synchro->PRN
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<< ", sample_stamp " << d_sample_counter
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<< ", test statistics value " << d_test_statistics
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<< ", test statistics threshold " << d_threshold
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<< ", code phase " << d_gnss_synchro->Acq_delay_samples
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<< ", doppler " << d_gnss_synchro->Acq_doppler_hz
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<< ", magnitude " << d_mag
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<< ", input signal power " << d_input_power;
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this->message_port_pub(pmt::mp("events"), pmt::from_long(2));
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// printf("acq send negative acquisition end\n");
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}
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void pcps_acquisition_fpga::set_active(bool active)
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{
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// printf("acq set active start\n");
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d_active = active;
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// initialize acquisition algorithm
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uint32_t indext = 0U;
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float magt = 0.0;
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float fft_normalization_factor = static_cast<float>(d_fft_size) * static_cast<float>(d_fft_size);
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d_input_power = 0.0;
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d_mag = 0.0;
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DLOG(INFO) << "Channel: " << d_channel
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<< " , doing acquisition of satellite: " << d_gnss_synchro->System << " " << d_gnss_synchro->PRN
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<< " ,sample stamp: " << d_sample_counter << ", threshold: "
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<< d_threshold << ", doppler_max: " << acq_parameters.doppler_max
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<< ", doppler_step: " << d_doppler_step
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// no CFAR algorithm in the FPGA
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<< ", use_CFAR_algorithm_flag: false";
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uint64_t initial_sample;
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float input_power_all = 0.0;
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float input_power_computed = 0.0;
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float temp_d_input_power;
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// loop through acquisition
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/*
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for (unsigned int doppler_index = 0; doppler_index < d_num_doppler_bins; doppler_index++)
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{
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// doppler search steps
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int32_t doppler = -static_cast<int32_t>(acq_parameters.doppler_max) + d_doppler_step * doppler_index;
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//acquisition_fpga->set_phase_step(doppler_index);
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acquisition_fpga->set_doppler_sweep_debug(1, doppler_index);
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acquisition_fpga->run_acquisition(); // runs acquisition and waits until it is finished
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acquisition_fpga->read_acquisition_results(&indext, &magt,
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&initial_sample, &d_input_power, &d_doppler_index);
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d_sample_counter = initial_sample;
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if (d_mag < magt)
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{
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d_mag = magt;
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temp_d_input_power = d_input_power;
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input_power_all = d_input_power / (d_fft_size - 1);
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input_power_computed = (d_input_power - d_mag) / (d_fft_size - 1);
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d_input_power = (d_input_power - d_mag) / (d_fft_size - 1);
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d_gnss_synchro->Acq_delay_samples = static_cast<double>(indext % acq_parameters.samples_per_code);
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d_gnss_synchro->Acq_doppler_hz = static_cast<double>(doppler);
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d_gnss_synchro->Acq_samplestamp_samples = d_sample_counter;
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d_test_statistics = (d_mag / d_input_power); //* correction_factor;
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}
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// In the case of the FPGA the option of dumping the results of the acquisition to a file is not available
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// because the IFFT vector is not available
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}
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*/
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// debug
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//acquisition_fpga->block_samples();
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// run loop in hw
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//printf("LAUNCH ACQ\n");
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acquisition_fpga->set_doppler_sweep(d_num_doppler_bins);
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acquisition_fpga->run_acquisition();
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acquisition_fpga->read_acquisition_results(&indext, &magt,
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&initial_sample, &d_input_power, &d_doppler_index);
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//printf("READ ACQ RESULTS\n");
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// debug
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//acquisition_fpga->unblock_samples();
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d_mag = magt;
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// debug
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debug_d_max_absolute = magt;
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debug_d_input_power_absolute = d_input_power;
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debug_indext = indext;
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debug_doppler_index = d_doppler_index;
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// temp_d_input_power = d_input_power;
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d_input_power = (d_input_power - d_mag) / (d_fft_size - 1);
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int32_t doppler = -static_cast<int32_t>(acq_parameters.doppler_max) + d_doppler_step * d_doppler_index;
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//d_gnss_synchro->Acq_delay_samples = static_cast<double>(2*(indext % (2*acq_parameters.samples_per_code)));
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d_gnss_synchro->Acq_delay_samples = static_cast<double>(indext % acq_parameters.samples_per_code);
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d_gnss_synchro->Acq_doppler_hz = static_cast<double>(doppler);
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d_sample_counter = initial_sample;
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//d_gnss_synchro->Acq_samplestamp_samples = 2*d_sample_counter - 81; // delay due to the downsampling filter in the acquisition
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//d_gnss_synchro->Acq_samplestamp_samples = d_sample_counter - 40; // delay due to the downsampling filter in the acquisition
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d_gnss_synchro->Acq_samplestamp_samples = d_sample_counter; // delay due to the downsampling filter in the acquisition
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d_test_statistics = (d_mag / d_input_power); //* correction_factor;
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// debug
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// if (d_gnss_synchro->Acq_delay_samples > acq_parameters.code_length)
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// {
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// printf("d_gnss_synchro->Acq_samplestamp_samples = %d\n", d_gnss_synchro->Acq_samplestamp_samples);
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// printf("d_gnss_synchro->Acq_delay_samples = %f\n", d_gnss_synchro->Acq_delay_samples);
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// }
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// if (temp_d_input_power > debug_d_input_power_absolute)
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// {
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// debug_d_max_absolute = d_mag;
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// debug_d_input_power_absolute = temp_d_input_power;
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// }
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// printf ("max debug_d_max_absolute = %f\n", debug_d_max_absolute);
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// printf ("debug_d_input_power_absolute = %f\n", debug_d_input_power_absolute);
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// printf("&&&&& d_test_statistics = %f\n", d_test_statistics);
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// printf("&&&&& debug_d_max_absolute =%f\n",debug_d_max_absolute);
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// printf("&&&&& debug_d_input_power_absolute =%f\n",debug_d_input_power_absolute);
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// printf("&&&&& debug_indext = %d\n",debug_indext);
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// printf("&&&&& debug_doppler_index = %d\n",debug_doppler_index);
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if (d_test_statistics > d_threshold)
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{
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d_active = false;
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// printf("##### d_test_statistics = %f\n", d_test_statistics);
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// printf("##### debug_d_max_absolute =%f\n",debug_d_max_absolute);
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// printf("##### debug_d_input_power_absolute =%f\n",debug_d_input_power_absolute);
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// printf("##### initial_sample = %llu\n",initial_sample);
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// printf("##### debug_doppler_index = %d\n",debug_doppler_index);
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send_positive_acquisition();
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d_state = 0; // Positive acquisition
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}
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else
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{
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d_state = 0;
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d_active = false;
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send_negative_acquisition();
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}
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// printf("acq set active end\n");
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}
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int pcps_acquisition_fpga::general_work(int noutput_items __attribute__((unused)),
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gr_vector_int& ninput_items, gr_vector_const_void_star& input_items,
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gr_vector_void_star& output_items __attribute__((unused)))
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{
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// the general work is not used with the acquisition that uses the FPGA
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return noutput_items;
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}
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