mirror of
https://github.com/gnss-sdr/gnss-sdr
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145 lines
4.5 KiB
C++
145 lines
4.5 KiB
C++
/*!
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* \file ad9361_fpga_signal_source.h
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* \brief signal source for Analog Devices front-end AD9361 connected directly to FPGA accelerators.
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* This source implements only the AD9361 control. It is NOT compatible with conventional SDR acquisition and tracking blocks.
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* Please use the fmcomms2 source if conventional SDR acquisition and tracking is selected in the configuration file.
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*
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* -----------------------------------------------------------------------------
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*
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* GNSS-SDR is a Global Navigation Satellite System software-defined receiver.
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* This file is part of GNSS-SDR.
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*
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* Copyright (C) 2010-2020 (see AUTHORS file for a list of contributors)
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* SPDX-License-Identifier: GPL-3.0-or-later
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*
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* -----------------------------------------------------------------------------
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*/
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#ifndef GNSS_SDR_AD9361_FPGA_SIGNAL_SOURCE_H
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#define GNSS_SDR_AD9361_FPGA_SIGNAL_SOURCE_H
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#include "concurrent_queue.h"
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#include "fpga_buffer_monitor.h"
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#include "fpga_dynamic_bit_selection.h"
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#include "fpga_switch.h"
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#include "gnss_block_interface.h"
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#include "signal_source_base.h"
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#include <pmt/pmt.h>
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#include <cstdint>
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#include <memory>
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#include <mutex>
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#include <string>
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#include <thread>
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/** \addtogroup Signal_Source
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* \{ */
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/** \addtogroup Signal_Source_adapters
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* \{ */
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class ConfigurationInterface;
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class Ad9361FpgaSignalSource : public SignalSourceBase
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{
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public:
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Ad9361FpgaSignalSource(const ConfigurationInterface *configuration,
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const std::string &role, unsigned int in_stream,
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unsigned int out_stream, Concurrent_Queue<pmt::pmt_t> *queue);
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~Ad9361FpgaSignalSource();
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void start() override;
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inline size_t item_size() override
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{
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return item_size_;
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}
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void connect(gr::top_block_sptr top_block) override;
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void disconnect(gr::top_block_sptr top_block) override;
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gr::basic_block_sptr get_left_block() override;
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gr::basic_block_sptr get_right_block() override;
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private:
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const std::string switch_device_name = "AXIS_Switch_v1_0_0"; // Switch UIO device name
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const std::string dyn_bit_sel_device_name = "dynamic_bits_selector"; // Switch dhnamic bit selector device name
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const std::string buffer_monitor_device_name = "buffer_monitor"; // buffer monitor device name
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const std::string default_dump_filename = std::string("FPGA_buffer_monitor_dump.dat");
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// perform dynamic bit selection every 500 ms by default
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static const uint32_t Gain_control_period_ms = 500;
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// check buffer overflow and perform buffer monitoring every 1s by default
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static const uint32_t buffer_monitor_period_ms = 1000;
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// buffer overflow and buffer monitoring initial delay
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static const uint32_t buffer_monitoring_initial_delay_ms = 2000;
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void run_DMA_process(const std::string &FreqBand,
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const std::string &Filename1,
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const std::string &Filename2);
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void run_dynamic_bit_selection_process();
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void run_buffer_monitor_process();
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std::thread thread_file_to_dma;
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std::thread thread_dynamic_bit_selection;
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std::thread thread_buffer_monitor;
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std::shared_ptr<Fpga_Switch> switch_fpga;
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std::shared_ptr<Fpga_dynamic_bit_selection> dynamic_bit_selection_fpga;
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std::shared_ptr<Fpga_buffer_monitor> buffer_monitor_fpga;
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// Front-end settings
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std::string gain_mode_rx1_;
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std::string gain_mode_rx2_;
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std::string rf_port_select_;
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std::string filter_file_;
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std::string filter_source_;
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std::string filter_filename_;
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std::string filename_rx1;
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std::string filename_rx2;
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std::string freq_band;
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std::mutex dma_mutex;
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std::mutex dynamic_bit_selection_mutex;
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std::mutex buffer_monitor_mutex;
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double rf_gain_rx1_;
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double rf_gain_rx2_;
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uint64_t freq_; // frequency of local oscillator
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uint64_t sample_rate_;
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uint64_t bandwidth_;
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float Fpass_;
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float Fstop_;
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// DDS configuration for LO generation for external mixer
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double scale_dds_dbfs_;
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double phase_dds_deg_;
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double tx_attenuation_db_;
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uint64_t freq_rf_tx_hz_;
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uint64_t freq_dds_tx_hz_;
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uint64_t tx_bandwidth_;
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size_t item_size_;
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uint32_t in_stream_;
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uint32_t out_stream_;
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int32_t switch_position_;
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bool enable_dds_lo_;
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bool filter_auto_;
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bool quadrature_;
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bool rf_dc_;
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bool bb_dc_;
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bool rx1_enable_;
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bool rx2_enable_;
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bool enable_DMA_;
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bool enable_dynamic_bit_selection_;
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bool enable_ovf_check_buffer_monitor_active_;
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bool enable_ovf_check_buffer_monitor_;
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bool dump_;
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bool rf_shutdown_;
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};
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/** \} */
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/** \} */
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#endif // GNSS_SDR_AD9361_FPGA_SIGNAL_SOURCE_H
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