mirror of https://github.com/gnss-sdr/gnss-sdr
180 lines
6.8 KiB
C++
180 lines
6.8 KiB
C++
/*!
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* \file ad9361_fpga_signal_source.cc
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* \brief signal source for Analog Devices front-end AD9361 connected directly to FPGA accelerators.
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* This source implements only the AD9361 control. It is NOT compatible with conventional SDR acquisition and tracking blocks.
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* Please use the fmcomms2 source if conventional SDR acquisition and tracking is selected in the configuration file.
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* \author Javier Arribas, jarribas(at)cttc.es
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*
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* -------------------------------------------------------------------------
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*
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* Copyright (C) 2010-2018 (see AUTHORS file for a list of contributors)
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*
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* GNSS-SDR is a software defined Global Navigation
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* Satellite Systems receiver
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*
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* This file is part of GNSS-SDR.
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*
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* GNSS-SDR is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* GNSS-SDR is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with GNSS-SDR. If not, see <https://www.gnu.org/licenses/>.
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*
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* -------------------------------------------------------------------------
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*/
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#include "ad9361_fpga_signal_source.h"
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#include "GPS_L1_CA.h"
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#include "GPS_L2C.h"
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#include "ad9361_manager.h"
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#include "configuration_interface.h"
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#include <glog/logging.h>
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#include <exception>
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#include <iostream> // for cout, endl
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#include <utility>
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#ifdef __APPLE__
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#include <iio/iio.h>
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#else
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#include <iio.h>
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#endif
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Ad9361FpgaSignalSource::Ad9361FpgaSignalSource(ConfigurationInterface* configuration,
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const std::string& role, unsigned int in_stream, unsigned int out_stream,
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boost::shared_ptr<gr::msg_queue> queue) : role_(role), in_stream_(in_stream), out_stream_(out_stream), queue_(std::move(queue))
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{
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std::string default_item_type = "gr_complex";
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std::string default_dump_file = "./data/signal_source.dat";
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freq_ = configuration->property(role + ".freq", GPS_L1_FREQ_HZ);
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sample_rate_ = configuration->property(role + ".sampling_frequency", 2600000);
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bandwidth_ = configuration->property(role + ".bandwidth", 2000000);
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rx1_en_ = configuration->property(role + ".rx1_enable", true);
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rx2_en_ = configuration->property(role + ".rx2_enable", false);
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buffer_size_ = configuration->property(role + ".buffer_size", 0xA0000);
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quadrature_ = configuration->property(role + ".quadrature", true);
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rf_dc_ = configuration->property(role + ".rf_dc", true);
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bb_dc_ = configuration->property(role + ".bb_dc", true);
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gain_mode_rx1_ = configuration->property(role + ".gain_mode_rx1", std::string("manual"));
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gain_mode_rx2_ = configuration->property(role + ".gain_mode_rx2", std::string("manual"));
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rf_gain_rx1_ = configuration->property(role + ".gain_rx1", 64.0);
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rf_gain_rx2_ = configuration->property(role + ".gain_rx2", 64.0);
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rf_port_select_ = configuration->property(role + ".rf_port_select", std::string("A_BALANCED"));
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filter_file_ = configuration->property(role + ".filter_file", std::string(""));
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filter_auto_ = configuration->property(role + ".filter_auto", true);
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item_type_ = configuration->property(role + ".item_type", default_item_type);
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samples_ = configuration->property(role + ".samples", 0);
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dump_ = configuration->property(role + ".dump", false);
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dump_filename_ = configuration->property(role + ".dump_filename", default_dump_file);
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enable_dds_lo_ = configuration->property(role + ".enable_dds_lo", false);
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freq_rf_tx_hz_ = configuration->property(role + ".freq_rf_tx_hz", GPS_L1_FREQ_HZ - GPS_L2_FREQ_HZ - 1000);
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freq_dds_tx_hz_ = configuration->property(role + ".freq_dds_tx_hz", 1000);
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scale_dds_dbfs_ = configuration->property(role + ".scale_dds_dbfs", -3.0);
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phase_dds_deg_ = configuration->property(role + ".phase_dds_deg", 0.0);
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tx_attenuation_db_ = configuration->property(role + ".tx_attenuation_db", 0.0);
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item_size_ = sizeof(gr_complex);
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std::cout << "device address: " << uri_ << std::endl;
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std::cout << "LO frequency : " << freq_ << " Hz" << std::endl;
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std::cout << "sample rate: " << sample_rate_ << " Hz" << std::endl;
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config_ad9361_rx_local(bandwidth_,
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sample_rate_,
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freq_,
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rf_port_select_,
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gain_mode_rx1_,
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gain_mode_rx2_,
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rf_gain_rx1_,
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rf_gain_rx2_);
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//LOCAL OSCILLATOR DDS GENERATOR FOR DUAL FREQUENCY OPERATION
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if (enable_dds_lo_ == true)
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{
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config_ad9361_lo_local(bandwidth_,
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sample_rate_,
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freq_rf_tx_hz_,
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tx_attenuation_db_,
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freq_dds_tx_hz_,
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scale_dds_dbfs_);
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}
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// turn switch to A/D position
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std::string default_device_name = "/dev/uio13";
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std::string device_name = configuration->property(role + ".devicename", default_device_name);
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int switch_position = configuration->property(role + ".switch_position", 0);
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switch_fpga = std::make_shared<fpga_switch>(device_name);
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switch_fpga->set_switch_position(switch_position);
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if (in_stream_ > 0)
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{
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LOG(ERROR) << "A signal source does not have an input stream";
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}
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if (out_stream_ > 1)
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{
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LOG(ERROR) << "This implementation only supports one output stream";
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}
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}
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Ad9361FpgaSignalSource::~Ad9361FpgaSignalSource()
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{
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/* cleanup and exit */
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//std::cout<<"* AD9361 Disabling streaming channels\n";
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//if (rx0_i) { iio_channel_disable(rx0_i); }
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//if (rx0_q) { iio_channel_disable(rx0_q); }
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if (enable_dds_lo_)
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{
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try
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{
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ad9361_disable_lo_local();
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}
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catch (const std::exception& e)
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{
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LOG(WARNING) << "Problem closing the Ad9361FpgaSignalSource: " << e.what();
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}
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}
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// std::cout<<"* AD9361 Destroying context\n";
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//if (ctx) { iio_context_destroy(ctx); }
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}
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void Ad9361FpgaSignalSource::connect(gr::top_block_sptr top_block)
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{
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if (top_block)
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{ /* top_block is not null */
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};
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DLOG(INFO) << "AD9361 FPGA source nothing to connect";
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}
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void Ad9361FpgaSignalSource::disconnect(gr::top_block_sptr top_block)
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{
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if (top_block)
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{ /* top_block is not null */
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};
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DLOG(INFO) << "AD9361 FPGA source nothing to disconnect";
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}
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gr::basic_block_sptr Ad9361FpgaSignalSource::get_left_block()
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{
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LOG(WARNING) << "Trying to get signal source left block.";
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return gr::basic_block_sptr();
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}
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gr::basic_block_sptr Ad9361FpgaSignalSource::get_right_block()
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{
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LOG(WARNING) << "Trying to get AD9361 FPGA signal source right block.";
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return gr::basic_block_sptr();
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}
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