mirror of https://github.com/gnss-sdr/gnss-sdr
109 lines
4.0 KiB
C
109 lines
4.0 KiB
C
// SPDX-FileCopyrightText: 2022 Google LLC
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// SPDX-License-Identifier: Apache-2.0
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#include "cpu_features_macros.h"
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#ifdef CPU_FEATURES_ARCH_RISCV
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#if defined(CPU_FEATURES_OS_LINUX)
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#include "cpuinfo_riscv.h"
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// According to
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// https://elixir.bootlin.com/linux/latest/source/Documentation/devicetree/bindings/riscv/cpus.yaml
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// isa string should match the following regex
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// ^rv(?:64|32)imaf?d?q?c?b?v?k?h?(?:_[hsxz](?:[a-z])+)*$
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//
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// This means we can test for features in this exact order except for Z
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// extensions.
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////////////////////////////////////////////////////////////////////////////////
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// Definitions for introspection.
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////////////////////////////////////////////////////////////////////////////////
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#define INTROSPECTION_TABLE \
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LINE(RISCV_RV32I, RV32I, "rv32i", RISCV_HWCAP_32, 0) \
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LINE(RISCV_RV64I, RV64I, "rv64i", RISCV_HWCAP_64, 0) \
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LINE(RISCV_M, M, "m", RISCV_HWCAP_M, 0) \
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LINE(RISCV_A, A, "a", RISCV_HWCAP_A, 0) \
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LINE(RISCV_F, F, "f", RISCV_HWCAP_F, 0) \
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LINE(RISCV_D, D, "d", RISCV_HWCAP_D, 0) \
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LINE(RISCV_Q, Q, "q", RISCV_HWCAP_Q, 0) \
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LINE(RISCV_C, C, "c", RISCV_HWCAP_C, 0) \
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LINE(RISCV_Zicsr, Zicsr, "_zicsr", 0, 0) \
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LINE(RISCV_Zifencei, Zifencei, "_zifencei", 0, 0)
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#define INTROSPECTION_PREFIX Riscv
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#define INTROSPECTION_ENUM_PREFIX RISCV
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#include "define_introspection_and_hwcaps.inl"
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////////////////////////////////////////////////////////////////////////////////
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// Implementation.
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////////////////////////////////////////////////////////////////////////////////
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#include "internal/filesystem.h"
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#include "internal/stack_line_reader.h"
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#include <stdbool.h>
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#include <stdio.h>
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static const RiscvInfo kEmptyRiscvInfo;
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static void HandleRiscVIsaLine(StringView line, RiscvFeatures* const features)
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{
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for (size_t i = 0; i < RISCV_LAST_; ++i)
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{
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StringView flag = str(kCpuInfoFlags[i]);
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int index_of_flag = CpuFeatures_StringView_IndexOf(line, flag);
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bool is_set = index_of_flag != -1;
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kSetters[i](features, is_set);
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if (is_set)
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line = CpuFeatures_StringView_PopFront(line, index_of_flag + flag.size);
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}
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}
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static bool HandleRiscVLine(const LineResult result, RiscvInfo* const info)
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{
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StringView line = result.line;
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StringView key, value;
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if (CpuFeatures_StringView_GetAttributeKeyValue(line, &key, &value))
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{
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if (CpuFeatures_StringView_IsEquals(key, str("isa")))
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{
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HandleRiscVIsaLine(value, &info->features);
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}
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else if (CpuFeatures_StringView_IsEquals(key, str("uarch")))
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{
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int index = CpuFeatures_StringView_IndexOfChar(value, ',');
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if (index == -1) return true;
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StringView vendor = CpuFeatures_StringView_KeepFront(value, index);
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StringView uarch = CpuFeatures_StringView_PopFront(value, index + 1);
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CpuFeatures_StringView_CopyString(vendor, info->vendor,
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sizeof(info->vendor));
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CpuFeatures_StringView_CopyString(uarch, info->uarch,
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sizeof(info->uarch));
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}
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}
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return !result.eof;
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}
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static void FillProcCpuInfoData(RiscvInfo* const info)
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{
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const int fd = CpuFeatures_OpenFile("/proc/cpuinfo");
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if (fd >= 0)
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{
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StackLineReader reader;
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StackLineReader_Initialize(&reader, fd);
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for (;;)
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{
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if (!HandleRiscVLine(StackLineReader_NextLine(&reader), info)) break;
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}
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CpuFeatures_CloseFile(fd);
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}
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}
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RiscvInfo GetRiscvInfo(void)
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{
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RiscvInfo info = kEmptyRiscvInfo;
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FillProcCpuInfoData(&info);
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return info;
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}
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#endif // defined(CPU_FEATURES_OS_LINUX) || defined(CPU_FEATURES_OS_ANDROID)
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#endif // CPU_FEATURES_ARCH_RISCV
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