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https://github.com/gnss-sdr/gnss-sdr
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3b965654d6
Avoid code duplication Based on @odrisci suggestion at #336
248 lines
11 KiB
C++
248 lines
11 KiB
C++
/*!
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* \file galileo_e5a_dll_pll_tracking_fpga.cc
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* \brief Adapts a code DLL + carrier PLL
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* tracking block to a TrackingInterface for Galileo E5a signals for the FPGA
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* \author Marc Majoral, 2019. mmajoral(at)cttc.cat
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*
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* -------------------------------------------------------------------------
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*
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* Copyright (C) 2010-2019 (see AUTHORS file for a list of contributors)
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*
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* GNSS-SDR is a software defined Global Navigation
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* Satellite Systems receiver
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*
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* This file is part of GNSS-SDR.
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*
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* SPDX-License-Identifier: GPL-3.0-or-later
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*
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* -------------------------------------------------------------------------
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*/
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#include "galileo_e5a_dll_pll_tracking_fpga.h"
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#include "Galileo_E5a.h"
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#include "configuration_interface.h"
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#include "display.h"
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#include "dll_pll_conf_fpga.h"
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#include "galileo_e5_signal_processing.h"
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#include "gnss_sdr_flags.h"
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#include <glog/logging.h>
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#include <volk_gnsssdr/volk_gnsssdr_alloc.h>
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#include <array>
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GalileoE5aDllPllTrackingFpga::GalileoE5aDllPllTrackingFpga(
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ConfigurationInterface *configuration, const std::string &role,
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unsigned int in_streams, unsigned int out_streams) : role_(role), in_streams_(in_streams), out_streams_(out_streams)
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{
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Dll_Pll_Conf_Fpga trk_params_fpga = Dll_Pll_Conf_Fpga();
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DLOG(INFO) << "role " << role;
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trk_params_fpga.SetFromConfiguration(configuration, role);
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int32_t vector_length = std::round(trk_params_fpga.fs_in / (GALILEO_E5A_CODE_CHIP_RATE_CPS / GALILEO_E5A_CODE_LENGTH_CHIPS));
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trk_params_fpga.vector_length = vector_length;
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d_track_pilot = trk_params_fpga.track_pilot;
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if (trk_params_fpga.extend_correlation_symbols < 1)
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{
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trk_params_fpga.extend_correlation_symbols = 1;
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std::cout << TEXT_RED << "WARNING: Galileo E5a. extend_correlation_symbols must be bigger than 0. Coherent integration has been set to 1 symbol (1 ms)" << TEXT_RESET << std::endl;
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}
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else if (!trk_params_fpga.track_pilot and trk_params_fpga.extend_correlation_symbols > GALILEO_E5A_I_SECONDARY_CODE_LENGTH)
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{
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trk_params_fpga.extend_correlation_symbols = GALILEO_E5A_I_SECONDARY_CODE_LENGTH;
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std::cout << TEXT_RED << "WARNING: Galileo E5a. extend_correlation_symbols must be lower than 21 when tracking the data component. Coherent integration has been set to 20 symbols (20 ms)" << TEXT_RESET << std::endl;
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}
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if ((trk_params_fpga.extend_correlation_symbols > 1) and (trk_params_fpga.pll_bw_narrow_hz > trk_params_fpga.pll_bw_hz or trk_params_fpga.dll_bw_narrow_hz > trk_params_fpga.dll_bw_hz))
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{
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std::cout << TEXT_RED << "WARNING: Galileo E5a. PLL or DLL narrow tracking bandwidth is higher than wide tracking one" << TEXT_RESET << std::endl;
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}
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trk_params_fpga.system = 'E';
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std::array<char, 3> sig_{'5', 'X', '\0'};
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std::memcpy(trk_params_fpga.signal, sig_.data(), 3);
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d_data_codes = nullptr;
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// FPGA configuration parameters
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// obtain the number of the first uio device corresponding to a HW accelerator in the FPGA
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// that can be assigned to the tracking of the E5a signal
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trk_params_fpga.dev_file_num = configuration->property(role + ".dev_file_num", 27);
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// compute the number of tracking channels that have already been instantiated. The order in which
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// GNSS-SDR instantiates the tracking channels i L1, L2, L5, E1, E5a
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// However E5a can use the same tracking HW accelerators as L5 (but not simultaneously).
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// Therefore for the proper assignment of the FPGA tracking device file numbers to the E5a tracking channels,
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// the number of channels that have already been assigned to L5 must not be substracted to this channel number,
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// so they are not counted here.
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trk_params_fpga.num_prev_assigned_ch = configuration->property("Channels_1C.count", 0) +
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configuration->property("Channels_2S.count", 0) +
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configuration->property("Channels_1B.count", 0);
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// ################# PRE-COMPUTE ALL THE CODES #################
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uint32_t code_samples_per_chip = 1;
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auto code_length_chips = static_cast<uint32_t>(GALILEO_E5A_CODE_LENGTH_CHIPS);
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volk_gnsssdr::vector<gr_complex> aux_code(code_length_chips * code_samples_per_chip, gr_complex(0.0, 0.0));
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d_ca_codes = static_cast<int32_t *>(volk_gnsssdr_malloc(static_cast<int32_t>(code_length_chips) * code_samples_per_chip * GALILEO_E5A_NUMBER_OF_CODES * sizeof(int32_t), volk_gnsssdr_get_alignment()));
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if (trk_params_fpga.track_pilot)
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{
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d_data_codes = static_cast<int32_t *>(volk_gnsssdr_malloc((static_cast<uint32_t>(code_length_chips)) * code_samples_per_chip * GALILEO_E5A_NUMBER_OF_CODES * sizeof(int32_t), volk_gnsssdr_get_alignment()));
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}
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for (uint32_t PRN = 1; PRN <= GALILEO_E5A_NUMBER_OF_CODES; PRN++)
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{
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std::array<char, 3> sig_a = {'5', 'X', '\0'};
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galileo_e5_a_code_gen_complex_primary(aux_code, PRN, sig_a);
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if (trk_params_fpga.track_pilot)
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{
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// The code is generated as a series of 1s and -1s. In order to store the values using only one bit, a -1 is stored as a 0 in the FPGA
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for (uint32_t s = 0; s < code_length_chips; s++)
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{
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auto tmp_value = static_cast<int32_t>(aux_code[s].imag());
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if (tmp_value < 0)
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{
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tmp_value = 0;
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}
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tmp_value = tmp_value | LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY;
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d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = tmp_value;
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tmp_value = static_cast<int32_t>(aux_code[s].real());
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if (tmp_value < 0)
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{
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tmp_value = 0;
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}
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tmp_value = tmp_value | LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY | LOCAL_CODE_FPGA_CORRELATOR_SELECT_COUNT;
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d_data_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = tmp_value;
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}
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}
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else
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{
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// The code is generated as a series of 1s and -1s. In order to store the values using only one bit, a -1 is stored as a 0 in the FPGA
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for (uint32_t s = 0; s < code_length_chips; s++)
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{
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auto tmp_value = static_cast<int32_t>(aux_code[s].real());
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if (tmp_value < 0)
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{
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tmp_value = 0;
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}
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tmp_value = tmp_value | LOCAL_CODE_FPGA_ENABLE_WRITE_MEMORY;
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d_ca_codes[static_cast<int32_t>(code_length_chips) * (PRN - 1) + s] = tmp_value;
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}
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}
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}
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trk_params_fpga.ca_codes = d_ca_codes;
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trk_params_fpga.data_codes = d_data_codes;
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trk_params_fpga.code_length_chips = code_length_chips;
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trk_params_fpga.code_samples_per_chip = code_samples_per_chip; // 2 sample per chip
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trk_params_fpga.extended_correlation_in_fpga = false; // by default
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trk_params_fpga.extend_fpga_integration_periods = 1; // (number of FPGA integrations that are combined in the SW)
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trk_params_fpga.fpga_integration_period = 1; // (number of symbols that are effectively integrated in the FPGA)
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if (d_track_pilot)
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{
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if (trk_params_fpga.extend_correlation_symbols > 1)
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{
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if (trk_params_fpga.extend_correlation_symbols <= GALILEO_E5A_I_SECONDARY_CODE_LENGTH)
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{
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if ((GALILEO_E5A_I_SECONDARY_CODE_LENGTH % trk_params_fpga.extend_correlation_symbols) == 0)
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{
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trk_params_fpga.extended_correlation_in_fpga = true;
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trk_params_fpga.fpga_integration_period = trk_params_fpga.extend_correlation_symbols;
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}
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}
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else
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{
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if (trk_params_fpga.extend_correlation_symbols % GALILEO_E5A_I_SECONDARY_CODE_LENGTH == 0)
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{
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trk_params_fpga.extended_correlation_in_fpga = true;
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trk_params_fpga.extend_fpga_integration_periods = trk_params_fpga.extend_correlation_symbols / GALILEO_E5A_I_SECONDARY_CODE_LENGTH;
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trk_params_fpga.fpga_integration_period = GALILEO_E5A_I_SECONDARY_CODE_LENGTH;
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}
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}
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}
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}
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// ################# MAKE TRACKING GNURadio object ###################
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tracking_fpga_sc = dll_pll_veml_make_tracking_fpga(trk_params_fpga);
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channel_ = 0;
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DLOG(INFO) << "tracking(" << tracking_fpga_sc->unique_id() << ")";
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if (in_streams_ > 1)
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{
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LOG(ERROR) << "This implementation only supports one input stream";
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}
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if (out_streams_ > 1)
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{
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LOG(ERROR) << "This implementation only supports one output stream";
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}
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}
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GalileoE5aDllPllTrackingFpga::~GalileoE5aDllPllTrackingFpga()
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{
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volk_gnsssdr_free(d_ca_codes);
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if (d_track_pilot)
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{
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volk_gnsssdr_free(d_data_codes);
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}
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}
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void GalileoE5aDllPllTrackingFpga::start_tracking()
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{
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tracking_fpga_sc->start_tracking();
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}
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void GalileoE5aDllPllTrackingFpga::stop_tracking()
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{
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tracking_fpga_sc->stop_tracking();
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}
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/*
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* Set tracking channel unique ID
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*/
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void GalileoE5aDllPllTrackingFpga::set_channel(unsigned int channel)
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{
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channel_ = channel;
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tracking_fpga_sc->set_channel(channel);
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}
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void GalileoE5aDllPllTrackingFpga::set_gnss_synchro(Gnss_Synchro *p_gnss_synchro)
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{
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tracking_fpga_sc->set_gnss_synchro(p_gnss_synchro);
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}
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void GalileoE5aDllPllTrackingFpga::connect(gr::top_block_sptr top_block)
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{
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if (top_block)
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{ /* top_block is not null */
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};
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// nothing to connect, now the tracking uses gr_sync_decimator
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}
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void GalileoE5aDllPllTrackingFpga::disconnect(gr::top_block_sptr top_block)
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{
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if (top_block)
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{ /* top_block is not null */
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};
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// nothing to disconnect, now the tracking uses gr_sync_decimator
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}
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gr::basic_block_sptr GalileoE5aDllPllTrackingFpga::get_left_block()
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{
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return tracking_fpga_sc;
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}
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gr::basic_block_sptr GalileoE5aDllPllTrackingFpga::get_right_block()
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{
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return tracking_fpga_sc;
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}
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