Marc Majoral 337c9c7d1f set the FPGA page size to 0x1000 for compatibility with the FPGA IP cores compiled for the ZynqMP

2022-04-19 15:53:00 +02:00

..

ad9361_manager.cc

do not write the signal source gain if the AGC is enabled when using the AD9361.

2021-09-14 17:46:52 +02:00

ad9361_manager.h

Apply more concise file header format

2020-12-30 13:35:06 +01:00

CMakeLists.txt

Merge branch 'next' of github.com:gnss-sdr/gnss-sdr into pps_lime

2021-11-29 20:54:56 +01:00

fpga_buffer_monitor.cc

Prefer initialization to assignment in constructors

2021-12-14 17:34:35 +01:00

fpga_buffer_monitor.h

set the FPGA page size to 0x1000 for compatibility with the FPGA IP cores compiled for the ZynqMP

2022-04-19 15:53:00 +02:00

fpga_dynamic_bit_selection.cc

Initialize the dynamic bit selection shift register

2021-11-15 12:47:33 +01:00

fpga_dynamic_bit_selection.h

set the FPGA page size to 0x1000 for compatibility with the FPGA IP cores compiled for the ZynqMP

2022-04-19 15:53:00 +02:00

fpga_switch.cc

Apply more concise file header format

2020-12-30 13:35:06 +01:00

fpga_switch.h

set the FPGA page size to 0x1000 for compatibility with the FPGA IP cores compiled for the ZynqMP

2022-04-19 15:53:00 +02:00

gnss_sdr_timestamp.cc

Prefer initialization to assignment in constructors

2021-12-14 12:59:35 +01:00

gnss_sdr_timestamp.h

Prefer initialization to assignment in constructors

2021-12-14 12:59:35 +01:00

gnss_sdr_valve.cc

Prefer initialization to assignment in constructors

2021-12-14 12:59:35 +01:00

gnss_sdr_valve.h

Apply more concise file header format

2020-12-30 13:35:06 +01:00

rtl_tcp_commands.cc

Fix error handling issues detected by Coverity Scan 2020.09

2021-01-25 13:35:47 +01:00

rtl_tcp_commands.h

Apply more concise file header format

2020-12-30 13:35:06 +01:00

rtl_tcp_dongle_info.cc

Replace usage of BOOST_FOREACH macro by a C++ range for

2021-02-24 11:54:57 +01:00

rtl_tcp_dongle_info.h

Apply more concise file header format

2020-12-30 13:35:06 +01:00