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https://github.com/gnss-sdr/gnss-sdr
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2b46c79ba7
The writing of the local code is still performed by processor instructions in a loop. THe FPGA L2 classes were updated accordingly.
301 lines
11 KiB
C++
301 lines
11 KiB
C++
/*!
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* \file galileo_e5a_pcps_acquisition_fpga.cc
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* \brief Adapts a PCPS acquisition block to an AcquisitionInterface for
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* Galileo E5a data and pilot Signals for the FPGA
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* \author Marc Majoral, 2019. mmajoral(at)cttc.es
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*
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* -------------------------------------------------------------------------
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*
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* Copyright (C) 2010-2019 (see AUTHORS file for a list of contributors)
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*
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* GNSS-SDR is a software defined Global Navigation
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* Satellite Systems receiver
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*
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* This file is part of GNSS-SDR.
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*
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* GNSS-SDR is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* GNSS-SDR is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with GNSS-SDR. If not, see <http://www.gnu.org/licenses/>.
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*
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* -------------------------------------------------------------------------
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*/
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#include "galileo_e5a_pcps_acquisition_fpga.h"
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#include "Galileo_E5a.h"
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#include "configuration_interface.h"
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#include "galileo_e5_signal_processing.h"
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#include "gnss_sdr_flags.h"
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#include "gnss_synchro.h"
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#include <glog/logging.h>
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#include <gnuradio/fft/fft.h> // for fft_complex
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#include <gnuradio/gr_complex.h> // for gr_complex
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#include <volk/volk.h> // for volk_32fc_conjugate_32fc
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#include <volk_gnsssdr/volk_gnsssdr.h>
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#include <cmath> // for abs, pow, floor
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#include <complex> // for complex
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#include <cstring> // for strcpy, memcpy
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#define QUANT_BITS_LOCAL_CODE 16
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#define SELECT_LSBits 0x0000FFFF // Select the 10 LSbits out of a 20-bit word
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#define SELECT_MSBbits 0xFFFF0000 // Select the 10 MSbits out of a 20-bit word
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#define SELECT_ALL_CODE_BITS 0xFFFFFFFF // Select a 20 bit word
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#define SHL_CODE_BITS 65536 // shift left by 10 bits
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GalileoE5aPcpsAcquisitionFpga::GalileoE5aPcpsAcquisitionFpga(ConfigurationInterface* configuration,
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const std::string& role,
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unsigned int in_streams,
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unsigned int out_streams) : role_(role),
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in_streams_(in_streams),
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out_streams_(out_streams)
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{
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pcpsconf_fpga_t acq_parameters;
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configuration_ = configuration;
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std::string default_dump_filename = "../data/acquisition.dat";
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DLOG(INFO) << "Role " << role;
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int64_t fs_in_deprecated = configuration_->property("GNSS-SDR.internal_fs_hz", 32000000);
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int64_t fs_in = configuration_->property("GNSS-SDR.internal_fs_sps", fs_in_deprecated);
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acq_parameters.repeat_satellite = configuration_->property(role + ".repeat_satellite", false);
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DLOG(INFO) << role << " satellite repeat = " << acq_parameters.repeat_satellite;
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uint32_t downsampling_factor = configuration_->property(role + ".downsampling_factor", 1);
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acq_parameters.downsampling_factor = downsampling_factor;
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fs_in = fs_in / downsampling_factor;
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acq_parameters.fs_in = fs_in;
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doppler_max_ = configuration_->property(role + ".doppler_max", 5000);
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if (FLAGS_doppler_max != 0) doppler_max_ = FLAGS_doppler_max;
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acq_parameters.doppler_max = doppler_max_;
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uint32_t sampled_ms = configuration_->property(role + ".coherent_integration_time_ms", 1);
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acq_parameters.sampled_ms = sampled_ms;
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acq_pilot_ = configuration_->property(role + ".acquire_pilot", false);
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acq_iq_ = configuration_->property(role + ".acquire_iq", false);
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if (acq_iq_)
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{
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acq_pilot_ = false;
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}
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auto code_length = static_cast<uint32_t>(std::round(static_cast<double>(fs_in) / GALILEO_E5A_CODE_CHIP_RATE_HZ * static_cast<double>(GALILEO_E5A_CODE_LENGTH_CHIPS)));
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acq_parameters.code_length = code_length;
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// The FPGA can only use FFT lengths that are a power of two.
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float nbits = ceilf(log2f((float)code_length * 2));
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uint32_t nsamples_total = pow(2, nbits);
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uint32_t select_queue_Fpga = configuration_->property(role + ".select_queue_Fpga", 1);
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acq_parameters.select_queue_Fpga = select_queue_Fpga;
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std::string default_device_name = "/dev/uio0";
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std::string device_name = configuration_->property(role + ".devicename", default_device_name);
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acq_parameters.device_name = device_name;
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acq_parameters.samples_per_ms = nsamples_total / sampled_ms;
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acq_parameters.samples_per_code = nsamples_total;
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acq_parameters.excludelimit = static_cast<unsigned int>(1 + ceil((1.0 / GALILEO_E5A_CODE_CHIP_RATE_HZ) * static_cast<float>(fs_in)));
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// compute all the GALILEO E5 PRN Codes (this is done only once in the class constructor in order to avoid re-computing the PRN codes every time
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// a channel is assigned)
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auto* fft_if = new gr::fft::fft_complex(nsamples_total, true); // Direct FFT
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auto* code = new std::complex<float>[nsamples_total]; // buffer for the local code
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auto* fft_codes_padded = static_cast<gr_complex*>(volk_gnsssdr_malloc(nsamples_total * sizeof(gr_complex), volk_gnsssdr_get_alignment()));
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//d_all_fft_codes_ = new lv_16sc_t[nsamples_total * GALILEO_E5A_NUMBER_OF_CODES]; // memory containing all the possible fft codes for PRN 0 to 32
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d_all_fft_codes_ = new uint32_t[(nsamples_total * GALILEO_E5A_NUMBER_OF_CODES)]; // memory containing all the possible fft codes for PRN 0 to 32
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float max; // temporary maxima search
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int32_t tmp, tmp2, local_code, fft_data;
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for (uint32_t PRN = 1; PRN <= GALILEO_E5A_NUMBER_OF_CODES; PRN++)
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{
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char signal_[3];
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if (acq_iq_)
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{
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strcpy(signal_, "5X");
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}
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else if (acq_pilot_)
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{
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strcpy(signal_, "5Q");
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}
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else
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{
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strcpy(signal_, "5I");
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}
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galileo_e5_a_code_gen_complex_sampled(code, signal_, PRN, fs_in, 0);
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for (uint32_t s = code_length; s < 2 * code_length; s++)
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{
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code[s] = code[s - code_length];
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}
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// fill in zero padding
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for (uint32_t s = 2 * code_length; s < nsamples_total; s++)
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{
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code[s] = std::complex<float>(0.0, 0.0);
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}
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memcpy(fft_if->get_inbuf(), code, sizeof(gr_complex) * nsamples_total); // copy to FFT buffer
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fft_if->execute(); // Run the FFT of local code
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volk_32fc_conjugate_32fc(fft_codes_padded, fft_if->get_outbuf(), nsamples_total); // conjugate values
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max = 0; // initialize maximum value
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for (uint32_t i = 0; i < nsamples_total; i++) // search for maxima
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{
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if (std::abs(fft_codes_padded[i].real()) > max)
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{
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max = std::abs(fft_codes_padded[i].real());
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}
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if (std::abs(fft_codes_padded[i].imag()) > max)
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{
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max = std::abs(fft_codes_padded[i].imag());
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}
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}
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// map the FFT to the dynamic range of the fixed point values an copy to buffer containing all FFTs
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// and package codes in a format that is ready to be written to the FPGA
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for (uint32_t i = 0; i < nsamples_total; i++)
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{
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tmp = static_cast<int32_t>(floor(fft_codes_padded[i].real() * (pow(2, QUANT_BITS_LOCAL_CODE - 1) - 1) / max));
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tmp2 = static_cast<int32_t>(floor(fft_codes_padded[i].imag() * (pow(2, QUANT_BITS_LOCAL_CODE - 1) - 1) / max));
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local_code = (tmp & SELECT_LSBits) | ((tmp2 * SHL_CODE_BITS) & SELECT_MSBbits); // put together the real part and the imaginary part
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fft_data = local_code & SELECT_ALL_CODE_BITS;
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d_all_fft_codes_[i + (nsamples_total * (PRN - 1))] = fft_data;
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// d_all_fft_codes_[i + nsamples_total * (PRN - 1)] = lv_16sc_t(static_cast<int32_t>(floor(fft_codes_padded[i].real() * (pow(2, QUANT_BITS_LOCAL_CODE - 1) - 1) / max)),
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// static_cast<int32_t>(floor(fft_codes_padded[i].imag() * (pow(2, QUANT_BITS_LOCAL_CODE - 1) - 1) / max)));
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}
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}
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acq_parameters.all_fft_codes = d_all_fft_codes_;
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// reference for the FPGA FFT-IFFT attenuation factor
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acq_parameters.total_block_exp = configuration_->property(role + ".total_block_exp", 13);
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acq_parameters.num_doppler_bins_step2 = configuration_->property(role + ".second_nbins", 4);
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acq_parameters.doppler_step2 = configuration_->property(role + ".second_doppler_step", 125.0);
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acq_parameters.make_2_steps = configuration_->property(role + ".make_two_steps", false);
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acquisition_fpga_ = pcps_make_acquisition_fpga(acq_parameters);
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channel_ = 0;
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doppler_step_ = 0;
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gnss_synchro_ = nullptr;
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channel_fsm_ = nullptr;
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// temporary buffers that we can delete
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delete[] code;
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delete fft_if;
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delete[] fft_codes_padded;
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}
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GalileoE5aPcpsAcquisitionFpga::~GalileoE5aPcpsAcquisitionFpga()
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{
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delete[] d_all_fft_codes_;
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}
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void GalileoE5aPcpsAcquisitionFpga::stop_acquisition()
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{
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// this command causes the SW to reset the HW.
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acquisition_fpga_->reset_acquisition();
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}
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void GalileoE5aPcpsAcquisitionFpga::set_threshold(float threshold)
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{
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DLOG(INFO) << "Channel " << channel_ << " Threshold = " << threshold;
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acquisition_fpga_->set_threshold(threshold);
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}
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void GalileoE5aPcpsAcquisitionFpga::set_doppler_max(unsigned int doppler_max)
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{
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doppler_max_ = doppler_max;
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acquisition_fpga_->set_doppler_max(doppler_max_);
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}
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void GalileoE5aPcpsAcquisitionFpga::set_doppler_step(unsigned int doppler_step)
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{
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doppler_step_ = doppler_step;
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acquisition_fpga_->set_doppler_step(doppler_step_);
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}
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void GalileoE5aPcpsAcquisitionFpga::set_gnss_synchro(Gnss_Synchro* gnss_synchro)
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{
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gnss_synchro_ = gnss_synchro;
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acquisition_fpga_->set_gnss_synchro(gnss_synchro_);
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}
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signed int GalileoE5aPcpsAcquisitionFpga::mag()
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{
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return acquisition_fpga_->mag();
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}
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void GalileoE5aPcpsAcquisitionFpga::init()
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{
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acquisition_fpga_->init();
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}
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void GalileoE5aPcpsAcquisitionFpga::set_local_code()
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{
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acquisition_fpga_->set_local_code();
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}
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void GalileoE5aPcpsAcquisitionFpga::reset()
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{
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acquisition_fpga_->set_active(true);
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}
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void GalileoE5aPcpsAcquisitionFpga::set_state(int state)
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{
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acquisition_fpga_->set_state(state);
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}
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void GalileoE5aPcpsAcquisitionFpga::connect(gr::top_block_sptr top_block)
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{
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if (top_block)
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{ /* top_block is not null */
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};
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// Nothing to connect
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}
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void GalileoE5aPcpsAcquisitionFpga::disconnect(gr::top_block_sptr top_block)
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{
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if (top_block)
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{ /* top_block is not null */
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};
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// Nothing to disconnect
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}
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gr::basic_block_sptr GalileoE5aPcpsAcquisitionFpga::get_left_block()
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{
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return nullptr;
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}
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gr::basic_block_sptr GalileoE5aPcpsAcquisitionFpga::get_right_block()
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{
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return nullptr;
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}
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