mirror of https://github.com/gnss-sdr/gnss-sdr
109 lines
7.7 KiB
C++
109 lines
7.7 KiB
C++
// SPDX-FileCopyrightText: 2021 Google LLC
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// SPDX-License-Identifier: Apache-2.0
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#include "cpu_features_macros.h"
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#include "cpuinfo_aarch64.h"
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#include "internal/bit_utils.h"
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#include "internal/filesystem.h"
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#include "internal/stack_line_reader.h"
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#include "internal/string_view.h"
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#include <stdbool.h>
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#if !defined(CPU_FEATURES_ARCH_AARCH64)
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#error "Cannot compile aarch64_base on a non aarch64 platform."
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#endif
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////////////////////////////////////////////////////////////////////////////////
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// Definitions for introspection.
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////////////////////////////////////////////////////////////////////////////////
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#define INTROSPECTION_TABLE \
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LINE(AARCH64_FP, fp, "fp", AARCH64_HWCAP_FP, 0) \
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LINE(AARCH64_ASIMD, asimd, "asimd", AARCH64_HWCAP_ASIMD, 0) \
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LINE(AARCH64_EVTSTRM, evtstrm, "evtstrm", AARCH64_HWCAP_EVTSTRM, 0) \
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LINE(AARCH64_AES, aes, "aes", AARCH64_HWCAP_AES, 0) \
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LINE(AARCH64_PMULL, pmull, "pmull", AARCH64_HWCAP_PMULL, 0) \
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LINE(AARCH64_SHA1, sha1, "sha1", AARCH64_HWCAP_SHA1, 0) \
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LINE(AARCH64_SHA2, sha2, "sha2", AARCH64_HWCAP_SHA2, 0) \
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LINE(AARCH64_CRC32, crc32, "crc32", AARCH64_HWCAP_CRC32, 0) \
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LINE(AARCH64_ATOMICS, atomics, "atomics", AARCH64_HWCAP_ATOMICS, 0) \
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LINE(AARCH64_FPHP, fphp, "fphp", AARCH64_HWCAP_FPHP, 0) \
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LINE(AARCH64_ASIMDHP, asimdhp, "asimdhp", AARCH64_HWCAP_ASIMDHP, 0) \
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LINE(AARCH64_CPUID, cpuid, "cpuid", AARCH64_HWCAP_CPUID, 0) \
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LINE(AARCH64_ASIMDRDM, asimdrdm, "asimdrdm", AARCH64_HWCAP_ASIMDRDM, 0) \
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LINE(AARCH64_JSCVT, jscvt, "jscvt", AARCH64_HWCAP_JSCVT, 0) \
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LINE(AARCH64_FCMA, fcma, "fcma", AARCH64_HWCAP_FCMA, 0) \
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LINE(AARCH64_LRCPC, lrcpc, "lrcpc", AARCH64_HWCAP_LRCPC, 0) \
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LINE(AARCH64_DCPOP, dcpop, "dcpop", AARCH64_HWCAP_DCPOP, 0) \
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LINE(AARCH64_SHA3, sha3, "sha3", AARCH64_HWCAP_SHA3, 0) \
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LINE(AARCH64_SM3, sm3, "sm3", AARCH64_HWCAP_SM3, 0) \
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LINE(AARCH64_SM4, sm4, "sm4", AARCH64_HWCAP_SM4, 0) \
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LINE(AARCH64_ASIMDDP, asimddp, "asimddp", AARCH64_HWCAP_ASIMDDP, 0) \
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LINE(AARCH64_SHA512, sha512, "sha512", AARCH64_HWCAP_SHA512, 0) \
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LINE(AARCH64_SVE, sve, "sve", AARCH64_HWCAP_SVE, 0) \
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LINE(AARCH64_ASIMDFHM, asimdfhm, "asimdfhm", AARCH64_HWCAP_ASIMDFHM, 0) \
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LINE(AARCH64_DIT, dit, "dit", AARCH64_HWCAP_DIT, 0) \
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LINE(AARCH64_USCAT, uscat, "uscat", AARCH64_HWCAP_USCAT, 0) \
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LINE(AARCH64_ILRCPC, ilrcpc, "ilrcpc", AARCH64_HWCAP_ILRCPC, 0) \
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LINE(AARCH64_FLAGM, flagm, "flagm", AARCH64_HWCAP_FLAGM, 0) \
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LINE(AARCH64_SSBS, ssbs, "ssbs", AARCH64_HWCAP_SSBS, 0) \
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LINE(AARCH64_SB, sb, "sb", AARCH64_HWCAP_SB, 0) \
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LINE(AARCH64_PACA, paca, "paca", AARCH64_HWCAP_PACA, 0) \
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LINE(AARCH64_PACG, pacg, "pacg", AARCH64_HWCAP_PACG, 0) \
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LINE(AARCH64_DCPODP, dcpodp, "dcpodp", 0, AARCH64_HWCAP2_DCPODP) \
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LINE(AARCH64_SVE2, sve2, "sve2", 0, AARCH64_HWCAP2_SVE2) \
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LINE(AARCH64_SVEAES, sveaes, "sveaes", 0, AARCH64_HWCAP2_SVEAES) \
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LINE(AARCH64_SVEPMULL, svepmull, "svepmull", 0, AARCH64_HWCAP2_SVEPMULL) \
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LINE(AARCH64_SVEBITPERM, svebitperm, "svebitperm", 0, \
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AARCH64_HWCAP2_SVEBITPERM) \
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LINE(AARCH64_SVESHA3, svesha3, "svesha3", 0, AARCH64_HWCAP2_SVESHA3) \
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LINE(AARCH64_SVESM4, svesm4, "svesm4", 0, AARCH64_HWCAP2_SVESM4) \
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LINE(AARCH64_FLAGM2, flagm2, "flagm2", 0, AARCH64_HWCAP2_FLAGM2) \
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LINE(AARCH64_FRINT, frint, "frint", 0, AARCH64_HWCAP2_FRINT) \
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LINE(AARCH64_SVEI8MM, svei8mm, "svei8mm", 0, AARCH64_HWCAP2_SVEI8MM) \
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LINE(AARCH64_SVEF32MM, svef32mm, "svef32mm", 0, AARCH64_HWCAP2_SVEF32MM) \
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LINE(AARCH64_SVEF64MM, svef64mm, "svef64mm", 0, AARCH64_HWCAP2_SVEF64MM) \
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LINE(AARCH64_SVEBF16, svebf16, "svebf16", 0, AARCH64_HWCAP2_SVEBF16) \
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LINE(AARCH64_I8MM, i8mm, "i8mm", 0, AARCH64_HWCAP2_I8MM) \
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LINE(AARCH64_BF16, bf16, "bf16", 0, AARCH64_HWCAP2_BF16) \
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LINE(AARCH64_DGH, dgh, "dgh", 0, AARCH64_HWCAP2_DGH) \
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LINE(AARCH64_RNG, rng, "rng", 0, AARCH64_HWCAP2_RNG) \
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LINE(AARCH64_BTI, bti, "bti", 0, AARCH64_HWCAP2_BTI) \
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LINE(AARCH64_MTE, mte, "mte", 0, AARCH64_HWCAP2_MTE) \
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LINE(AARCH64_ECV, ecv, "ecv", 0, AARCH64_HWCAP2_ECV) \
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LINE(AARCH64_AFP, afp, "afp", 0, AARCH64_HWCAP2_AFP) \
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LINE(AARCH64_RPRES, rpres, "rpres", 0, AARCH64_HWCAP2_RPRES) \
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LINE(AARCH64_MTE3, mte3, "mte3", 0, AARCH64_HWCAP2_MTE3) \
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LINE(AARCH64_SME, sme, "sme", 0, AARCH64_HWCAP2_SME) \
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LINE(AARCH64_SME_I16I64, smei16i64, "smei16i64", 0, \
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AARCH64_HWCAP2_SME_I16I64) \
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LINE(AARCH64_SME_F64F64, smef64f64, "smef64f64", 0, \
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AARCH64_HWCAP2_SME_F64F64) \
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LINE(AARCH64_SME_I8I32, smei8i32, "smei8i32", 0, AARCH64_HWCAP2_SME_I8I32) \
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LINE(AARCH64_SME_F16F32, smef16f32, "smef16f32", 0, \
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AARCH64_HWCAP2_SME_F16F32) \
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LINE(AARCH64_SME_B16F32, smeb16f32, "smeb16f32", 0, \
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AARCH64_HWCAP2_SME_B16F32) \
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LINE(AARCH64_SME_F32F32, smef32f32, "smef32f32", 0, \
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AARCH64_HWCAP2_SME_F32F32) \
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LINE(AARCH64_SME_FA64, smefa64, "smefa64", 0, AARCH64_HWCAP2_SME_FA64) \
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LINE(AARCH64_WFXT, wfxt, "wfxt", 0, AARCH64_HWCAP2_WFXT) \
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LINE(AARCH64_EBF16, ebf16, "ebf16", 0, AARCH64_HWCAP2_EBF16) \
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LINE(AARCH64_SVE_EBF16, sveebf16, "sveebf16", 0, AARCH64_HWCAP2_SVE_EBF16) \
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LINE(AARCH64_CSSC, cssc, "cssc", 0, AARCH64_HWCAP2_CSSC) \
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LINE(AARCH64_RPRFM, rprfm, "rprfm", 0, AARCH64_HWCAP2_RPRFM) \
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LINE(AARCH64_SVE2P1, sve2p1, "sve2p1", 0, AARCH64_HWCAP2_SVE2P1) \
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LINE(AARCH64_SME2, sme2, "sme2", 0, AARCH64_HWCAP2_SME2) \
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LINE(AARCH64_SME2P1, sme2p1, "sme2p1", 0, AARCH64_HWCAP2_SME2P1) \
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LINE(AARCH64_SME_I16I32, smei16i32, "smei16i32", 0, \
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AARCH64_HWCAP2_SME_I16I32) \
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LINE(AARCH64_SME_BI32I32, smebi32i32, "smebi32i32", 0, \
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AARCH64_HWCAP2_SME_BI32I32) \
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LINE(AARCH64_SME_B16B16, smeb16b16, "smeb16b16", 0, \
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AARCH64_HWCAP2_SME_B16B16) \
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LINE(AARCH64_SME_F16F16, smef16f16, "smef16f16", 0, \
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AARCH64_HWCAP2_SME_F16F16) \
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LINE(AARCH64_MOPS, mops, "mops", 0, AARCH64_HWCAP2_MOPS) \
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LINE(AARCH64_HBC, hbc, "hbc", 0, AARCH64_HWCAP2_HBC)
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#define INTROSPECTION_PREFIX Aarch64
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#define INTROSPECTION_ENUM_PREFIX AARCH64
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#include "define_introspection_and_hwcaps.inl" |