/* * Machine generated by "edit-gpif". Do not edit by hand. */ // This program configures the General Programmable Interface (GPIF) for FX2. // Please do not modify sections of text which are marked as "DO NOT EDIT ...". // // DO NOT EDIT ... // GPIF Initialization // Interface Timing Async // Internal Ready Init IntRdy=1 // CTL Out Tristate-able Binary // SingleWrite WF Select 1 // SingleRead WF Select 0 // FifoWrite WF Select 3 // FifoRead WF Select 2 // Data Bus Idle Drive Tristate // END DO NOT EDIT // DO NOT EDIT ... // GPIF Wave Names // Wave 0 = Single R // Wave 1 = Single W // Wave 2 = FIFO Rea // Wave 3 = FIFO Wri // GPIF Ctrl Outputs Level // CTL 0 = BOGUS CMOS // CTL 1 = CTL1 CMOS // CTL 2 = CTL2 CMOS // CTL 3 = CTL3 CMOS // CTL 4 = CTL4 CMOS // CTL 5 = CTL5 CMOS // GPIF Rdy Inputs // RDY0 = ADC_CLK // RDY1 = RDY1 // RDY2 = RDY2 // RDY3 = RDY3 // RDY4 = RDY4 // RDY5 = TCXpire // FIFOFlag = FIFOFlag // IntReady = IntReady // END DO NOT EDIT // DO NOT EDIT ... // // GPIF Waveform 0: Single R // // Interval 0 1 2 3 4 5 6 Idle (7) // _________ _________ _________ _________ _________ _________ _________ _________ // // AddrMode Same Val Same Val Same Val Same Val Same Val Same Val Same Val // DataMode NO Data NO Data NO Data NO Data NO Data NO Data NO Data // NextData SameData SameData SameData SameData SameData SameData SameData // Int Trig No Int No Int No Int No Int No Int No Int No Int // IF/Wait Wait 1 Wait 1 Wait 1 Wait 1 Wait 1 Wait 1 Wait 1 // Term A // LFunc // Term B // Branch1 // Branch0 // Re-Exec // Sngl/CRC Default Default Default Default Default Default Default // BOGUS 0 0 0 0 0 0 0 0 // CTL1 0 0 0 0 0 0 0 0 // CTL2 0 0 0 0 0 0 0 0 // CTL3 0 0 0 0 0 0 0 0 // CTL4 0 0 0 0 0 0 0 0 // CTL5 0 0 0 0 0 0 0 0 // // END DO NOT EDIT // DO NOT EDIT ... // // GPIF Waveform 1: Single W // // Interval 0 1 2 3 4 5 6 Idle (7) // _________ _________ _________ _________ _________ _________ _________ _________ // // AddrMode Same Val Same Val Same Val Same Val Same Val Same Val Same Val // DataMode NO Data NO Data NO Data NO Data NO Data NO Data NO Data // NextData SameData SameData SameData SameData SameData SameData SameData // Int Trig No Int No Int No Int No Int No Int No Int No Int // IF/Wait Wait 1 Wait 1 Wait 1 Wait 1 Wait 1 Wait 1 Wait 1 // Term A // LFunc // Term B // Branch1 // Branch0 // Re-Exec // Sngl/CRC Default Default Default Default Default Default Default // BOGUS 0 0 0 0 0 0 0 0 // CTL1 0 0 0 0 0 0 0 0 // CTL2 0 0 0 0 0 0 0 0 // CTL3 0 0 0 0 0 0 0 0 // CTL4 0 0 0 0 0 0 0 0 // CTL5 0 0 0 0 0 0 0 0 // // END DO NOT EDIT // DO NOT EDIT ... // // GPIF Waveform 2: FIFO Rea // // Interval 0 1 2 3 4 5 6 Idle (7) // _________ _________ _________ _________ _________ _________ _________ _________ // // AddrMode Same Val Same Val Same Val Same Val Same Val Same Val Same Val // DataMode Activate Activate Activate Activate Activate Activate Activate // NextData SameData SameData SameData SameData SameData SameData SameData // Int Trig No Int No Int No Int No Int No Int No Int No Int // IF/Wait IF Wait 1 Wait 1 Wait 1 Wait 1 Wait 1 Wait 1 // Term A FIFOFlag // LFunc AND // Term B FIFOFlag // Branch1 ThenIdle // Branch0 Else 0 // Re-Exec No // Sngl/CRC Default Default Default Default Default Default Default // BOGUS 0 0 0 0 0 0 0 0 // CTL1 0 0 0 0 0 0 0 0 // CTL2 0 0 0 0 0 0 0 0 // CTL3 0 0 0 0 0 0 0 0 // CTL4 0 0 0 0 0 0 0 0 // CTL5 0 0 0 0 0 0 0 0 // // END DO NOT EDIT // DO NOT EDIT ... // // GPIF Waveform 3: FIFO Wri // // Interval 0 1 2 3 4 5 6 Idle (7) // _________ _________ _________ _________ _________ _________ _________ _________ // // AddrMode Same Val Same Val Same Val Same Val Same Val Same Val Same Val // DataMode Activate Activate Activate Activate Activate Activate Activate // NextData SameData SameData SameData SameData SameData SameData SameData // Int Trig No Int No Int No Int No Int No Int No Int No Int // IF/Wait IF Wait 1 Wait 1 Wait 1 Wait 1 Wait 1 Wait 1 // Term A FIFOFlag // LFunc AND // Term B FIFOFlag // Branch1 ThenIdle // Branch0 Else 0 // Re-Exec No // Sngl/CRC Default Default Default Default Default Default Default // BOGUS 0 0 0 0 0 0 0 0 // CTL1 0 0 0 0 0 0 0 0 // CTL2 0 0 0 0 0 0 0 0 // CTL3 0 0 0 0 0 0 0 0 // CTL4 0 0 0 0 0 0 0 0 // CTL5 0 0 0 0 0 0 0 0 // // END DO NOT EDIT // GPIF Program Code // DO NOT EDIT ... // #include "fx2.h" // #include "fx2regs.h" // #include "fx2sdly.h" // SYNCDELAY macro // END DO NOT EDIT // DO NOT EDIT ... const char WaveData[128] = { // Wave 0 /* LenBr */ 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x07, /* Opcode*/ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* Output*/ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* LFun */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, // Wave 1 /* LenBr */ 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x07, /* Opcode*/ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* Output*/ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* LFun */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, // Wave 2 /* LenBr */ 0x38, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x07, /* Opcode*/ 0x03, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x00, /* Output*/ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* LFun */ 0x36, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, // Wave 3 /* LenBr */ 0x38, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x07, /* Opcode*/ 0x03, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x00, /* Output*/ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* LFun */ 0x36, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, }; // END DO NOT EDIT // DO NOT EDIT ... const char FlowStates[36] = { /* Wave 0 FlowStates */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* Wave 1 FlowStates */ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* Wave 2 FlowStates */ 0x80,0xED,0x00,0x00,0x00,0x00,0x03,0x02,0x00, /* Wave 3 FlowStates */ 0x80,0xEE,0x00,0x00,0x00,0x00,0x03,0x02,0x00, }; // END DO NOT EDIT // DO NOT EDIT ... const char InitData[7] = { /* Regs */ 0xA0,0x00,0x00,0x00,0xAE,0x4E,0x00 }; // END DO NOT EDIT // TO DO: You may add additional code below.