5 Commits

Author	SHA1	Message	Date
Marc Majoral	916b12eef6	fix code for 32-bit processor architecture	2022-04-29 12:16:48 +02:00
Marc Majoral	d346e763f8	use std::array	2022-04-29 10:41:44 +02:00
Marc Majoral	ea172f0d36	move all DMA control to Fpga_DMA class	2022-04-28 22:33:29 +02:00
Marc Majoral	e740244a63	removed the code that was commented out and the file headers that were not used	2022-04-28 21:24:15 +02:00
Marc Majoral	3f8e22b255	added support for the Xilinx dma-proxy driver when using 64-bit processor architectures.	2022-04-28 18:41:31 +02:00